NFS: NFSoRDMA Client Changes
These patches continue to build up for improving the rsize and wsize that the NFS client uses when talking over RDMA. In addition, these patches also add in scalability enhancements and other bugfixes. Signed-off-by: Anna Schumaker <Anna.Schumaker@Netapp.com> -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJVey8qAAoJENfLVL+wpUDroT4P/3lwspXwdxS6VZWsW1VpNtdV V1KKd5D+TkpBpz/ih9GdOVaBZijaHpb6XtMReh8xuh0KI893iYmsmLoyhMTPJMsU 6sjUDEv8IFrXwlRKldX1KEfBvNgR0czCNiha6O+YsV5Az08+zr57ahyGKmLUzMxo 4XzPZbwnb5fxvgmBgENUU33g+xXGsXDbsdzLvKW3UGcPU2x6PGOTLr5vP7lQkwxE 20d9ak8xQeRUk0hsmRM4fAebzcluD1o3PLIFQBEhh0Gqm1VGtSCkr9o493gT5TgM /+XrU7B8OnbdJ1B4f/y4Bz4RucfKzyRuXMpulrnK1hL7QIiZLqiph7UrTel/ajcD 0us9PImNwXPo8tMz7Wjw2XMQplndHB3FG3M3lXlJGHlXvCI7F0yjm21AP4SeetOm kxL24Qiyi7l/S7JJxHqNlOc0b8kpVLohBZm6yee9w4r/JUPnynUqfnXCHLjIp/5W F1hzbCUATyfKrSs7VKO0hCQHfntigPEhRmyfoyXRAXzl5LnR1XqD6Wah3a3pwXn+ mEquUd6fKRHIIvJ8cKU6KtykkhRHg1sR/z1mw2ZEW/2PCd0cb+8+WN7X/fQqEN+u +VQSo7oPp38SHdsyozuUUyukN5qHptTMSrNZL+LI7J8/0+BuRuIvW0nojViapc51 LOUlcgqRdUlIvmn754Yo =N1tO -----END PGP SIGNATURE----- Merge tag 'nfs-rdma-for-4.2' of git://git.linux-nfs.org/projects/anna/nfs-rdma NFS: NFSoRDMA Client Changes These patches continue to build up for improving the rsize and wsize that the NFS client uses when talking over RDMA. In addition, these patches also add in scalability enhancements and other bugfixes. Signed-off-by: Anna Schumaker <Anna.Schumaker@Netapp.com> * tag 'nfs-rdma-for-4.2' of git://git.linux-nfs.org/projects/anna/nfs-rdma: (142 commits) xprtrdma: Reduce per-transport MR allocation xprtrdma: Stack relief in fmr_op_map() xprtrdma: Split rb_lock xprtrdma: Remove rpcrdma_ia::ri_memreg_strategy xprtrdma: Remove ->ro_reset xprtrdma: Remove unused LOCAL_INV recovery logic xprtrdma: Acquire MRs in rpcrdma_register_external() xprtrdma: Introduce an FRMR recovery workqueue xprtrdma: Acquire FMRs in rpcrdma_fmr_register_external() xprtrdma: Introduce helpers for allocating MWs xprtrdma: Use ib_device pointer safely xprtrdma: Remove rr_func xprtrdma: Replace rpcrdma_rep::rr_buffer with rr_rxprt xprtrdma: Warn when there are orphaned IB objects ...
This commit is contained in:
commit
3438995bc4
|
@ -15,10 +15,8 @@ Optional properties:
|
||||||
- phys: phandle + phy specifier pair
|
- phys: phandle + phy specifier pair
|
||||||
- phy-names: must be "usb"
|
- phy-names: must be "usb"
|
||||||
- dmas: Must contain a list of references to DMA specifiers.
|
- dmas: Must contain a list of references to DMA specifiers.
|
||||||
- dma-names : Must contain a list of DMA names:
|
- dma-names : named "ch%d", where %d is the channel number ranging from zero
|
||||||
- tx0 ... tx<n>
|
to the number of channels (DnFIFOs) minus one.
|
||||||
- rx0 ... rx<n>
|
|
||||||
- This <n> means DnFIFO in USBHS module.
|
|
||||||
|
|
||||||
Example:
|
Example:
|
||||||
usbhs: usb@e6590000 {
|
usbhs: usb@e6590000 {
|
||||||
|
|
13
MAINTAINERS
13
MAINTAINERS
|
@ -51,9 +51,9 @@ trivial patch so apply some common sense.
|
||||||
or does something very odd once a month document it.
|
or does something very odd once a month document it.
|
||||||
|
|
||||||
PLEASE remember that submissions must be made under the terms
|
PLEASE remember that submissions must be made under the terms
|
||||||
of the OSDL certificate of contribution and should include a
|
of the Linux Foundation certificate of contribution and should
|
||||||
Signed-off-by: line. The current version of this "Developer's
|
include a Signed-off-by: line. The current version of this
|
||||||
Certificate of Origin" (DCO) is listed in the file
|
"Developer's Certificate of Origin" (DCO) is listed in the file
|
||||||
Documentation/SubmittingPatches.
|
Documentation/SubmittingPatches.
|
||||||
|
|
||||||
6. Make sure you have the right to send any changes you make. If you
|
6. Make sure you have the right to send any changes you make. If you
|
||||||
|
@ -7575,6 +7575,7 @@ F: drivers/pci/host/pci-exynos.c
|
||||||
|
|
||||||
PCI DRIVER FOR SYNOPSIS DESIGNWARE
|
PCI DRIVER FOR SYNOPSIS DESIGNWARE
|
||||||
M: Jingoo Han <jingoohan1@gmail.com>
|
M: Jingoo Han <jingoohan1@gmail.com>
|
||||||
|
M: Pratyush Anand <pratyush.anand@gmail.com>
|
||||||
L: linux-pci@vger.kernel.org
|
L: linux-pci@vger.kernel.org
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: drivers/pci/host/*designware*
|
F: drivers/pci/host/*designware*
|
||||||
|
@ -7588,8 +7589,9 @@ F: Documentation/devicetree/bindings/pci/host-generic-pci.txt
|
||||||
F: drivers/pci/host/pci-host-generic.c
|
F: drivers/pci/host/pci-host-generic.c
|
||||||
|
|
||||||
PCIE DRIVER FOR ST SPEAR13XX
|
PCIE DRIVER FOR ST SPEAR13XX
|
||||||
|
M: Pratyush Anand <pratyush.anand@gmail.com>
|
||||||
L: linux-pci@vger.kernel.org
|
L: linux-pci@vger.kernel.org
|
||||||
S: Orphan
|
S: Maintained
|
||||||
F: drivers/pci/host/*spear*
|
F: drivers/pci/host/*spear*
|
||||||
|
|
||||||
PCMCIA SUBSYSTEM
|
PCMCIA SUBSYSTEM
|
||||||
|
@ -10587,8 +10589,7 @@ F: drivers/virtio/virtio_input.c
|
||||||
F: include/uapi/linux/virtio_input.h
|
F: include/uapi/linux/virtio_input.h
|
||||||
|
|
||||||
VIA RHINE NETWORK DRIVER
|
VIA RHINE NETWORK DRIVER
|
||||||
M: Roger Luethi <rl@hellgate.ch>
|
S: Orphan
|
||||||
S: Maintained
|
|
||||||
F: drivers/net/ethernet/via/via-rhine.c
|
F: drivers/net/ethernet/via/via-rhine.c
|
||||||
|
|
||||||
VIA SD/MMC CARD CONTROLLER DRIVER
|
VIA SD/MMC CARD CONTROLLER DRIVER
|
||||||
|
|
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
||||||
VERSION = 4
|
VERSION = 4
|
||||||
PATCHLEVEL = 1
|
PATCHLEVEL = 1
|
||||||
SUBLEVEL = 0
|
SUBLEVEL = 0
|
||||||
EXTRAVERSION = -rc6
|
EXTRAVERSION = -rc7
|
||||||
NAME = Hurr durr I'ma sheep
|
NAME = Hurr durr I'ma sheep
|
||||||
|
|
||||||
# *DOCUMENTATION*
|
# *DOCUMENTATION*
|
||||||
|
|
|
@ -127,7 +127,7 @@ int smp_num_siblings = 1;
|
||||||
volatile int ia64_cpu_to_sapicid[NR_CPUS];
|
volatile int ia64_cpu_to_sapicid[NR_CPUS];
|
||||||
EXPORT_SYMBOL(ia64_cpu_to_sapicid);
|
EXPORT_SYMBOL(ia64_cpu_to_sapicid);
|
||||||
|
|
||||||
static volatile cpumask_t cpu_callin_map;
|
static cpumask_t cpu_callin_map;
|
||||||
|
|
||||||
struct smp_boot_data smp_boot_data __initdata;
|
struct smp_boot_data smp_boot_data __initdata;
|
||||||
|
|
||||||
|
@ -477,6 +477,7 @@ do_boot_cpu (int sapicid, int cpu, struct task_struct *idle)
|
||||||
for (timeout = 0; timeout < 100000; timeout++) {
|
for (timeout = 0; timeout < 100000; timeout++) {
|
||||||
if (cpumask_test_cpu(cpu, &cpu_callin_map))
|
if (cpumask_test_cpu(cpu, &cpu_callin_map))
|
||||||
break; /* It has booted */
|
break; /* It has booted */
|
||||||
|
barrier(); /* Make sure we re-read cpu_callin_map */
|
||||||
udelay(100);
|
udelay(100);
|
||||||
}
|
}
|
||||||
Dprintk("\n");
|
Dprintk("\n");
|
||||||
|
|
|
@ -225,7 +225,7 @@ void __init plat_time_init(void)
|
||||||
ddr_clk_rate = ath79_get_sys_clk_rate("ddr");
|
ddr_clk_rate = ath79_get_sys_clk_rate("ddr");
|
||||||
ref_clk_rate = ath79_get_sys_clk_rate("ref");
|
ref_clk_rate = ath79_get_sys_clk_rate("ref");
|
||||||
|
|
||||||
pr_info("Clocks: CPU:%lu.%03luMHz, DDR:%lu.%03luMHz, AHB:%lu.%03luMHz, Ref:%lu.%03luMHz",
|
pr_info("Clocks: CPU:%lu.%03luMHz, DDR:%lu.%03luMHz, AHB:%lu.%03luMHz, Ref:%lu.%03luMHz\n",
|
||||||
cpu_clk_rate / 1000000, (cpu_clk_rate / 1000) % 1000,
|
cpu_clk_rate / 1000000, (cpu_clk_rate / 1000) % 1000,
|
||||||
ddr_clk_rate / 1000000, (ddr_clk_rate / 1000) % 1000,
|
ddr_clk_rate / 1000000, (ddr_clk_rate / 1000) % 1000,
|
||||||
ahb_clk_rate / 1000000, (ahb_clk_rate / 1000) % 1000,
|
ahb_clk_rate / 1000000, (ahb_clk_rate / 1000) % 1000,
|
||||||
|
|
|
@ -74,13 +74,12 @@ static inline void cpu_set_fpu_fcsr_mask(struct cpuinfo_mips *c)
|
||||||
{
|
{
|
||||||
unsigned long sr, mask, fcsr, fcsr0, fcsr1;
|
unsigned long sr, mask, fcsr, fcsr0, fcsr1;
|
||||||
|
|
||||||
|
fcsr = c->fpu_csr31;
|
||||||
mask = FPU_CSR_ALL_X | FPU_CSR_ALL_E | FPU_CSR_ALL_S | FPU_CSR_RM;
|
mask = FPU_CSR_ALL_X | FPU_CSR_ALL_E | FPU_CSR_ALL_S | FPU_CSR_RM;
|
||||||
|
|
||||||
sr = read_c0_status();
|
sr = read_c0_status();
|
||||||
__enable_fpu(FPU_AS_IS);
|
__enable_fpu(FPU_AS_IS);
|
||||||
|
|
||||||
fcsr = read_32bit_cp1_register(CP1_STATUS);
|
|
||||||
|
|
||||||
fcsr0 = fcsr & mask;
|
fcsr0 = fcsr & mask;
|
||||||
write_32bit_cp1_register(CP1_STATUS, fcsr0);
|
write_32bit_cp1_register(CP1_STATUS, fcsr0);
|
||||||
fcsr0 = read_32bit_cp1_register(CP1_STATUS);
|
fcsr0 = read_32bit_cp1_register(CP1_STATUS);
|
||||||
|
|
|
@ -109,7 +109,7 @@ void __init init_IRQ(void)
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef DEBUG_STACKOVERFLOW
|
#ifdef CONFIG_DEBUG_STACKOVERFLOW
|
||||||
static inline void check_stack_overflow(void)
|
static inline void check_stack_overflow(void)
|
||||||
{
|
{
|
||||||
unsigned long sp;
|
unsigned long sp;
|
||||||
|
|
|
@ -2409,7 +2409,7 @@ enum emulation_result kvm_mips_complete_mmio_load(struct kvm_vcpu *vcpu,
|
||||||
if (vcpu->mmio_needed == 2)
|
if (vcpu->mmio_needed == 2)
|
||||||
*gpr = *(int16_t *) run->mmio.data;
|
*gpr = *(int16_t *) run->mmio.data;
|
||||||
else
|
else
|
||||||
*gpr = *(int16_t *) run->mmio.data;
|
*gpr = *(uint16_t *)run->mmio.data;
|
||||||
|
|
||||||
break;
|
break;
|
||||||
case 1:
|
case 1:
|
||||||
|
|
|
@ -272,7 +272,7 @@ void loongson3_ipi_interrupt(struct pt_regs *regs)
|
||||||
if (action & SMP_ASK_C0COUNT) {
|
if (action & SMP_ASK_C0COUNT) {
|
||||||
BUG_ON(cpu != 0);
|
BUG_ON(cpu != 0);
|
||||||
c0count = read_c0_count();
|
c0count = read_c0_count();
|
||||||
for (i = 1; i < loongson_sysconf.nr_cpus; i++)
|
for (i = 1; i < num_possible_cpus(); i++)
|
||||||
per_cpu(core0_c0count, i) = c0count;
|
per_cpu(core0_c0count, i) = c0count;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -1372,7 +1372,7 @@ static int probe_scache(void)
|
||||||
scache_size = addr;
|
scache_size = addr;
|
||||||
c->scache.linesz = 16 << ((config & R4K_CONF_SB) >> 22);
|
c->scache.linesz = 16 << ((config & R4K_CONF_SB) >> 22);
|
||||||
c->scache.ways = 1;
|
c->scache.ways = 1;
|
||||||
c->dcache.waybit = 0; /* does not matter */
|
c->scache.waybit = 0; /* does not matter */
|
||||||
|
|
||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
|
|
|
@ -681,11 +681,7 @@ static unsigned int get_stack_depth(struct jit_ctx *ctx)
|
||||||
sp_off += config_enabled(CONFIG_64BIT) ?
|
sp_off += config_enabled(CONFIG_64BIT) ?
|
||||||
(ARGS_USED_BY_JIT + 1) * RSIZE : RSIZE;
|
(ARGS_USED_BY_JIT + 1) * RSIZE : RSIZE;
|
||||||
|
|
||||||
/*
|
return sp_off;
|
||||||
* Subtract the bytes for the last registers since we only care about
|
|
||||||
* the location on the stack pointer.
|
|
||||||
*/
|
|
||||||
return sp_off - RSIZE;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static void build_prologue(struct jit_ctx *ctx)
|
static void build_prologue(struct jit_ctx *ctx)
|
||||||
|
|
|
@ -41,7 +41,7 @@ static irqreturn_t ill_acc_irq_handler(int irq, void *_priv)
|
||||||
addr, (type >> ILL_ACC_OFF_S) & ILL_ACC_OFF_M,
|
addr, (type >> ILL_ACC_OFF_S) & ILL_ACC_OFF_M,
|
||||||
type & ILL_ACC_LEN_M);
|
type & ILL_ACC_LEN_M);
|
||||||
|
|
||||||
rt_memc_w32(REG_ILL_ACC_TYPE, REG_ILL_ACC_TYPE);
|
rt_memc_w32(ILL_INT_STATUS, REG_ILL_ACC_TYPE);
|
||||||
|
|
||||||
return IRQ_HANDLED;
|
return IRQ_HANDLED;
|
||||||
}
|
}
|
||||||
|
|
|
@ -24,7 +24,8 @@ typedef struct {
|
||||||
unsigned int icache_line_size;
|
unsigned int icache_line_size;
|
||||||
unsigned int ecache_size;
|
unsigned int ecache_size;
|
||||||
unsigned int ecache_line_size;
|
unsigned int ecache_line_size;
|
||||||
int core_id;
|
unsigned short sock_id;
|
||||||
|
unsigned short core_id;
|
||||||
int proc_id;
|
int proc_id;
|
||||||
} cpuinfo_sparc;
|
} cpuinfo_sparc;
|
||||||
|
|
||||||
|
|
|
@ -308,12 +308,26 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t prot)
|
||||||
" sllx %1, 32, %1\n"
|
" sllx %1, 32, %1\n"
|
||||||
" or %0, %1, %0\n"
|
" or %0, %1, %0\n"
|
||||||
" .previous\n"
|
" .previous\n"
|
||||||
|
" .section .sun_m7_2insn_patch, \"ax\"\n"
|
||||||
|
" .word 661b\n"
|
||||||
|
" sethi %%uhi(%4), %1\n"
|
||||||
|
" sethi %%hi(%4), %0\n"
|
||||||
|
" .word 662b\n"
|
||||||
|
" or %1, %%ulo(%4), %1\n"
|
||||||
|
" or %0, %%lo(%4), %0\n"
|
||||||
|
" .word 663b\n"
|
||||||
|
" sllx %1, 32, %1\n"
|
||||||
|
" or %0, %1, %0\n"
|
||||||
|
" .previous\n"
|
||||||
: "=r" (mask), "=r" (tmp)
|
: "=r" (mask), "=r" (tmp)
|
||||||
: "i" (_PAGE_PADDR_4U | _PAGE_MODIFIED_4U | _PAGE_ACCESSED_4U |
|
: "i" (_PAGE_PADDR_4U | _PAGE_MODIFIED_4U | _PAGE_ACCESSED_4U |
|
||||||
_PAGE_CP_4U | _PAGE_CV_4U | _PAGE_E_4U |
|
_PAGE_CP_4U | _PAGE_CV_4U | _PAGE_E_4U |
|
||||||
_PAGE_SPECIAL | _PAGE_PMD_HUGE | _PAGE_SZALL_4U),
|
_PAGE_SPECIAL | _PAGE_PMD_HUGE | _PAGE_SZALL_4U),
|
||||||
"i" (_PAGE_PADDR_4V | _PAGE_MODIFIED_4V | _PAGE_ACCESSED_4V |
|
"i" (_PAGE_PADDR_4V | _PAGE_MODIFIED_4V | _PAGE_ACCESSED_4V |
|
||||||
_PAGE_CP_4V | _PAGE_CV_4V | _PAGE_E_4V |
|
_PAGE_CP_4V | _PAGE_CV_4V | _PAGE_E_4V |
|
||||||
|
_PAGE_SPECIAL | _PAGE_PMD_HUGE | _PAGE_SZALL_4V),
|
||||||
|
"i" (_PAGE_PADDR_4V | _PAGE_MODIFIED_4V | _PAGE_ACCESSED_4V |
|
||||||
|
_PAGE_CP_4V | _PAGE_E_4V |
|
||||||
_PAGE_SPECIAL | _PAGE_PMD_HUGE | _PAGE_SZALL_4V));
|
_PAGE_SPECIAL | _PAGE_PMD_HUGE | _PAGE_SZALL_4V));
|
||||||
|
|
||||||
return __pte((pte_val(pte) & mask) | (pgprot_val(prot) & ~mask));
|
return __pte((pte_val(pte) & mask) | (pgprot_val(prot) & ~mask));
|
||||||
|
@ -342,9 +356,15 @@ static inline pgprot_t pgprot_noncached(pgprot_t prot)
|
||||||
" andn %0, %4, %0\n"
|
" andn %0, %4, %0\n"
|
||||||
" or %0, %5, %0\n"
|
" or %0, %5, %0\n"
|
||||||
" .previous\n"
|
" .previous\n"
|
||||||
|
" .section .sun_m7_2insn_patch, \"ax\"\n"
|
||||||
|
" .word 661b\n"
|
||||||
|
" andn %0, %6, %0\n"
|
||||||
|
" or %0, %5, %0\n"
|
||||||
|
" .previous\n"
|
||||||
: "=r" (val)
|
: "=r" (val)
|
||||||
: "0" (val), "i" (_PAGE_CP_4U | _PAGE_CV_4U), "i" (_PAGE_E_4U),
|
: "0" (val), "i" (_PAGE_CP_4U | _PAGE_CV_4U), "i" (_PAGE_E_4U),
|
||||||
"i" (_PAGE_CP_4V | _PAGE_CV_4V), "i" (_PAGE_E_4V));
|
"i" (_PAGE_CP_4V | _PAGE_CV_4V), "i" (_PAGE_E_4V),
|
||||||
|
"i" (_PAGE_CP_4V));
|
||||||
|
|
||||||
return __pgprot(val);
|
return __pgprot(val);
|
||||||
}
|
}
|
||||||
|
|
|
@ -40,11 +40,12 @@ static inline int pcibus_to_node(struct pci_bus *pbus)
|
||||||
#ifdef CONFIG_SMP
|
#ifdef CONFIG_SMP
|
||||||
#define topology_physical_package_id(cpu) (cpu_data(cpu).proc_id)
|
#define topology_physical_package_id(cpu) (cpu_data(cpu).proc_id)
|
||||||
#define topology_core_id(cpu) (cpu_data(cpu).core_id)
|
#define topology_core_id(cpu) (cpu_data(cpu).core_id)
|
||||||
#define topology_core_cpumask(cpu) (&cpu_core_map[cpu])
|
#define topology_core_cpumask(cpu) (&cpu_core_sib_map[cpu])
|
||||||
#define topology_thread_cpumask(cpu) (&per_cpu(cpu_sibling_map, cpu))
|
#define topology_thread_cpumask(cpu) (&per_cpu(cpu_sibling_map, cpu))
|
||||||
#endif /* CONFIG_SMP */
|
#endif /* CONFIG_SMP */
|
||||||
|
|
||||||
extern cpumask_t cpu_core_map[NR_CPUS];
|
extern cpumask_t cpu_core_map[NR_CPUS];
|
||||||
|
extern cpumask_t cpu_core_sib_map[NR_CPUS];
|
||||||
static inline const struct cpumask *cpu_coregroup_mask(int cpu)
|
static inline const struct cpumask *cpu_coregroup_mask(int cpu)
|
||||||
{
|
{
|
||||||
return &cpu_core_map[cpu];
|
return &cpu_core_map[cpu];
|
||||||
|
|
|
@ -79,6 +79,8 @@ struct sun4v_2insn_patch_entry {
|
||||||
};
|
};
|
||||||
extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch,
|
extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch,
|
||||||
__sun4v_2insn_patch_end;
|
__sun4v_2insn_patch_end;
|
||||||
|
extern struct sun4v_2insn_patch_entry __sun_m7_2insn_patch,
|
||||||
|
__sun_m7_2insn_patch_end;
|
||||||
|
|
||||||
|
|
||||||
#endif /* !(__ASSEMBLY__) */
|
#endif /* !(__ASSEMBLY__) */
|
||||||
|
|
|
@ -69,6 +69,8 @@ void sun4v_patch_1insn_range(struct sun4v_1insn_patch_entry *,
|
||||||
struct sun4v_1insn_patch_entry *);
|
struct sun4v_1insn_patch_entry *);
|
||||||
void sun4v_patch_2insn_range(struct sun4v_2insn_patch_entry *,
|
void sun4v_patch_2insn_range(struct sun4v_2insn_patch_entry *,
|
||||||
struct sun4v_2insn_patch_entry *);
|
struct sun4v_2insn_patch_entry *);
|
||||||
|
void sun_m7_patch_2insn_range(struct sun4v_2insn_patch_entry *,
|
||||||
|
struct sun4v_2insn_patch_entry *);
|
||||||
extern unsigned int dcache_parity_tl1_occurred;
|
extern unsigned int dcache_parity_tl1_occurred;
|
||||||
extern unsigned int icache_parity_tl1_occurred;
|
extern unsigned int icache_parity_tl1_occurred;
|
||||||
|
|
||||||
|
|
|
@ -723,7 +723,6 @@ static int grpci2_of_probe(struct platform_device *ofdev)
|
||||||
err = -ENOMEM;
|
err = -ENOMEM;
|
||||||
goto err1;
|
goto err1;
|
||||||
}
|
}
|
||||||
memset(grpci2priv, 0, sizeof(*grpci2priv));
|
|
||||||
priv->regs = regs;
|
priv->regs = regs;
|
||||||
priv->irq = ofdev->archdata.irqs[0]; /* BASE IRQ */
|
priv->irq = ofdev->archdata.irqs[0]; /* BASE IRQ */
|
||||||
priv->irq_mode = (capability & STS_IRQMODE) >> STS_IRQMODE_BIT;
|
priv->irq_mode = (capability & STS_IRQMODE) >> STS_IRQMODE_BIT;
|
||||||
|
|
|
@ -614,45 +614,68 @@ static void fill_in_one_cache(cpuinfo_sparc *c, struct mdesc_handle *hp, u64 mp)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static void mark_core_ids(struct mdesc_handle *hp, u64 mp, int core_id)
|
static void find_back_node_value(struct mdesc_handle *hp, u64 node,
|
||||||
|
char *srch_val,
|
||||||
|
void (*func)(struct mdesc_handle *, u64, int),
|
||||||
|
u64 val, int depth)
|
||||||
{
|
{
|
||||||
u64 a;
|
u64 arc;
|
||||||
|
|
||||||
mdesc_for_each_arc(a, hp, mp, MDESC_ARC_TYPE_BACK) {
|
/* Since we have an estimate of recursion depth, do a sanity check. */
|
||||||
u64 t = mdesc_arc_target(hp, a);
|
if (depth == 0)
|
||||||
const char *name;
|
return;
|
||||||
const u64 *id;
|
|
||||||
|
|
||||||
name = mdesc_node_name(hp, t);
|
mdesc_for_each_arc(arc, hp, node, MDESC_ARC_TYPE_BACK) {
|
||||||
if (!strcmp(name, "cpu")) {
|
u64 n = mdesc_arc_target(hp, arc);
|
||||||
id = mdesc_get_property(hp, t, "id", NULL);
|
const char *name = mdesc_node_name(hp, n);
|
||||||
if (*id < NR_CPUS)
|
|
||||||
cpu_data(*id).core_id = core_id;
|
|
||||||
} else {
|
|
||||||
u64 j;
|
|
||||||
|
|
||||||
mdesc_for_each_arc(j, hp, t, MDESC_ARC_TYPE_BACK) {
|
if (!strcmp(srch_val, name))
|
||||||
u64 n = mdesc_arc_target(hp, j);
|
(*func)(hp, n, val);
|
||||||
const char *n_name;
|
|
||||||
|
|
||||||
n_name = mdesc_node_name(hp, n);
|
find_back_node_value(hp, n, srch_val, func, val, depth-1);
|
||||||
if (strcmp(n_name, "cpu"))
|
|
||||||
continue;
|
|
||||||
|
|
||||||
id = mdesc_get_property(hp, n, "id", NULL);
|
|
||||||
if (*id < NR_CPUS)
|
|
||||||
cpu_data(*id).core_id = core_id;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static void __mark_core_id(struct mdesc_handle *hp, u64 node,
|
||||||
|
int core_id)
|
||||||
|
{
|
||||||
|
const u64 *id = mdesc_get_property(hp, node, "id", NULL);
|
||||||
|
|
||||||
|
if (*id < num_possible_cpus())
|
||||||
|
cpu_data(*id).core_id = core_id;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void __mark_sock_id(struct mdesc_handle *hp, u64 node,
|
||||||
|
int sock_id)
|
||||||
|
{
|
||||||
|
const u64 *id = mdesc_get_property(hp, node, "id", NULL);
|
||||||
|
|
||||||
|
if (*id < num_possible_cpus())
|
||||||
|
cpu_data(*id).sock_id = sock_id;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void mark_core_ids(struct mdesc_handle *hp, u64 mp,
|
||||||
|
int core_id)
|
||||||
|
{
|
||||||
|
find_back_node_value(hp, mp, "cpu", __mark_core_id, core_id, 10);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void mark_sock_ids(struct mdesc_handle *hp, u64 mp,
|
||||||
|
int sock_id)
|
||||||
|
{
|
||||||
|
find_back_node_value(hp, mp, "cpu", __mark_sock_id, sock_id, 10);
|
||||||
|
}
|
||||||
|
|
||||||
static void set_core_ids(struct mdesc_handle *hp)
|
static void set_core_ids(struct mdesc_handle *hp)
|
||||||
{
|
{
|
||||||
int idx;
|
int idx;
|
||||||
u64 mp;
|
u64 mp;
|
||||||
|
|
||||||
idx = 1;
|
idx = 1;
|
||||||
|
|
||||||
|
/* Identify unique cores by looking for cpus backpointed to by
|
||||||
|
* level 1 instruction caches.
|
||||||
|
*/
|
||||||
mdesc_for_each_node_by_name(hp, mp, "cache") {
|
mdesc_for_each_node_by_name(hp, mp, "cache") {
|
||||||
const u64 *level;
|
const u64 *level;
|
||||||
const char *type;
|
const char *type;
|
||||||
|
@ -667,11 +690,72 @@ static void set_core_ids(struct mdesc_handle *hp)
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
mark_core_ids(hp, mp, idx);
|
mark_core_ids(hp, mp, idx);
|
||||||
|
|
||||||
idx++;
|
idx++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static int set_sock_ids_by_cache(struct mdesc_handle *hp, int level)
|
||||||
|
{
|
||||||
|
u64 mp;
|
||||||
|
int idx = 1;
|
||||||
|
int fnd = 0;
|
||||||
|
|
||||||
|
/* Identify unique sockets by looking for cpus backpointed to by
|
||||||
|
* shared level n caches.
|
||||||
|
*/
|
||||||
|
mdesc_for_each_node_by_name(hp, mp, "cache") {
|
||||||
|
const u64 *cur_lvl;
|
||||||
|
|
||||||
|
cur_lvl = mdesc_get_property(hp, mp, "level", NULL);
|
||||||
|
if (*cur_lvl != level)
|
||||||
|
continue;
|
||||||
|
|
||||||
|
mark_sock_ids(hp, mp, idx);
|
||||||
|
idx++;
|
||||||
|
fnd = 1;
|
||||||
|
}
|
||||||
|
return fnd;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void set_sock_ids_by_socket(struct mdesc_handle *hp, u64 mp)
|
||||||
|
{
|
||||||
|
int idx = 1;
|
||||||
|
|
||||||
|
mdesc_for_each_node_by_name(hp, mp, "socket") {
|
||||||
|
u64 a;
|
||||||
|
|
||||||
|
mdesc_for_each_arc(a, hp, mp, MDESC_ARC_TYPE_FWD) {
|
||||||
|
u64 t = mdesc_arc_target(hp, a);
|
||||||
|
const char *name;
|
||||||
|
const u64 *id;
|
||||||
|
|
||||||
|
name = mdesc_node_name(hp, t);
|
||||||
|
if (strcmp(name, "cpu"))
|
||||||
|
continue;
|
||||||
|
|
||||||
|
id = mdesc_get_property(hp, t, "id", NULL);
|
||||||
|
if (*id < num_possible_cpus())
|
||||||
|
cpu_data(*id).sock_id = idx;
|
||||||
|
}
|
||||||
|
idx++;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
static void set_sock_ids(struct mdesc_handle *hp)
|
||||||
|
{
|
||||||
|
u64 mp;
|
||||||
|
|
||||||
|
/* If machine description exposes sockets data use it.
|
||||||
|
* Otherwise fallback to use shared L3 or L2 caches.
|
||||||
|
*/
|
||||||
|
mp = mdesc_node_by_name(hp, MDESC_NODE_NULL, "sockets");
|
||||||
|
if (mp != MDESC_NODE_NULL)
|
||||||
|
return set_sock_ids_by_socket(hp, mp);
|
||||||
|
|
||||||
|
if (!set_sock_ids_by_cache(hp, 3))
|
||||||
|
set_sock_ids_by_cache(hp, 2);
|
||||||
|
}
|
||||||
|
|
||||||
static void mark_proc_ids(struct mdesc_handle *hp, u64 mp, int proc_id)
|
static void mark_proc_ids(struct mdesc_handle *hp, u64 mp, int proc_id)
|
||||||
{
|
{
|
||||||
u64 a;
|
u64 a;
|
||||||
|
@ -707,7 +791,6 @@ static void __set_proc_ids(struct mdesc_handle *hp, const char *exec_unit_name)
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
mark_proc_ids(hp, mp, idx);
|
mark_proc_ids(hp, mp, idx);
|
||||||
|
|
||||||
idx++;
|
idx++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -900,6 +983,7 @@ void mdesc_fill_in_cpu_data(cpumask_t *mask)
|
||||||
|
|
||||||
set_core_ids(hp);
|
set_core_ids(hp);
|
||||||
set_proc_ids(hp);
|
set_proc_ids(hp);
|
||||||
|
set_sock_ids(hp);
|
||||||
|
|
||||||
mdesc_release(hp);
|
mdesc_release(hp);
|
||||||
|
|
||||||
|
|
|
@ -1002,6 +1002,38 @@ static int __init pcibios_init(void)
|
||||||
subsys_initcall(pcibios_init);
|
subsys_initcall(pcibios_init);
|
||||||
|
|
||||||
#ifdef CONFIG_SYSFS
|
#ifdef CONFIG_SYSFS
|
||||||
|
|
||||||
|
#define SLOT_NAME_SIZE 11 /* Max decimal digits + null in u32 */
|
||||||
|
|
||||||
|
static void pcie_bus_slot_names(struct pci_bus *pbus)
|
||||||
|
{
|
||||||
|
struct pci_dev *pdev;
|
||||||
|
struct pci_bus *bus;
|
||||||
|
|
||||||
|
list_for_each_entry(pdev, &pbus->devices, bus_list) {
|
||||||
|
char name[SLOT_NAME_SIZE];
|
||||||
|
struct pci_slot *pci_slot;
|
||||||
|
const u32 *slot_num;
|
||||||
|
int len;
|
||||||
|
|
||||||
|
slot_num = of_get_property(pdev->dev.of_node,
|
||||||
|
"physical-slot#", &len);
|
||||||
|
|
||||||
|
if (slot_num == NULL || len != 4)
|
||||||
|
continue;
|
||||||
|
|
||||||
|
snprintf(name, sizeof(name), "%u", slot_num[0]);
|
||||||
|
pci_slot = pci_create_slot(pbus, slot_num[0], name, NULL);
|
||||||
|
|
||||||
|
if (IS_ERR(pci_slot))
|
||||||
|
pr_err("PCI: pci_create_slot returned %ld.\n",
|
||||||
|
PTR_ERR(pci_slot));
|
||||||
|
}
|
||||||
|
|
||||||
|
list_for_each_entry(bus, &pbus->children, node)
|
||||||
|
pcie_bus_slot_names(bus);
|
||||||
|
}
|
||||||
|
|
||||||
static void pci_bus_slot_names(struct device_node *node, struct pci_bus *bus)
|
static void pci_bus_slot_names(struct device_node *node, struct pci_bus *bus)
|
||||||
{
|
{
|
||||||
const struct pci_slot_names {
|
const struct pci_slot_names {
|
||||||
|
@ -1053,18 +1085,29 @@ static int __init of_pci_slot_init(void)
|
||||||
|
|
||||||
while ((pbus = pci_find_next_bus(pbus)) != NULL) {
|
while ((pbus = pci_find_next_bus(pbus)) != NULL) {
|
||||||
struct device_node *node;
|
struct device_node *node;
|
||||||
|
struct pci_dev *pdev;
|
||||||
|
|
||||||
if (pbus->self) {
|
pdev = list_first_entry(&pbus->devices, struct pci_dev,
|
||||||
/* PCI->PCI bridge */
|
bus_list);
|
||||||
node = pbus->self->dev.of_node;
|
|
||||||
|
if (pdev && pci_is_pcie(pdev)) {
|
||||||
|
pcie_bus_slot_names(pbus);
|
||||||
} else {
|
} else {
|
||||||
struct pci_pbm_info *pbm = pbus->sysdata;
|
|
||||||
|
|
||||||
/* Host PCI controller */
|
if (pbus->self) {
|
||||||
node = pbm->op->dev.of_node;
|
|
||||||
|
/* PCI->PCI bridge */
|
||||||
|
node = pbus->self->dev.of_node;
|
||||||
|
|
||||||
|
} else {
|
||||||
|
struct pci_pbm_info *pbm = pbus->sysdata;
|
||||||
|
|
||||||
|
/* Host PCI controller */
|
||||||
|
node = pbm->op->dev.of_node;
|
||||||
|
}
|
||||||
|
|
||||||
|
pci_bus_slot_names(node, pbus);
|
||||||
}
|
}
|
||||||
|
|
||||||
pci_bus_slot_names(node, pbus);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
|
|
@ -255,6 +255,24 @@ void sun4v_patch_2insn_range(struct sun4v_2insn_patch_entry *start,
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void sun_m7_patch_2insn_range(struct sun4v_2insn_patch_entry *start,
|
||||||
|
struct sun4v_2insn_patch_entry *end)
|
||||||
|
{
|
||||||
|
while (start < end) {
|
||||||
|
unsigned long addr = start->addr;
|
||||||
|
|
||||||
|
*(unsigned int *) (addr + 0) = start->insns[0];
|
||||||
|
wmb();
|
||||||
|
__asm__ __volatile__("flush %0" : : "r" (addr + 0));
|
||||||
|
|
||||||
|
*(unsigned int *) (addr + 4) = start->insns[1];
|
||||||
|
wmb();
|
||||||
|
__asm__ __volatile__("flush %0" : : "r" (addr + 4));
|
||||||
|
|
||||||
|
start++;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
static void __init sun4v_patch(void)
|
static void __init sun4v_patch(void)
|
||||||
{
|
{
|
||||||
extern void sun4v_hvapi_init(void);
|
extern void sun4v_hvapi_init(void);
|
||||||
|
@ -267,6 +285,9 @@ static void __init sun4v_patch(void)
|
||||||
|
|
||||||
sun4v_patch_2insn_range(&__sun4v_2insn_patch,
|
sun4v_patch_2insn_range(&__sun4v_2insn_patch,
|
||||||
&__sun4v_2insn_patch_end);
|
&__sun4v_2insn_patch_end);
|
||||||
|
if (sun4v_chip_type == SUN4V_CHIP_SPARC_M7)
|
||||||
|
sun_m7_patch_2insn_range(&__sun_m7_2insn_patch,
|
||||||
|
&__sun_m7_2insn_patch_end);
|
||||||
|
|
||||||
sun4v_hvapi_init();
|
sun4v_hvapi_init();
|
||||||
}
|
}
|
||||||
|
|
|
@ -60,8 +60,12 @@ DEFINE_PER_CPU(cpumask_t, cpu_sibling_map) = CPU_MASK_NONE;
|
||||||
cpumask_t cpu_core_map[NR_CPUS] __read_mostly =
|
cpumask_t cpu_core_map[NR_CPUS] __read_mostly =
|
||||||
{ [0 ... NR_CPUS-1] = CPU_MASK_NONE };
|
{ [0 ... NR_CPUS-1] = CPU_MASK_NONE };
|
||||||
|
|
||||||
|
cpumask_t cpu_core_sib_map[NR_CPUS] __read_mostly = {
|
||||||
|
[0 ... NR_CPUS-1] = CPU_MASK_NONE };
|
||||||
|
|
||||||
EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
|
EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
|
||||||
EXPORT_SYMBOL(cpu_core_map);
|
EXPORT_SYMBOL(cpu_core_map);
|
||||||
|
EXPORT_SYMBOL(cpu_core_sib_map);
|
||||||
|
|
||||||
static cpumask_t smp_commenced_mask;
|
static cpumask_t smp_commenced_mask;
|
||||||
|
|
||||||
|
@ -1243,6 +1247,15 @@ void smp_fill_in_sib_core_maps(void)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
for_each_present_cpu(i) {
|
||||||
|
unsigned int j;
|
||||||
|
|
||||||
|
for_each_present_cpu(j) {
|
||||||
|
if (cpu_data(i).sock_id == cpu_data(j).sock_id)
|
||||||
|
cpumask_set_cpu(j, &cpu_core_sib_map[i]);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
for_each_present_cpu(i) {
|
for_each_present_cpu(i) {
|
||||||
unsigned int j;
|
unsigned int j;
|
||||||
|
|
||||||
|
|
|
@ -138,6 +138,11 @@ SECTIONS
|
||||||
*(.pause_3insn_patch)
|
*(.pause_3insn_patch)
|
||||||
__pause_3insn_patch_end = .;
|
__pause_3insn_patch_end = .;
|
||||||
}
|
}
|
||||||
|
.sun_m7_2insn_patch : {
|
||||||
|
__sun_m7_2insn_patch = .;
|
||||||
|
*(.sun_m7_2insn_patch)
|
||||||
|
__sun_m7_2insn_patch_end = .;
|
||||||
|
}
|
||||||
PERCPU_SECTION(SMP_CACHE_BYTES)
|
PERCPU_SECTION(SMP_CACHE_BYTES)
|
||||||
|
|
||||||
. = ALIGN(PAGE_SIZE);
|
. = ALIGN(PAGE_SIZE);
|
||||||
|
|
|
@ -54,6 +54,7 @@
|
||||||
#include "init_64.h"
|
#include "init_64.h"
|
||||||
|
|
||||||
unsigned long kern_linear_pte_xor[4] __read_mostly;
|
unsigned long kern_linear_pte_xor[4] __read_mostly;
|
||||||
|
static unsigned long page_cache4v_flag;
|
||||||
|
|
||||||
/* A bitmap, two bits for every 256MB of physical memory. These two
|
/* A bitmap, two bits for every 256MB of physical memory. These two
|
||||||
* bits determine what page size we use for kernel linear
|
* bits determine what page size we use for kernel linear
|
||||||
|
@ -1909,11 +1910,24 @@ static void __init sun4u_linear_pte_xor_finalize(void)
|
||||||
|
|
||||||
static void __init sun4v_linear_pte_xor_finalize(void)
|
static void __init sun4v_linear_pte_xor_finalize(void)
|
||||||
{
|
{
|
||||||
|
unsigned long pagecv_flag;
|
||||||
|
|
||||||
|
/* Bit 9 of TTE is no longer CV bit on M7 processor and it instead
|
||||||
|
* enables MCD error. Do not set bit 9 on M7 processor.
|
||||||
|
*/
|
||||||
|
switch (sun4v_chip_type) {
|
||||||
|
case SUN4V_CHIP_SPARC_M7:
|
||||||
|
pagecv_flag = 0x00;
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
pagecv_flag = _PAGE_CV_4V;
|
||||||
|
break;
|
||||||
|
}
|
||||||
#ifndef CONFIG_DEBUG_PAGEALLOC
|
#ifndef CONFIG_DEBUG_PAGEALLOC
|
||||||
if (cpu_pgsz_mask & HV_PGSZ_MASK_256MB) {
|
if (cpu_pgsz_mask & HV_PGSZ_MASK_256MB) {
|
||||||
kern_linear_pte_xor[1] = (_PAGE_VALID | _PAGE_SZ256MB_4V) ^
|
kern_linear_pte_xor[1] = (_PAGE_VALID | _PAGE_SZ256MB_4V) ^
|
||||||
PAGE_OFFSET;
|
PAGE_OFFSET;
|
||||||
kern_linear_pte_xor[1] |= (_PAGE_CP_4V | _PAGE_CV_4V |
|
kern_linear_pte_xor[1] |= (_PAGE_CP_4V | pagecv_flag |
|
||||||
_PAGE_P_4V | _PAGE_W_4V);
|
_PAGE_P_4V | _PAGE_W_4V);
|
||||||
} else {
|
} else {
|
||||||
kern_linear_pte_xor[1] = kern_linear_pte_xor[0];
|
kern_linear_pte_xor[1] = kern_linear_pte_xor[0];
|
||||||
|
@ -1922,7 +1936,7 @@ static void __init sun4v_linear_pte_xor_finalize(void)
|
||||||
if (cpu_pgsz_mask & HV_PGSZ_MASK_2GB) {
|
if (cpu_pgsz_mask & HV_PGSZ_MASK_2GB) {
|
||||||
kern_linear_pte_xor[2] = (_PAGE_VALID | _PAGE_SZ2GB_4V) ^
|
kern_linear_pte_xor[2] = (_PAGE_VALID | _PAGE_SZ2GB_4V) ^
|
||||||
PAGE_OFFSET;
|
PAGE_OFFSET;
|
||||||
kern_linear_pte_xor[2] |= (_PAGE_CP_4V | _PAGE_CV_4V |
|
kern_linear_pte_xor[2] |= (_PAGE_CP_4V | pagecv_flag |
|
||||||
_PAGE_P_4V | _PAGE_W_4V);
|
_PAGE_P_4V | _PAGE_W_4V);
|
||||||
} else {
|
} else {
|
||||||
kern_linear_pte_xor[2] = kern_linear_pte_xor[1];
|
kern_linear_pte_xor[2] = kern_linear_pte_xor[1];
|
||||||
|
@ -1931,7 +1945,7 @@ static void __init sun4v_linear_pte_xor_finalize(void)
|
||||||
if (cpu_pgsz_mask & HV_PGSZ_MASK_16GB) {
|
if (cpu_pgsz_mask & HV_PGSZ_MASK_16GB) {
|
||||||
kern_linear_pte_xor[3] = (_PAGE_VALID | _PAGE_SZ16GB_4V) ^
|
kern_linear_pte_xor[3] = (_PAGE_VALID | _PAGE_SZ16GB_4V) ^
|
||||||
PAGE_OFFSET;
|
PAGE_OFFSET;
|
||||||
kern_linear_pte_xor[3] |= (_PAGE_CP_4V | _PAGE_CV_4V |
|
kern_linear_pte_xor[3] |= (_PAGE_CP_4V | pagecv_flag |
|
||||||
_PAGE_P_4V | _PAGE_W_4V);
|
_PAGE_P_4V | _PAGE_W_4V);
|
||||||
} else {
|
} else {
|
||||||
kern_linear_pte_xor[3] = kern_linear_pte_xor[2];
|
kern_linear_pte_xor[3] = kern_linear_pte_xor[2];
|
||||||
|
@ -1958,6 +1972,13 @@ static phys_addr_t __init available_memory(void)
|
||||||
return available;
|
return available;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#define _PAGE_CACHE_4U (_PAGE_CP_4U | _PAGE_CV_4U)
|
||||||
|
#define _PAGE_CACHE_4V (_PAGE_CP_4V | _PAGE_CV_4V)
|
||||||
|
#define __DIRTY_BITS_4U (_PAGE_MODIFIED_4U | _PAGE_WRITE_4U | _PAGE_W_4U)
|
||||||
|
#define __DIRTY_BITS_4V (_PAGE_MODIFIED_4V | _PAGE_WRITE_4V | _PAGE_W_4V)
|
||||||
|
#define __ACCESS_BITS_4U (_PAGE_ACCESSED_4U | _PAGE_READ_4U | _PAGE_R)
|
||||||
|
#define __ACCESS_BITS_4V (_PAGE_ACCESSED_4V | _PAGE_READ_4V | _PAGE_R)
|
||||||
|
|
||||||
/* We need to exclude reserved regions. This exclusion will include
|
/* We need to exclude reserved regions. This exclusion will include
|
||||||
* vmlinux and initrd. To be more precise the initrd size could be used to
|
* vmlinux and initrd. To be more precise the initrd size could be used to
|
||||||
* compute a new lower limit because it is freed later during initialization.
|
* compute a new lower limit because it is freed later during initialization.
|
||||||
|
@ -2034,6 +2055,25 @@ void __init paging_init(void)
|
||||||
memset(swapper_4m_tsb, 0x40, sizeof(swapper_4m_tsb));
|
memset(swapper_4m_tsb, 0x40, sizeof(swapper_4m_tsb));
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
/* TTE.cv bit on sparc v9 occupies the same position as TTE.mcde
|
||||||
|
* bit on M7 processor. This is a conflicting usage of the same
|
||||||
|
* bit. Enabling TTE.cv on M7 would turn on Memory Corruption
|
||||||
|
* Detection error on all pages and this will lead to problems
|
||||||
|
* later. Kernel does not run with MCD enabled and hence rest
|
||||||
|
* of the required steps to fully configure memory corruption
|
||||||
|
* detection are not taken. We need to ensure TTE.mcde is not
|
||||||
|
* set on M7 processor. Compute the value of cacheability
|
||||||
|
* flag for use later taking this into consideration.
|
||||||
|
*/
|
||||||
|
switch (sun4v_chip_type) {
|
||||||
|
case SUN4V_CHIP_SPARC_M7:
|
||||||
|
page_cache4v_flag = _PAGE_CP_4V;
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
page_cache4v_flag = _PAGE_CACHE_4V;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
if (tlb_type == hypervisor)
|
if (tlb_type == hypervisor)
|
||||||
sun4v_pgprot_init();
|
sun4v_pgprot_init();
|
||||||
else
|
else
|
||||||
|
@ -2274,13 +2314,6 @@ void free_initrd_mem(unsigned long start, unsigned long end)
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#define _PAGE_CACHE_4U (_PAGE_CP_4U | _PAGE_CV_4U)
|
|
||||||
#define _PAGE_CACHE_4V (_PAGE_CP_4V | _PAGE_CV_4V)
|
|
||||||
#define __DIRTY_BITS_4U (_PAGE_MODIFIED_4U | _PAGE_WRITE_4U | _PAGE_W_4U)
|
|
||||||
#define __DIRTY_BITS_4V (_PAGE_MODIFIED_4V | _PAGE_WRITE_4V | _PAGE_W_4V)
|
|
||||||
#define __ACCESS_BITS_4U (_PAGE_ACCESSED_4U | _PAGE_READ_4U | _PAGE_R)
|
|
||||||
#define __ACCESS_BITS_4V (_PAGE_ACCESSED_4V | _PAGE_READ_4V | _PAGE_R)
|
|
||||||
|
|
||||||
pgprot_t PAGE_KERNEL __read_mostly;
|
pgprot_t PAGE_KERNEL __read_mostly;
|
||||||
EXPORT_SYMBOL(PAGE_KERNEL);
|
EXPORT_SYMBOL(PAGE_KERNEL);
|
||||||
|
|
||||||
|
@ -2312,8 +2345,7 @@ int __meminit vmemmap_populate(unsigned long vstart, unsigned long vend,
|
||||||
_PAGE_P_4U | _PAGE_W_4U);
|
_PAGE_P_4U | _PAGE_W_4U);
|
||||||
if (tlb_type == hypervisor)
|
if (tlb_type == hypervisor)
|
||||||
pte_base = (_PAGE_VALID | _PAGE_SZ4MB_4V |
|
pte_base = (_PAGE_VALID | _PAGE_SZ4MB_4V |
|
||||||
_PAGE_CP_4V | _PAGE_CV_4V |
|
page_cache4v_flag | _PAGE_P_4V | _PAGE_W_4V);
|
||||||
_PAGE_P_4V | _PAGE_W_4V);
|
|
||||||
|
|
||||||
pte_base |= _PAGE_PMD_HUGE;
|
pte_base |= _PAGE_PMD_HUGE;
|
||||||
|
|
||||||
|
@ -2450,14 +2482,14 @@ static void __init sun4v_pgprot_init(void)
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
PAGE_KERNEL = __pgprot (_PAGE_PRESENT_4V | _PAGE_VALID |
|
PAGE_KERNEL = __pgprot (_PAGE_PRESENT_4V | _PAGE_VALID |
|
||||||
_PAGE_CACHE_4V | _PAGE_P_4V |
|
page_cache4v_flag | _PAGE_P_4V |
|
||||||
__ACCESS_BITS_4V | __DIRTY_BITS_4V |
|
__ACCESS_BITS_4V | __DIRTY_BITS_4V |
|
||||||
_PAGE_EXEC_4V);
|
_PAGE_EXEC_4V);
|
||||||
PAGE_KERNEL_LOCKED = PAGE_KERNEL;
|
PAGE_KERNEL_LOCKED = PAGE_KERNEL;
|
||||||
|
|
||||||
_PAGE_IE = _PAGE_IE_4V;
|
_PAGE_IE = _PAGE_IE_4V;
|
||||||
_PAGE_E = _PAGE_E_4V;
|
_PAGE_E = _PAGE_E_4V;
|
||||||
_PAGE_CACHE = _PAGE_CACHE_4V;
|
_PAGE_CACHE = page_cache4v_flag;
|
||||||
|
|
||||||
#ifdef CONFIG_DEBUG_PAGEALLOC
|
#ifdef CONFIG_DEBUG_PAGEALLOC
|
||||||
kern_linear_pte_xor[0] = _PAGE_VALID ^ PAGE_OFFSET;
|
kern_linear_pte_xor[0] = _PAGE_VALID ^ PAGE_OFFSET;
|
||||||
|
@ -2465,8 +2497,8 @@ static void __init sun4v_pgprot_init(void)
|
||||||
kern_linear_pte_xor[0] = (_PAGE_VALID | _PAGE_SZ4MB_4V) ^
|
kern_linear_pte_xor[0] = (_PAGE_VALID | _PAGE_SZ4MB_4V) ^
|
||||||
PAGE_OFFSET;
|
PAGE_OFFSET;
|
||||||
#endif
|
#endif
|
||||||
kern_linear_pte_xor[0] |= (_PAGE_CP_4V | _PAGE_CV_4V |
|
kern_linear_pte_xor[0] |= (page_cache4v_flag | _PAGE_P_4V |
|
||||||
_PAGE_P_4V | _PAGE_W_4V);
|
_PAGE_W_4V);
|
||||||
|
|
||||||
for (i = 1; i < 4; i++)
|
for (i = 1; i < 4; i++)
|
||||||
kern_linear_pte_xor[i] = kern_linear_pte_xor[0];
|
kern_linear_pte_xor[i] = kern_linear_pte_xor[0];
|
||||||
|
@ -2479,12 +2511,12 @@ static void __init sun4v_pgprot_init(void)
|
||||||
_PAGE_SZ4MB_4V | _PAGE_SZ512K_4V |
|
_PAGE_SZ4MB_4V | _PAGE_SZ512K_4V |
|
||||||
_PAGE_SZ64K_4V | _PAGE_SZ8K_4V);
|
_PAGE_SZ64K_4V | _PAGE_SZ8K_4V);
|
||||||
|
|
||||||
page_none = _PAGE_PRESENT_4V | _PAGE_ACCESSED_4V | _PAGE_CACHE_4V;
|
page_none = _PAGE_PRESENT_4V | _PAGE_ACCESSED_4V | page_cache4v_flag;
|
||||||
page_shared = (_PAGE_VALID | _PAGE_PRESENT_4V | _PAGE_CACHE_4V |
|
page_shared = (_PAGE_VALID | _PAGE_PRESENT_4V | page_cache4v_flag |
|
||||||
__ACCESS_BITS_4V | _PAGE_WRITE_4V | _PAGE_EXEC_4V);
|
__ACCESS_BITS_4V | _PAGE_WRITE_4V | _PAGE_EXEC_4V);
|
||||||
page_copy = (_PAGE_VALID | _PAGE_PRESENT_4V | _PAGE_CACHE_4V |
|
page_copy = (_PAGE_VALID | _PAGE_PRESENT_4V | page_cache4v_flag |
|
||||||
__ACCESS_BITS_4V | _PAGE_EXEC_4V);
|
__ACCESS_BITS_4V | _PAGE_EXEC_4V);
|
||||||
page_readonly = (_PAGE_VALID | _PAGE_PRESENT_4V | _PAGE_CACHE_4V |
|
page_readonly = (_PAGE_VALID | _PAGE_PRESENT_4V | page_cache4v_flag |
|
||||||
__ACCESS_BITS_4V | _PAGE_EXEC_4V);
|
__ACCESS_BITS_4V | _PAGE_EXEC_4V);
|
||||||
|
|
||||||
page_exec_bit = _PAGE_EXEC_4V;
|
page_exec_bit = _PAGE_EXEC_4V;
|
||||||
|
@ -2542,7 +2574,7 @@ static unsigned long kern_large_tte(unsigned long paddr)
|
||||||
_PAGE_EXEC_4U | _PAGE_L_4U | _PAGE_W_4U);
|
_PAGE_EXEC_4U | _PAGE_L_4U | _PAGE_W_4U);
|
||||||
if (tlb_type == hypervisor)
|
if (tlb_type == hypervisor)
|
||||||
val = (_PAGE_VALID | _PAGE_SZ4MB_4V |
|
val = (_PAGE_VALID | _PAGE_SZ4MB_4V |
|
||||||
_PAGE_CP_4V | _PAGE_CV_4V | _PAGE_P_4V |
|
page_cache4v_flag | _PAGE_P_4V |
|
||||||
_PAGE_EXEC_4V | _PAGE_W_4V);
|
_PAGE_EXEC_4V | _PAGE_W_4V);
|
||||||
|
|
||||||
return val | paddr;
|
return val | paddr;
|
||||||
|
|
|
@ -2,15 +2,14 @@
|
||||||
#define BOOT_COMPRESSED_MISC_H
|
#define BOOT_COMPRESSED_MISC_H
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* we have to be careful, because no indirections are allowed here, and
|
* Special hack: we have to be careful, because no indirections are allowed here,
|
||||||
* paravirt_ops is a kind of one. As it will only run in baremetal anyway,
|
* and paravirt_ops is a kind of one. As it will only run in baremetal anyway,
|
||||||
* we just keep it from happening
|
* we just keep it from happening. (This list needs to be extended when new
|
||||||
|
* paravirt and debugging variants are added.)
|
||||||
*/
|
*/
|
||||||
#undef CONFIG_PARAVIRT
|
#undef CONFIG_PARAVIRT
|
||||||
|
#undef CONFIG_PARAVIRT_SPINLOCKS
|
||||||
#undef CONFIG_KASAN
|
#undef CONFIG_KASAN
|
||||||
#ifdef CONFIG_X86_32
|
|
||||||
#define _ASM_X86_DESC_H 1
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#include <linux/linkage.h>
|
#include <linux/linkage.h>
|
||||||
#include <linux/screen_info.h>
|
#include <linux/screen_info.h>
|
||||||
|
|
|
@ -107,7 +107,7 @@ static inline unsigned long regs_return_value(struct pt_regs *regs)
|
||||||
static inline int user_mode(struct pt_regs *regs)
|
static inline int user_mode(struct pt_regs *regs)
|
||||||
{
|
{
|
||||||
#ifdef CONFIG_X86_32
|
#ifdef CONFIG_X86_32
|
||||||
return (regs->cs & SEGMENT_RPL_MASK) == USER_RPL;
|
return ((regs->cs & SEGMENT_RPL_MASK) | (regs->flags & X86_VM_MASK)) >= USER_RPL;
|
||||||
#else
|
#else
|
||||||
return !!(regs->cs & 3);
|
return !!(regs->cs & 3);
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -231,11 +231,21 @@
|
||||||
#define TLS_SIZE (GDT_ENTRY_TLS_ENTRIES* 8)
|
#define TLS_SIZE (GDT_ENTRY_TLS_ENTRIES* 8)
|
||||||
|
|
||||||
#ifdef __KERNEL__
|
#ifdef __KERNEL__
|
||||||
|
|
||||||
|
/*
|
||||||
|
* early_idt_handler_array is an array of entry points referenced in the
|
||||||
|
* early IDT. For simplicity, it's a real array with one entry point
|
||||||
|
* every nine bytes. That leaves room for an optional 'push $0' if the
|
||||||
|
* vector has no error code (two bytes), a 'push $vector_number' (two
|
||||||
|
* bytes), and a jump to the common entry code (up to five bytes).
|
||||||
|
*/
|
||||||
|
#define EARLY_IDT_HANDLER_SIZE 9
|
||||||
|
|
||||||
#ifndef __ASSEMBLY__
|
#ifndef __ASSEMBLY__
|
||||||
|
|
||||||
extern const char early_idt_handlers[NUM_EXCEPTION_VECTORS][2+2+5];
|
extern const char early_idt_handler_array[NUM_EXCEPTION_VECTORS][EARLY_IDT_HANDLER_SIZE];
|
||||||
#ifdef CONFIG_TRACING
|
#ifdef CONFIG_TRACING
|
||||||
# define trace_early_idt_handlers early_idt_handlers
|
# define trace_early_idt_handler_array early_idt_handler_array
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
@ -190,6 +190,7 @@ static bool check_hw_exists(void)
|
||||||
u64 val, val_fail, val_new= ~0;
|
u64 val, val_fail, val_new= ~0;
|
||||||
int i, reg, reg_fail, ret = 0;
|
int i, reg, reg_fail, ret = 0;
|
||||||
int bios_fail = 0;
|
int bios_fail = 0;
|
||||||
|
int reg_safe = -1;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Check to see if the BIOS enabled any of the counters, if so
|
* Check to see if the BIOS enabled any of the counters, if so
|
||||||
|
@ -204,6 +205,8 @@ static bool check_hw_exists(void)
|
||||||
bios_fail = 1;
|
bios_fail = 1;
|
||||||
val_fail = val;
|
val_fail = val;
|
||||||
reg_fail = reg;
|
reg_fail = reg;
|
||||||
|
} else {
|
||||||
|
reg_safe = i;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -221,12 +224,23 @@ static bool check_hw_exists(void)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* If all the counters are enabled, the below test will always
|
||||||
|
* fail. The tools will also become useless in this scenario.
|
||||||
|
* Just fail and disable the hardware counters.
|
||||||
|
*/
|
||||||
|
|
||||||
|
if (reg_safe == -1) {
|
||||||
|
reg = reg_safe;
|
||||||
|
goto msr_fail;
|
||||||
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Read the current value, change it and read it back to see if it
|
* Read the current value, change it and read it back to see if it
|
||||||
* matches, this is needed to detect certain hardware emulators
|
* matches, this is needed to detect certain hardware emulators
|
||||||
* (qemu/kvm) that don't trap on the MSR access and always return 0s.
|
* (qemu/kvm) that don't trap on the MSR access and always return 0s.
|
||||||
*/
|
*/
|
||||||
reg = x86_pmu_event_addr(0);
|
reg = x86_pmu_event_addr(reg_safe);
|
||||||
if (rdmsrl_safe(reg, &val))
|
if (rdmsrl_safe(reg, &val))
|
||||||
goto msr_fail;
|
goto msr_fail;
|
||||||
val ^= 0xffffUL;
|
val ^= 0xffffUL;
|
||||||
|
@ -611,6 +625,7 @@ struct sched_state {
|
||||||
int event; /* event index */
|
int event; /* event index */
|
||||||
int counter; /* counter index */
|
int counter; /* counter index */
|
||||||
int unassigned; /* number of events to be assigned left */
|
int unassigned; /* number of events to be assigned left */
|
||||||
|
int nr_gp; /* number of GP counters used */
|
||||||
unsigned long used[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
|
unsigned long used[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -620,27 +635,29 @@ struct sched_state {
|
||||||
struct perf_sched {
|
struct perf_sched {
|
||||||
int max_weight;
|
int max_weight;
|
||||||
int max_events;
|
int max_events;
|
||||||
struct perf_event **events;
|
int max_gp;
|
||||||
struct sched_state state;
|
|
||||||
int saved_states;
|
int saved_states;
|
||||||
|
struct event_constraint **constraints;
|
||||||
|
struct sched_state state;
|
||||||
struct sched_state saved[SCHED_STATES_MAX];
|
struct sched_state saved[SCHED_STATES_MAX];
|
||||||
};
|
};
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Initialize interator that runs through all events and counters.
|
* Initialize interator that runs through all events and counters.
|
||||||
*/
|
*/
|
||||||
static void perf_sched_init(struct perf_sched *sched, struct perf_event **events,
|
static void perf_sched_init(struct perf_sched *sched, struct event_constraint **constraints,
|
||||||
int num, int wmin, int wmax)
|
int num, int wmin, int wmax, int gpmax)
|
||||||
{
|
{
|
||||||
int idx;
|
int idx;
|
||||||
|
|
||||||
memset(sched, 0, sizeof(*sched));
|
memset(sched, 0, sizeof(*sched));
|
||||||
sched->max_events = num;
|
sched->max_events = num;
|
||||||
sched->max_weight = wmax;
|
sched->max_weight = wmax;
|
||||||
sched->events = events;
|
sched->max_gp = gpmax;
|
||||||
|
sched->constraints = constraints;
|
||||||
|
|
||||||
for (idx = 0; idx < num; idx++) {
|
for (idx = 0; idx < num; idx++) {
|
||||||
if (events[idx]->hw.constraint->weight == wmin)
|
if (constraints[idx]->weight == wmin)
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -687,7 +704,7 @@ static bool __perf_sched_find_counter(struct perf_sched *sched)
|
||||||
if (sched->state.event >= sched->max_events)
|
if (sched->state.event >= sched->max_events)
|
||||||
return false;
|
return false;
|
||||||
|
|
||||||
c = sched->events[sched->state.event]->hw.constraint;
|
c = sched->constraints[sched->state.event];
|
||||||
/* Prefer fixed purpose counters */
|
/* Prefer fixed purpose counters */
|
||||||
if (c->idxmsk64 & (~0ULL << INTEL_PMC_IDX_FIXED)) {
|
if (c->idxmsk64 & (~0ULL << INTEL_PMC_IDX_FIXED)) {
|
||||||
idx = INTEL_PMC_IDX_FIXED;
|
idx = INTEL_PMC_IDX_FIXED;
|
||||||
|
@ -696,11 +713,16 @@ static bool __perf_sched_find_counter(struct perf_sched *sched)
|
||||||
goto done;
|
goto done;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Grab the first unused counter starting with idx */
|
/* Grab the first unused counter starting with idx */
|
||||||
idx = sched->state.counter;
|
idx = sched->state.counter;
|
||||||
for_each_set_bit_from(idx, c->idxmsk, INTEL_PMC_IDX_FIXED) {
|
for_each_set_bit_from(idx, c->idxmsk, INTEL_PMC_IDX_FIXED) {
|
||||||
if (!__test_and_set_bit(idx, sched->state.used))
|
if (!__test_and_set_bit(idx, sched->state.used)) {
|
||||||
|
if (sched->state.nr_gp++ >= sched->max_gp)
|
||||||
|
return false;
|
||||||
|
|
||||||
goto done;
|
goto done;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
return false;
|
return false;
|
||||||
|
@ -745,7 +767,7 @@ static bool perf_sched_next_event(struct perf_sched *sched)
|
||||||
if (sched->state.weight > sched->max_weight)
|
if (sched->state.weight > sched->max_weight)
|
||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
c = sched->events[sched->state.event]->hw.constraint;
|
c = sched->constraints[sched->state.event];
|
||||||
} while (c->weight != sched->state.weight);
|
} while (c->weight != sched->state.weight);
|
||||||
|
|
||||||
sched->state.counter = 0; /* start with first counter */
|
sched->state.counter = 0; /* start with first counter */
|
||||||
|
@ -756,12 +778,12 @@ static bool perf_sched_next_event(struct perf_sched *sched)
|
||||||
/*
|
/*
|
||||||
* Assign a counter for each event.
|
* Assign a counter for each event.
|
||||||
*/
|
*/
|
||||||
int perf_assign_events(struct perf_event **events, int n,
|
int perf_assign_events(struct event_constraint **constraints, int n,
|
||||||
int wmin, int wmax, int *assign)
|
int wmin, int wmax, int gpmax, int *assign)
|
||||||
{
|
{
|
||||||
struct perf_sched sched;
|
struct perf_sched sched;
|
||||||
|
|
||||||
perf_sched_init(&sched, events, n, wmin, wmax);
|
perf_sched_init(&sched, constraints, n, wmin, wmax, gpmax);
|
||||||
|
|
||||||
do {
|
do {
|
||||||
if (!perf_sched_find_counter(&sched))
|
if (!perf_sched_find_counter(&sched))
|
||||||
|
@ -788,9 +810,9 @@ int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign)
|
||||||
x86_pmu.start_scheduling(cpuc);
|
x86_pmu.start_scheduling(cpuc);
|
||||||
|
|
||||||
for (i = 0, wmin = X86_PMC_IDX_MAX, wmax = 0; i < n; i++) {
|
for (i = 0, wmin = X86_PMC_IDX_MAX, wmax = 0; i < n; i++) {
|
||||||
hwc = &cpuc->event_list[i]->hw;
|
cpuc->event_constraint[i] = NULL;
|
||||||
c = x86_pmu.get_event_constraints(cpuc, i, cpuc->event_list[i]);
|
c = x86_pmu.get_event_constraints(cpuc, i, cpuc->event_list[i]);
|
||||||
hwc->constraint = c;
|
cpuc->event_constraint[i] = c;
|
||||||
|
|
||||||
wmin = min(wmin, c->weight);
|
wmin = min(wmin, c->weight);
|
||||||
wmax = max(wmax, c->weight);
|
wmax = max(wmax, c->weight);
|
||||||
|
@ -801,7 +823,7 @@ int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign)
|
||||||
*/
|
*/
|
||||||
for (i = 0; i < n; i++) {
|
for (i = 0; i < n; i++) {
|
||||||
hwc = &cpuc->event_list[i]->hw;
|
hwc = &cpuc->event_list[i]->hw;
|
||||||
c = hwc->constraint;
|
c = cpuc->event_constraint[i];
|
||||||
|
|
||||||
/* never assigned */
|
/* never assigned */
|
||||||
if (hwc->idx == -1)
|
if (hwc->idx == -1)
|
||||||
|
@ -821,9 +843,26 @@ int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign)
|
||||||
}
|
}
|
||||||
|
|
||||||
/* slow path */
|
/* slow path */
|
||||||
if (i != n)
|
if (i != n) {
|
||||||
unsched = perf_assign_events(cpuc->event_list, n, wmin,
|
int gpmax = x86_pmu.num_counters;
|
||||||
wmax, assign);
|
|
||||||
|
/*
|
||||||
|
* Do not allow scheduling of more than half the available
|
||||||
|
* generic counters.
|
||||||
|
*
|
||||||
|
* This helps avoid counter starvation of sibling thread by
|
||||||
|
* ensuring at most half the counters cannot be in exclusive
|
||||||
|
* mode. There is no designated counters for the limits. Any
|
||||||
|
* N/2 counters can be used. This helps with events with
|
||||||
|
* specific counter constraints.
|
||||||
|
*/
|
||||||
|
if (is_ht_workaround_enabled() && !cpuc->is_fake &&
|
||||||
|
READ_ONCE(cpuc->excl_cntrs->exclusive_present))
|
||||||
|
gpmax /= 2;
|
||||||
|
|
||||||
|
unsched = perf_assign_events(cpuc->event_constraint, n, wmin,
|
||||||
|
wmax, gpmax, assign);
|
||||||
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* In case of success (unsched = 0), mark events as committed,
|
* In case of success (unsched = 0), mark events as committed,
|
||||||
|
@ -840,7 +879,7 @@ int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign)
|
||||||
e = cpuc->event_list[i];
|
e = cpuc->event_list[i];
|
||||||
e->hw.flags |= PERF_X86_EVENT_COMMITTED;
|
e->hw.flags |= PERF_X86_EVENT_COMMITTED;
|
||||||
if (x86_pmu.commit_scheduling)
|
if (x86_pmu.commit_scheduling)
|
||||||
x86_pmu.commit_scheduling(cpuc, e, assign[i]);
|
x86_pmu.commit_scheduling(cpuc, i, assign[i]);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1292,8 +1331,10 @@ static void x86_pmu_del(struct perf_event *event, int flags)
|
||||||
x86_pmu.put_event_constraints(cpuc, event);
|
x86_pmu.put_event_constraints(cpuc, event);
|
||||||
|
|
||||||
/* Delete the array entry. */
|
/* Delete the array entry. */
|
||||||
while (++i < cpuc->n_events)
|
while (++i < cpuc->n_events) {
|
||||||
cpuc->event_list[i-1] = cpuc->event_list[i];
|
cpuc->event_list[i-1] = cpuc->event_list[i];
|
||||||
|
cpuc->event_constraint[i-1] = cpuc->event_constraint[i];
|
||||||
|
}
|
||||||
--cpuc->n_events;
|
--cpuc->n_events;
|
||||||
|
|
||||||
perf_event_update_userpage(event);
|
perf_event_update_userpage(event);
|
||||||
|
|
|
@ -74,6 +74,7 @@ struct event_constraint {
|
||||||
#define PERF_X86_EVENT_EXCL 0x0040 /* HT exclusivity on counter */
|
#define PERF_X86_EVENT_EXCL 0x0040 /* HT exclusivity on counter */
|
||||||
#define PERF_X86_EVENT_DYNAMIC 0x0080 /* dynamic alloc'd constraint */
|
#define PERF_X86_EVENT_DYNAMIC 0x0080 /* dynamic alloc'd constraint */
|
||||||
#define PERF_X86_EVENT_RDPMC_ALLOWED 0x0100 /* grant rdpmc permission */
|
#define PERF_X86_EVENT_RDPMC_ALLOWED 0x0100 /* grant rdpmc permission */
|
||||||
|
#define PERF_X86_EVENT_EXCL_ACCT 0x0200 /* accounted EXCL event */
|
||||||
|
|
||||||
|
|
||||||
struct amd_nb {
|
struct amd_nb {
|
||||||
|
@ -134,8 +135,6 @@ enum intel_excl_state_type {
|
||||||
struct intel_excl_states {
|
struct intel_excl_states {
|
||||||
enum intel_excl_state_type init_state[X86_PMC_IDX_MAX];
|
enum intel_excl_state_type init_state[X86_PMC_IDX_MAX];
|
||||||
enum intel_excl_state_type state[X86_PMC_IDX_MAX];
|
enum intel_excl_state_type state[X86_PMC_IDX_MAX];
|
||||||
int num_alloc_cntrs;/* #counters allocated */
|
|
||||||
int max_alloc_cntrs;/* max #counters allowed */
|
|
||||||
bool sched_started; /* true if scheduling has started */
|
bool sched_started; /* true if scheduling has started */
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -144,6 +143,11 @@ struct intel_excl_cntrs {
|
||||||
|
|
||||||
struct intel_excl_states states[2];
|
struct intel_excl_states states[2];
|
||||||
|
|
||||||
|
union {
|
||||||
|
u16 has_exclusive[2];
|
||||||
|
u32 exclusive_present;
|
||||||
|
};
|
||||||
|
|
||||||
int refcnt; /* per-core: #HT threads */
|
int refcnt; /* per-core: #HT threads */
|
||||||
unsigned core_id; /* per-core: core id */
|
unsigned core_id; /* per-core: core id */
|
||||||
};
|
};
|
||||||
|
@ -172,7 +176,11 @@ struct cpu_hw_events {
|
||||||
added in the current transaction */
|
added in the current transaction */
|
||||||
int assign[X86_PMC_IDX_MAX]; /* event to counter assignment */
|
int assign[X86_PMC_IDX_MAX]; /* event to counter assignment */
|
||||||
u64 tags[X86_PMC_IDX_MAX];
|
u64 tags[X86_PMC_IDX_MAX];
|
||||||
|
|
||||||
struct perf_event *event_list[X86_PMC_IDX_MAX]; /* in enabled order */
|
struct perf_event *event_list[X86_PMC_IDX_MAX]; /* in enabled order */
|
||||||
|
struct event_constraint *event_constraint[X86_PMC_IDX_MAX];
|
||||||
|
|
||||||
|
int n_excl; /* the number of exclusive events */
|
||||||
|
|
||||||
unsigned int group_flag;
|
unsigned int group_flag;
|
||||||
int is_fake;
|
int is_fake;
|
||||||
|
@ -519,9 +527,7 @@ struct x86_pmu {
|
||||||
void (*put_event_constraints)(struct cpu_hw_events *cpuc,
|
void (*put_event_constraints)(struct cpu_hw_events *cpuc,
|
||||||
struct perf_event *event);
|
struct perf_event *event);
|
||||||
|
|
||||||
void (*commit_scheduling)(struct cpu_hw_events *cpuc,
|
void (*commit_scheduling)(struct cpu_hw_events *cpuc, int idx, int cntr);
|
||||||
struct perf_event *event,
|
|
||||||
int cntr);
|
|
||||||
|
|
||||||
void (*start_scheduling)(struct cpu_hw_events *cpuc);
|
void (*start_scheduling)(struct cpu_hw_events *cpuc);
|
||||||
|
|
||||||
|
@ -717,8 +723,8 @@ static inline void __x86_pmu_enable_event(struct hw_perf_event *hwc,
|
||||||
|
|
||||||
void x86_pmu_enable_all(int added);
|
void x86_pmu_enable_all(int added);
|
||||||
|
|
||||||
int perf_assign_events(struct perf_event **events, int n,
|
int perf_assign_events(struct event_constraint **constraints, int n,
|
||||||
int wmin, int wmax, int *assign);
|
int wmin, int wmax, int gpmax, int *assign);
|
||||||
int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign);
|
int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign);
|
||||||
|
|
||||||
void x86_pmu_stop(struct perf_event *event, int flags);
|
void x86_pmu_stop(struct perf_event *event, int flags);
|
||||||
|
@ -929,4 +935,8 @@ static inline struct intel_shared_regs *allocate_shared_regs(int cpu)
|
||||||
return NULL;
|
return NULL;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static inline int is_ht_workaround_enabled(void)
|
||||||
|
{
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
#endif /* CONFIG_CPU_SUP_INTEL */
|
#endif /* CONFIG_CPU_SUP_INTEL */
|
||||||
|
|
|
@ -1923,7 +1923,6 @@ intel_start_scheduling(struct cpu_hw_events *cpuc)
|
||||||
xl = &excl_cntrs->states[tid];
|
xl = &excl_cntrs->states[tid];
|
||||||
|
|
||||||
xl->sched_started = true;
|
xl->sched_started = true;
|
||||||
xl->num_alloc_cntrs = 0;
|
|
||||||
/*
|
/*
|
||||||
* lock shared state until we are done scheduling
|
* lock shared state until we are done scheduling
|
||||||
* in stop_event_scheduling()
|
* in stop_event_scheduling()
|
||||||
|
@ -2000,6 +1999,11 @@ intel_get_excl_constraints(struct cpu_hw_events *cpuc, struct perf_event *event,
|
||||||
* across HT threads
|
* across HT threads
|
||||||
*/
|
*/
|
||||||
is_excl = c->flags & PERF_X86_EVENT_EXCL;
|
is_excl = c->flags & PERF_X86_EVENT_EXCL;
|
||||||
|
if (is_excl && !(event->hw.flags & PERF_X86_EVENT_EXCL_ACCT)) {
|
||||||
|
event->hw.flags |= PERF_X86_EVENT_EXCL_ACCT;
|
||||||
|
if (!cpuc->n_excl++)
|
||||||
|
WRITE_ONCE(excl_cntrs->has_exclusive[tid], 1);
|
||||||
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* xl = state of current HT
|
* xl = state of current HT
|
||||||
|
@ -2008,18 +2012,6 @@ intel_get_excl_constraints(struct cpu_hw_events *cpuc, struct perf_event *event,
|
||||||
xl = &excl_cntrs->states[tid];
|
xl = &excl_cntrs->states[tid];
|
||||||
xlo = &excl_cntrs->states[o_tid];
|
xlo = &excl_cntrs->states[o_tid];
|
||||||
|
|
||||||
/*
|
|
||||||
* do not allow scheduling of more than max_alloc_cntrs
|
|
||||||
* which is set to half the available generic counters.
|
|
||||||
* this helps avoid counter starvation of sibling thread
|
|
||||||
* by ensuring at most half the counters cannot be in
|
|
||||||
* exclusive mode. There is not designated counters for the
|
|
||||||
* limits. Any N/2 counters can be used. This helps with
|
|
||||||
* events with specifix counter constraints
|
|
||||||
*/
|
|
||||||
if (xl->num_alloc_cntrs++ == xl->max_alloc_cntrs)
|
|
||||||
return &emptyconstraint;
|
|
||||||
|
|
||||||
cx = c;
|
cx = c;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
@ -2106,7 +2098,7 @@ static struct event_constraint *
|
||||||
intel_get_event_constraints(struct cpu_hw_events *cpuc, int idx,
|
intel_get_event_constraints(struct cpu_hw_events *cpuc, int idx,
|
||||||
struct perf_event *event)
|
struct perf_event *event)
|
||||||
{
|
{
|
||||||
struct event_constraint *c1 = event->hw.constraint;
|
struct event_constraint *c1 = cpuc->event_constraint[idx];
|
||||||
struct event_constraint *c2;
|
struct event_constraint *c2;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
@ -2150,6 +2142,11 @@ static void intel_put_excl_constraints(struct cpu_hw_events *cpuc,
|
||||||
|
|
||||||
xl = &excl_cntrs->states[tid];
|
xl = &excl_cntrs->states[tid];
|
||||||
xlo = &excl_cntrs->states[o_tid];
|
xlo = &excl_cntrs->states[o_tid];
|
||||||
|
if (hwc->flags & PERF_X86_EVENT_EXCL_ACCT) {
|
||||||
|
hwc->flags &= ~PERF_X86_EVENT_EXCL_ACCT;
|
||||||
|
if (!--cpuc->n_excl)
|
||||||
|
WRITE_ONCE(excl_cntrs->has_exclusive[tid], 0);
|
||||||
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* put_constraint may be called from x86_schedule_events()
|
* put_constraint may be called from x86_schedule_events()
|
||||||
|
@ -2188,8 +2185,6 @@ intel_put_shared_regs_event_constraints(struct cpu_hw_events *cpuc,
|
||||||
static void intel_put_event_constraints(struct cpu_hw_events *cpuc,
|
static void intel_put_event_constraints(struct cpu_hw_events *cpuc,
|
||||||
struct perf_event *event)
|
struct perf_event *event)
|
||||||
{
|
{
|
||||||
struct event_constraint *c = event->hw.constraint;
|
|
||||||
|
|
||||||
intel_put_shared_regs_event_constraints(cpuc, event);
|
intel_put_shared_regs_event_constraints(cpuc, event);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
@ -2197,19 +2192,14 @@ static void intel_put_event_constraints(struct cpu_hw_events *cpuc,
|
||||||
* all events are subject to and must call the
|
* all events are subject to and must call the
|
||||||
* put_excl_constraints() routine
|
* put_excl_constraints() routine
|
||||||
*/
|
*/
|
||||||
if (c && cpuc->excl_cntrs)
|
if (cpuc->excl_cntrs)
|
||||||
intel_put_excl_constraints(cpuc, event);
|
intel_put_excl_constraints(cpuc, event);
|
||||||
|
|
||||||
/* cleanup dynamic constraint */
|
|
||||||
if (c && (c->flags & PERF_X86_EVENT_DYNAMIC))
|
|
||||||
event->hw.constraint = NULL;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static void intel_commit_scheduling(struct cpu_hw_events *cpuc,
|
static void intel_commit_scheduling(struct cpu_hw_events *cpuc, int idx, int cntr)
|
||||||
struct perf_event *event, int cntr)
|
|
||||||
{
|
{
|
||||||
struct intel_excl_cntrs *excl_cntrs = cpuc->excl_cntrs;
|
struct intel_excl_cntrs *excl_cntrs = cpuc->excl_cntrs;
|
||||||
struct event_constraint *c = event->hw.constraint;
|
struct event_constraint *c = cpuc->event_constraint[idx];
|
||||||
struct intel_excl_states *xlo, *xl;
|
struct intel_excl_states *xlo, *xl;
|
||||||
int tid = cpuc->excl_thread_id;
|
int tid = cpuc->excl_thread_id;
|
||||||
int o_tid = 1 - tid;
|
int o_tid = 1 - tid;
|
||||||
|
@ -2639,8 +2629,6 @@ static void intel_pmu_cpu_starting(int cpu)
|
||||||
cpuc->lbr_sel = &cpuc->shared_regs->regs[EXTRA_REG_LBR];
|
cpuc->lbr_sel = &cpuc->shared_regs->regs[EXTRA_REG_LBR];
|
||||||
|
|
||||||
if (x86_pmu.flags & PMU_FL_EXCL_CNTRS) {
|
if (x86_pmu.flags & PMU_FL_EXCL_CNTRS) {
|
||||||
int h = x86_pmu.num_counters >> 1;
|
|
||||||
|
|
||||||
for_each_cpu(i, topology_thread_cpumask(cpu)) {
|
for_each_cpu(i, topology_thread_cpumask(cpu)) {
|
||||||
struct intel_excl_cntrs *c;
|
struct intel_excl_cntrs *c;
|
||||||
|
|
||||||
|
@ -2654,11 +2642,6 @@ static void intel_pmu_cpu_starting(int cpu)
|
||||||
}
|
}
|
||||||
cpuc->excl_cntrs->core_id = core_id;
|
cpuc->excl_cntrs->core_id = core_id;
|
||||||
cpuc->excl_cntrs->refcnt++;
|
cpuc->excl_cntrs->refcnt++;
|
||||||
/*
|
|
||||||
* set hard limit to half the number of generic counters
|
|
||||||
*/
|
|
||||||
cpuc->excl_cntrs->states[0].max_alloc_cntrs = h;
|
|
||||||
cpuc->excl_cntrs->states[1].max_alloc_cntrs = h;
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -706,9 +706,9 @@ void intel_pmu_pebs_disable(struct perf_event *event)
|
||||||
|
|
||||||
cpuc->pebs_enabled &= ~(1ULL << hwc->idx);
|
cpuc->pebs_enabled &= ~(1ULL << hwc->idx);
|
||||||
|
|
||||||
if (event->hw.constraint->flags & PERF_X86_EVENT_PEBS_LDLAT)
|
if (event->hw.flags & PERF_X86_EVENT_PEBS_LDLAT)
|
||||||
cpuc->pebs_enabled &= ~(1ULL << (hwc->idx + 32));
|
cpuc->pebs_enabled &= ~(1ULL << (hwc->idx + 32));
|
||||||
else if (event->hw.constraint->flags & PERF_X86_EVENT_PEBS_ST)
|
else if (event->hw.flags & PERF_X86_EVENT_PEBS_ST)
|
||||||
cpuc->pebs_enabled &= ~(1ULL << 63);
|
cpuc->pebs_enabled &= ~(1ULL << 63);
|
||||||
|
|
||||||
if (cpuc->enabled)
|
if (cpuc->enabled)
|
||||||
|
|
|
@ -151,7 +151,7 @@ static int __init pt_pmu_hw_init(void)
|
||||||
|
|
||||||
de_attr->attr.attr.name = pt_caps[i].name;
|
de_attr->attr.attr.name = pt_caps[i].name;
|
||||||
|
|
||||||
sysfs_attr_init(&de_attrs->attr.attr);
|
sysfs_attr_init(&de_attr->attr.attr);
|
||||||
|
|
||||||
de_attr->attr.attr.mode = S_IRUGO;
|
de_attr->attr.attr.mode = S_IRUGO;
|
||||||
de_attr->attr.show = pt_cap_show;
|
de_attr->attr.show = pt_cap_show;
|
||||||
|
@ -615,7 +615,8 @@ static int pt_buffer_reset_markers(struct pt_buffer *buf,
|
||||||
struct perf_output_handle *handle)
|
struct perf_output_handle *handle)
|
||||||
|
|
||||||
{
|
{
|
||||||
unsigned long idx, npages, end;
|
unsigned long head = local64_read(&buf->head);
|
||||||
|
unsigned long idx, npages, wakeup;
|
||||||
|
|
||||||
if (buf->snapshot)
|
if (buf->snapshot)
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -634,17 +635,26 @@ static int pt_buffer_reset_markers(struct pt_buffer *buf,
|
||||||
buf->topa_index[buf->stop_pos]->stop = 0;
|
buf->topa_index[buf->stop_pos]->stop = 0;
|
||||||
buf->topa_index[buf->intr_pos]->intr = 0;
|
buf->topa_index[buf->intr_pos]->intr = 0;
|
||||||
|
|
||||||
if (pt_cap_get(PT_CAP_topa_multiple_entries)) {
|
/* how many pages till the STOP marker */
|
||||||
npages = (handle->size + 1) >> PAGE_SHIFT;
|
npages = handle->size >> PAGE_SHIFT;
|
||||||
end = (local64_read(&buf->head) >> PAGE_SHIFT) + npages;
|
|
||||||
/*if (end > handle->wakeup >> PAGE_SHIFT)
|
/* if it's on a page boundary, fill up one more page */
|
||||||
end = handle->wakeup >> PAGE_SHIFT;*/
|
if (!offset_in_page(head + handle->size + 1))
|
||||||
idx = end & (buf->nr_pages - 1);
|
npages++;
|
||||||
buf->stop_pos = idx;
|
|
||||||
idx = (local64_read(&buf->head) >> PAGE_SHIFT) + npages - 1;
|
idx = (head >> PAGE_SHIFT) + npages;
|
||||||
idx &= buf->nr_pages - 1;
|
idx &= buf->nr_pages - 1;
|
||||||
buf->intr_pos = idx;
|
buf->stop_pos = idx;
|
||||||
}
|
|
||||||
|
wakeup = handle->wakeup >> PAGE_SHIFT;
|
||||||
|
|
||||||
|
/* in the worst case, wake up the consumer one page before hard stop */
|
||||||
|
idx = (head >> PAGE_SHIFT) + npages - 1;
|
||||||
|
if (idx > wakeup)
|
||||||
|
idx = wakeup;
|
||||||
|
|
||||||
|
idx &= buf->nr_pages - 1;
|
||||||
|
buf->intr_pos = idx;
|
||||||
|
|
||||||
buf->topa_index[buf->stop_pos]->stop = 1;
|
buf->topa_index[buf->stop_pos]->stop = 1;
|
||||||
buf->topa_index[buf->intr_pos]->intr = 1;
|
buf->topa_index[buf->intr_pos]->intr = 1;
|
||||||
|
|
|
@ -365,9 +365,8 @@ static int uncore_assign_events(struct intel_uncore_box *box, int assign[], int
|
||||||
bitmap_zero(used_mask, UNCORE_PMC_IDX_MAX);
|
bitmap_zero(used_mask, UNCORE_PMC_IDX_MAX);
|
||||||
|
|
||||||
for (i = 0, wmin = UNCORE_PMC_IDX_MAX, wmax = 0; i < n; i++) {
|
for (i = 0, wmin = UNCORE_PMC_IDX_MAX, wmax = 0; i < n; i++) {
|
||||||
hwc = &box->event_list[i]->hw;
|
|
||||||
c = uncore_get_event_constraint(box, box->event_list[i]);
|
c = uncore_get_event_constraint(box, box->event_list[i]);
|
||||||
hwc->constraint = c;
|
box->event_constraint[i] = c;
|
||||||
wmin = min(wmin, c->weight);
|
wmin = min(wmin, c->weight);
|
||||||
wmax = max(wmax, c->weight);
|
wmax = max(wmax, c->weight);
|
||||||
}
|
}
|
||||||
|
@ -375,7 +374,7 @@ static int uncore_assign_events(struct intel_uncore_box *box, int assign[], int
|
||||||
/* fastpath, try to reuse previous register */
|
/* fastpath, try to reuse previous register */
|
||||||
for (i = 0; i < n; i++) {
|
for (i = 0; i < n; i++) {
|
||||||
hwc = &box->event_list[i]->hw;
|
hwc = &box->event_list[i]->hw;
|
||||||
c = hwc->constraint;
|
c = box->event_constraint[i];
|
||||||
|
|
||||||
/* never assigned */
|
/* never assigned */
|
||||||
if (hwc->idx == -1)
|
if (hwc->idx == -1)
|
||||||
|
@ -395,8 +394,8 @@ static int uncore_assign_events(struct intel_uncore_box *box, int assign[], int
|
||||||
}
|
}
|
||||||
/* slow path */
|
/* slow path */
|
||||||
if (i != n)
|
if (i != n)
|
||||||
ret = perf_assign_events(box->event_list, n,
|
ret = perf_assign_events(box->event_constraint, n,
|
||||||
wmin, wmax, assign);
|
wmin, wmax, n, assign);
|
||||||
|
|
||||||
if (!assign || ret) {
|
if (!assign || ret) {
|
||||||
for (i = 0; i < n; i++)
|
for (i = 0; i < n; i++)
|
||||||
|
|
|
@ -97,6 +97,7 @@ struct intel_uncore_box {
|
||||||
atomic_t refcnt;
|
atomic_t refcnt;
|
||||||
struct perf_event *events[UNCORE_PMC_IDX_MAX];
|
struct perf_event *events[UNCORE_PMC_IDX_MAX];
|
||||||
struct perf_event *event_list[UNCORE_PMC_IDX_MAX];
|
struct perf_event *event_list[UNCORE_PMC_IDX_MAX];
|
||||||
|
struct event_constraint *event_constraint[UNCORE_PMC_IDX_MAX];
|
||||||
unsigned long active_mask[BITS_TO_LONGS(UNCORE_PMC_IDX_MAX)];
|
unsigned long active_mask[BITS_TO_LONGS(UNCORE_PMC_IDX_MAX)];
|
||||||
u64 tags[UNCORE_PMC_IDX_MAX];
|
u64 tags[UNCORE_PMC_IDX_MAX];
|
||||||
struct pci_dev *pci_dev;
|
struct pci_dev *pci_dev;
|
||||||
|
|
|
@ -167,7 +167,7 @@ asmlinkage __visible void __init x86_64_start_kernel(char * real_mode_data)
|
||||||
clear_bss();
|
clear_bss();
|
||||||
|
|
||||||
for (i = 0; i < NUM_EXCEPTION_VECTORS; i++)
|
for (i = 0; i < NUM_EXCEPTION_VECTORS; i++)
|
||||||
set_intr_gate(i, early_idt_handlers[i]);
|
set_intr_gate(i, early_idt_handler_array[i]);
|
||||||
load_idt((const struct desc_ptr *)&idt_descr);
|
load_idt((const struct desc_ptr *)&idt_descr);
|
||||||
|
|
||||||
copy_bootdata(__va(real_mode_data));
|
copy_bootdata(__va(real_mode_data));
|
||||||
|
|
|
@ -478,21 +478,22 @@ is486:
|
||||||
__INIT
|
__INIT
|
||||||
setup_once:
|
setup_once:
|
||||||
/*
|
/*
|
||||||
* Set up a idt with 256 entries pointing to ignore_int,
|
* Set up a idt with 256 interrupt gates that push zero if there
|
||||||
* interrupt gates. It doesn't actually load idt - that needs
|
* is no error code and then jump to early_idt_handler_common.
|
||||||
* to be done on each CPU. Interrupts are enabled elsewhere,
|
* It doesn't actually load the idt - that needs to be done on
|
||||||
* when we can be relatively sure everything is ok.
|
* each CPU. Interrupts are enabled elsewhere, when we can be
|
||||||
|
* relatively sure everything is ok.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
movl $idt_table,%edi
|
movl $idt_table,%edi
|
||||||
movl $early_idt_handlers,%eax
|
movl $early_idt_handler_array,%eax
|
||||||
movl $NUM_EXCEPTION_VECTORS,%ecx
|
movl $NUM_EXCEPTION_VECTORS,%ecx
|
||||||
1:
|
1:
|
||||||
movl %eax,(%edi)
|
movl %eax,(%edi)
|
||||||
movl %eax,4(%edi)
|
movl %eax,4(%edi)
|
||||||
/* interrupt gate, dpl=0, present */
|
/* interrupt gate, dpl=0, present */
|
||||||
movl $(0x8E000000 + __KERNEL_CS),2(%edi)
|
movl $(0x8E000000 + __KERNEL_CS),2(%edi)
|
||||||
addl $9,%eax
|
addl $EARLY_IDT_HANDLER_SIZE,%eax
|
||||||
addl $8,%edi
|
addl $8,%edi
|
||||||
loop 1b
|
loop 1b
|
||||||
|
|
||||||
|
@ -524,26 +525,28 @@ setup_once:
|
||||||
andl $0,setup_once_ref /* Once is enough, thanks */
|
andl $0,setup_once_ref /* Once is enough, thanks */
|
||||||
ret
|
ret
|
||||||
|
|
||||||
ENTRY(early_idt_handlers)
|
ENTRY(early_idt_handler_array)
|
||||||
# 36(%esp) %eflags
|
# 36(%esp) %eflags
|
||||||
# 32(%esp) %cs
|
# 32(%esp) %cs
|
||||||
# 28(%esp) %eip
|
# 28(%esp) %eip
|
||||||
# 24(%rsp) error code
|
# 24(%rsp) error code
|
||||||
i = 0
|
i = 0
|
||||||
.rept NUM_EXCEPTION_VECTORS
|
.rept NUM_EXCEPTION_VECTORS
|
||||||
.if (EXCEPTION_ERRCODE_MASK >> i) & 1
|
.ifeq (EXCEPTION_ERRCODE_MASK >> i) & 1
|
||||||
ASM_NOP2
|
|
||||||
.else
|
|
||||||
pushl $0 # Dummy error code, to make stack frame uniform
|
pushl $0 # Dummy error code, to make stack frame uniform
|
||||||
.endif
|
.endif
|
||||||
pushl $i # 20(%esp) Vector number
|
pushl $i # 20(%esp) Vector number
|
||||||
jmp early_idt_handler
|
jmp early_idt_handler_common
|
||||||
i = i + 1
|
i = i + 1
|
||||||
|
.fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc
|
||||||
.endr
|
.endr
|
||||||
ENDPROC(early_idt_handlers)
|
ENDPROC(early_idt_handler_array)
|
||||||
|
|
||||||
/* This is global to keep gas from relaxing the jumps */
|
early_idt_handler_common:
|
||||||
ENTRY(early_idt_handler)
|
/*
|
||||||
|
* The stack is the hardware frame, an error code or zero, and the
|
||||||
|
* vector number.
|
||||||
|
*/
|
||||||
cld
|
cld
|
||||||
|
|
||||||
cmpl $2,(%esp) # X86_TRAP_NMI
|
cmpl $2,(%esp) # X86_TRAP_NMI
|
||||||
|
@ -603,7 +606,7 @@ ex_entry:
|
||||||
is_nmi:
|
is_nmi:
|
||||||
addl $8,%esp /* drop vector number and error code */
|
addl $8,%esp /* drop vector number and error code */
|
||||||
iret
|
iret
|
||||||
ENDPROC(early_idt_handler)
|
ENDPROC(early_idt_handler_common)
|
||||||
|
|
||||||
/* This is the default interrupt "handler" :-) */
|
/* This is the default interrupt "handler" :-) */
|
||||||
ALIGN
|
ALIGN
|
||||||
|
|
|
@ -321,26 +321,28 @@ bad_address:
|
||||||
jmp bad_address
|
jmp bad_address
|
||||||
|
|
||||||
__INIT
|
__INIT
|
||||||
.globl early_idt_handlers
|
ENTRY(early_idt_handler_array)
|
||||||
early_idt_handlers:
|
|
||||||
# 104(%rsp) %rflags
|
# 104(%rsp) %rflags
|
||||||
# 96(%rsp) %cs
|
# 96(%rsp) %cs
|
||||||
# 88(%rsp) %rip
|
# 88(%rsp) %rip
|
||||||
# 80(%rsp) error code
|
# 80(%rsp) error code
|
||||||
i = 0
|
i = 0
|
||||||
.rept NUM_EXCEPTION_VECTORS
|
.rept NUM_EXCEPTION_VECTORS
|
||||||
.if (EXCEPTION_ERRCODE_MASK >> i) & 1
|
.ifeq (EXCEPTION_ERRCODE_MASK >> i) & 1
|
||||||
ASM_NOP2
|
|
||||||
.else
|
|
||||||
pushq $0 # Dummy error code, to make stack frame uniform
|
pushq $0 # Dummy error code, to make stack frame uniform
|
||||||
.endif
|
.endif
|
||||||
pushq $i # 72(%rsp) Vector number
|
pushq $i # 72(%rsp) Vector number
|
||||||
jmp early_idt_handler
|
jmp early_idt_handler_common
|
||||||
i = i + 1
|
i = i + 1
|
||||||
|
.fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc
|
||||||
.endr
|
.endr
|
||||||
|
ENDPROC(early_idt_handler_array)
|
||||||
|
|
||||||
/* This is global to keep gas from relaxing the jumps */
|
early_idt_handler_common:
|
||||||
ENTRY(early_idt_handler)
|
/*
|
||||||
|
* The stack is the hardware frame, an error code or zero, and the
|
||||||
|
* vector number.
|
||||||
|
*/
|
||||||
cld
|
cld
|
||||||
|
|
||||||
cmpl $2,(%rsp) # X86_TRAP_NMI
|
cmpl $2,(%rsp) # X86_TRAP_NMI
|
||||||
|
@ -412,7 +414,7 @@ ENTRY(early_idt_handler)
|
||||||
is_nmi:
|
is_nmi:
|
||||||
addq $16,%rsp # drop vector number and error code
|
addq $16,%rsp # drop vector number and error code
|
||||||
INTERRUPT_RETURN
|
INTERRUPT_RETURN
|
||||||
ENDPROC(early_idt_handler)
|
ENDPROC(early_idt_handler_common)
|
||||||
|
|
||||||
__INITDATA
|
__INITDATA
|
||||||
|
|
||||||
|
|
|
@ -653,7 +653,6 @@ void del_gendisk(struct gendisk *disk)
|
||||||
disk->flags &= ~GENHD_FL_UP;
|
disk->flags &= ~GENHD_FL_UP;
|
||||||
|
|
||||||
sysfs_remove_link(&disk_to_dev(disk)->kobj, "bdi");
|
sysfs_remove_link(&disk_to_dev(disk)->kobj, "bdi");
|
||||||
bdi_unregister(&disk->queue->backing_dev_info);
|
|
||||||
blk_unregister_queue(disk);
|
blk_unregister_queue(disk);
|
||||||
blk_unregister_region(disk_devt(disk), disk->minors);
|
blk_unregister_region(disk_devt(disk), disk->minors);
|
||||||
|
|
||||||
|
|
|
@ -179,7 +179,7 @@ static int detect_cache_attributes(unsigned int cpu)
|
||||||
{
|
{
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
if (init_cache_level(cpu))
|
if (init_cache_level(cpu) || !cache_leaves(cpu))
|
||||||
return -ENOENT;
|
return -ENOENT;
|
||||||
|
|
||||||
per_cpu_cacheinfo(cpu) = kcalloc(cache_leaves(cpu),
|
per_cpu_cacheinfo(cpu) = kcalloc(cache_leaves(cpu),
|
||||||
|
|
|
@ -8,6 +8,7 @@
|
||||||
#include <linux/device.h>
|
#include <linux/device.h>
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <linux/memory.h>
|
#include <linux/memory.h>
|
||||||
|
#include <linux/of.h>
|
||||||
|
|
||||||
#include "base.h"
|
#include "base.h"
|
||||||
|
|
||||||
|
@ -34,4 +35,5 @@ void __init driver_init(void)
|
||||||
cpu_dev_init();
|
cpu_dev_init();
|
||||||
memory_dev_init();
|
memory_dev_init();
|
||||||
container_dev_init();
|
container_dev_init();
|
||||||
|
of_core_init();
|
||||||
}
|
}
|
||||||
|
|
|
@ -1750,6 +1750,7 @@ static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
|
||||||
struct nvme_iod *iod;
|
struct nvme_iod *iod;
|
||||||
dma_addr_t meta_dma = 0;
|
dma_addr_t meta_dma = 0;
|
||||||
void *meta = NULL;
|
void *meta = NULL;
|
||||||
|
void __user *metadata;
|
||||||
|
|
||||||
if (copy_from_user(&io, uio, sizeof(io)))
|
if (copy_from_user(&io, uio, sizeof(io)))
|
||||||
return -EFAULT;
|
return -EFAULT;
|
||||||
|
@ -1763,6 +1764,8 @@ static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
|
||||||
meta_len = 0;
|
meta_len = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
metadata = (void __user *)(unsigned long)io.metadata;
|
||||||
|
|
||||||
write = io.opcode & 1;
|
write = io.opcode & 1;
|
||||||
|
|
||||||
switch (io.opcode) {
|
switch (io.opcode) {
|
||||||
|
@ -1786,13 +1789,13 @@ static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
|
||||||
if (meta_len) {
|
if (meta_len) {
|
||||||
meta = dma_alloc_coherent(&dev->pci_dev->dev, meta_len,
|
meta = dma_alloc_coherent(&dev->pci_dev->dev, meta_len,
|
||||||
&meta_dma, GFP_KERNEL);
|
&meta_dma, GFP_KERNEL);
|
||||||
|
|
||||||
if (!meta) {
|
if (!meta) {
|
||||||
status = -ENOMEM;
|
status = -ENOMEM;
|
||||||
goto unmap;
|
goto unmap;
|
||||||
}
|
}
|
||||||
if (write) {
|
if (write) {
|
||||||
if (copy_from_user(meta, (void __user *)io.metadata,
|
if (copy_from_user(meta, metadata, meta_len)) {
|
||||||
meta_len)) {
|
|
||||||
status = -EFAULT;
|
status = -EFAULT;
|
||||||
goto unmap;
|
goto unmap;
|
||||||
}
|
}
|
||||||
|
@ -1819,8 +1822,7 @@ static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
|
||||||
nvme_free_iod(dev, iod);
|
nvme_free_iod(dev, iod);
|
||||||
if (meta) {
|
if (meta) {
|
||||||
if (status == NVME_SC_SUCCESS && !write) {
|
if (status == NVME_SC_SUCCESS && !write) {
|
||||||
if (copy_to_user((void __user *)io.metadata, meta,
|
if (copy_to_user(metadata, meta, meta_len))
|
||||||
meta_len))
|
|
||||||
status = -EFAULT;
|
status = -EFAULT;
|
||||||
}
|
}
|
||||||
dma_free_coherent(&dev->pci_dev->dev, meta_len, meta, meta_dma);
|
dma_free_coherent(&dev->pci_dev->dev, meta_len, meta, meta_dma);
|
||||||
|
|
|
@ -384,7 +384,10 @@ static int hsu_dma_terminate_all(struct dma_chan *chan)
|
||||||
spin_lock_irqsave(&hsuc->vchan.lock, flags);
|
spin_lock_irqsave(&hsuc->vchan.lock, flags);
|
||||||
|
|
||||||
hsu_dma_stop_channel(hsuc);
|
hsu_dma_stop_channel(hsuc);
|
||||||
hsuc->desc = NULL;
|
if (hsuc->desc) {
|
||||||
|
hsu_dma_desc_free(&hsuc->desc->vdesc);
|
||||||
|
hsuc->desc = NULL;
|
||||||
|
}
|
||||||
|
|
||||||
vchan_get_all_descriptors(&hsuc->vchan, &head);
|
vchan_get_all_descriptors(&hsuc->vchan, &head);
|
||||||
spin_unlock_irqrestore(&hsuc->vchan.lock, flags);
|
spin_unlock_irqrestore(&hsuc->vchan.lock, flags);
|
||||||
|
|
|
@ -2127,6 +2127,7 @@ static int pl330_terminate_all(struct dma_chan *chan)
|
||||||
struct pl330_dmac *pl330 = pch->dmac;
|
struct pl330_dmac *pl330 = pch->dmac;
|
||||||
LIST_HEAD(list);
|
LIST_HEAD(list);
|
||||||
|
|
||||||
|
pm_runtime_get_sync(pl330->ddma.dev);
|
||||||
spin_lock_irqsave(&pch->lock, flags);
|
spin_lock_irqsave(&pch->lock, flags);
|
||||||
spin_lock(&pl330->lock);
|
spin_lock(&pl330->lock);
|
||||||
_stop(pch->thread);
|
_stop(pch->thread);
|
||||||
|
@ -2151,6 +2152,8 @@ static int pl330_terminate_all(struct dma_chan *chan)
|
||||||
list_splice_tail_init(&pch->work_list, &pl330->desc_pool);
|
list_splice_tail_init(&pch->work_list, &pl330->desc_pool);
|
||||||
list_splice_tail_init(&pch->completed_list, &pl330->desc_pool);
|
list_splice_tail_init(&pch->completed_list, &pl330->desc_pool);
|
||||||
spin_unlock_irqrestore(&pch->lock, flags);
|
spin_unlock_irqrestore(&pch->lock, flags);
|
||||||
|
pm_runtime_mark_last_busy(pl330->ddma.dev);
|
||||||
|
pm_runtime_put_autosuspend(pl330->ddma.dev);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
|
@ -186,8 +186,20 @@ struct ibft_kobject {
|
||||||
|
|
||||||
static struct iscsi_boot_kset *boot_kset;
|
static struct iscsi_boot_kset *boot_kset;
|
||||||
|
|
||||||
|
/* fully null address */
|
||||||
static const char nulls[16];
|
static const char nulls[16];
|
||||||
|
|
||||||
|
/* IPv4-mapped IPv6 ::ffff:0.0.0.0 */
|
||||||
|
static const char mapped_nulls[16] = { 0x00, 0x00, 0x00, 0x00,
|
||||||
|
0x00, 0x00, 0x00, 0x00,
|
||||||
|
0x00, 0x00, 0xff, 0xff,
|
||||||
|
0x00, 0x00, 0x00, 0x00 };
|
||||||
|
|
||||||
|
static int address_not_null(u8 *ip)
|
||||||
|
{
|
||||||
|
return (memcmp(ip, nulls, 16) && memcmp(ip, mapped_nulls, 16));
|
||||||
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Helper functions to parse data properly.
|
* Helper functions to parse data properly.
|
||||||
*/
|
*/
|
||||||
|
@ -445,7 +457,7 @@ static umode_t ibft_check_nic_for(void *data, int type)
|
||||||
rc = S_IRUGO;
|
rc = S_IRUGO;
|
||||||
break;
|
break;
|
||||||
case ISCSI_BOOT_ETH_IP_ADDR:
|
case ISCSI_BOOT_ETH_IP_ADDR:
|
||||||
if (memcmp(nic->ip_addr, nulls, sizeof(nic->ip_addr)))
|
if (address_not_null(nic->ip_addr))
|
||||||
rc = S_IRUGO;
|
rc = S_IRUGO;
|
||||||
break;
|
break;
|
||||||
case ISCSI_BOOT_ETH_SUBNET_MASK:
|
case ISCSI_BOOT_ETH_SUBNET_MASK:
|
||||||
|
@ -456,21 +468,19 @@ static umode_t ibft_check_nic_for(void *data, int type)
|
||||||
rc = S_IRUGO;
|
rc = S_IRUGO;
|
||||||
break;
|
break;
|
||||||
case ISCSI_BOOT_ETH_GATEWAY:
|
case ISCSI_BOOT_ETH_GATEWAY:
|
||||||
if (memcmp(nic->gateway, nulls, sizeof(nic->gateway)))
|
if (address_not_null(nic->gateway))
|
||||||
rc = S_IRUGO;
|
rc = S_IRUGO;
|
||||||
break;
|
break;
|
||||||
case ISCSI_BOOT_ETH_PRIMARY_DNS:
|
case ISCSI_BOOT_ETH_PRIMARY_DNS:
|
||||||
if (memcmp(nic->primary_dns, nulls,
|
if (address_not_null(nic->primary_dns))
|
||||||
sizeof(nic->primary_dns)))
|
|
||||||
rc = S_IRUGO;
|
rc = S_IRUGO;
|
||||||
break;
|
break;
|
||||||
case ISCSI_BOOT_ETH_SECONDARY_DNS:
|
case ISCSI_BOOT_ETH_SECONDARY_DNS:
|
||||||
if (memcmp(nic->secondary_dns, nulls,
|
if (address_not_null(nic->secondary_dns))
|
||||||
sizeof(nic->secondary_dns)))
|
|
||||||
rc = S_IRUGO;
|
rc = S_IRUGO;
|
||||||
break;
|
break;
|
||||||
case ISCSI_BOOT_ETH_DHCP:
|
case ISCSI_BOOT_ETH_DHCP:
|
||||||
if (memcmp(nic->dhcp, nulls, sizeof(nic->dhcp)))
|
if (address_not_null(nic->dhcp))
|
||||||
rc = S_IRUGO;
|
rc = S_IRUGO;
|
||||||
break;
|
break;
|
||||||
case ISCSI_BOOT_ETH_VLAN:
|
case ISCSI_BOOT_ETH_VLAN:
|
||||||
|
@ -536,23 +546,19 @@ static umode_t __init ibft_check_initiator_for(void *data, int type)
|
||||||
rc = S_IRUGO;
|
rc = S_IRUGO;
|
||||||
break;
|
break;
|
||||||
case ISCSI_BOOT_INI_ISNS_SERVER:
|
case ISCSI_BOOT_INI_ISNS_SERVER:
|
||||||
if (memcmp(init->isns_server, nulls,
|
if (address_not_null(init->isns_server))
|
||||||
sizeof(init->isns_server)))
|
|
||||||
rc = S_IRUGO;
|
rc = S_IRUGO;
|
||||||
break;
|
break;
|
||||||
case ISCSI_BOOT_INI_SLP_SERVER:
|
case ISCSI_BOOT_INI_SLP_SERVER:
|
||||||
if (memcmp(init->slp_server, nulls,
|
if (address_not_null(init->slp_server))
|
||||||
sizeof(init->slp_server)))
|
|
||||||
rc = S_IRUGO;
|
rc = S_IRUGO;
|
||||||
break;
|
break;
|
||||||
case ISCSI_BOOT_INI_PRI_RADIUS_SERVER:
|
case ISCSI_BOOT_INI_PRI_RADIUS_SERVER:
|
||||||
if (memcmp(init->pri_radius_server, nulls,
|
if (address_not_null(init->pri_radius_server))
|
||||||
sizeof(init->pri_radius_server)))
|
|
||||||
rc = S_IRUGO;
|
rc = S_IRUGO;
|
||||||
break;
|
break;
|
||||||
case ISCSI_BOOT_INI_SEC_RADIUS_SERVER:
|
case ISCSI_BOOT_INI_SEC_RADIUS_SERVER:
|
||||||
if (memcmp(init->sec_radius_server, nulls,
|
if (address_not_null(init->sec_radius_server))
|
||||||
sizeof(init->sec_radius_server)))
|
|
||||||
rc = S_IRUGO;
|
rc = S_IRUGO;
|
||||||
break;
|
break;
|
||||||
case ISCSI_BOOT_INI_INITIATOR_NAME:
|
case ISCSI_BOOT_INI_INITIATOR_NAME:
|
||||||
|
|
|
@ -684,8 +684,6 @@ static ssize_t node_show(struct kobject *kobj, struct attribute *attr,
|
||||||
dev->node_props.cpu_core_id_base);
|
dev->node_props.cpu_core_id_base);
|
||||||
sysfs_show_32bit_prop(buffer, "simd_id_base",
|
sysfs_show_32bit_prop(buffer, "simd_id_base",
|
||||||
dev->node_props.simd_id_base);
|
dev->node_props.simd_id_base);
|
||||||
sysfs_show_32bit_prop(buffer, "capability",
|
|
||||||
dev->node_props.capability);
|
|
||||||
sysfs_show_32bit_prop(buffer, "max_waves_per_simd",
|
sysfs_show_32bit_prop(buffer, "max_waves_per_simd",
|
||||||
dev->node_props.max_waves_per_simd);
|
dev->node_props.max_waves_per_simd);
|
||||||
sysfs_show_32bit_prop(buffer, "lds_size_in_kb",
|
sysfs_show_32bit_prop(buffer, "lds_size_in_kb",
|
||||||
|
@ -736,6 +734,8 @@ static ssize_t node_show(struct kobject *kobj, struct attribute *attr,
|
||||||
dev->gpu->kfd2kgd->get_fw_version(
|
dev->gpu->kfd2kgd->get_fw_version(
|
||||||
dev->gpu->kgd,
|
dev->gpu->kgd,
|
||||||
KGD_ENGINE_MEC1));
|
KGD_ENGINE_MEC1));
|
||||||
|
sysfs_show_32bit_prop(buffer, "capability",
|
||||||
|
dev->node_props.capability);
|
||||||
}
|
}
|
||||||
|
|
||||||
return sysfs_show_32bit_prop(buffer, "max_engine_clk_ccompute",
|
return sysfs_show_32bit_prop(buffer, "max_engine_clk_ccompute",
|
||||||
|
|
|
@ -217,7 +217,7 @@ static ssize_t status_store(struct device *device,
|
||||||
|
|
||||||
mutex_unlock(&dev->mode_config.mutex);
|
mutex_unlock(&dev->mode_config.mutex);
|
||||||
|
|
||||||
return ret;
|
return ret ? ret : count;
|
||||||
}
|
}
|
||||||
|
|
||||||
static ssize_t status_show(struct device *device,
|
static ssize_t status_show(struct device *device,
|
||||||
|
|
|
@ -1667,12 +1667,15 @@ static int i915_sr_status(struct seq_file *m, void *unused)
|
||||||
|
|
||||||
if (HAS_PCH_SPLIT(dev))
|
if (HAS_PCH_SPLIT(dev))
|
||||||
sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
|
sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
|
||||||
else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
|
else if (IS_CRESTLINE(dev) || IS_G4X(dev) ||
|
||||||
|
IS_I945G(dev) || IS_I945GM(dev))
|
||||||
sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
|
sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
|
||||||
else if (IS_I915GM(dev))
|
else if (IS_I915GM(dev))
|
||||||
sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
|
sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
|
||||||
else if (IS_PINEVIEW(dev))
|
else if (IS_PINEVIEW(dev))
|
||||||
sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
|
sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
|
||||||
|
else if (IS_VALLEYVIEW(dev))
|
||||||
|
sr_enabled = I915_READ(FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;
|
||||||
|
|
||||||
intel_runtime_pm_put(dev_priv);
|
intel_runtime_pm_put(dev_priv);
|
||||||
|
|
||||||
|
|
|
@ -2656,9 +2656,6 @@ void i915_gem_reset(struct drm_device *dev)
|
||||||
void
|
void
|
||||||
i915_gem_retire_requests_ring(struct intel_engine_cs *ring)
|
i915_gem_retire_requests_ring(struct intel_engine_cs *ring)
|
||||||
{
|
{
|
||||||
if (list_empty(&ring->request_list))
|
|
||||||
return;
|
|
||||||
|
|
||||||
WARN_ON(i915_verify_lists(ring->dev));
|
WARN_ON(i915_verify_lists(ring->dev));
|
||||||
|
|
||||||
/* Retire requests first as we use it above for the early return.
|
/* Retire requests first as we use it above for the early return.
|
||||||
|
|
|
@ -880,10 +880,8 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
|
||||||
DP_AUX_CH_CTL_RECEIVE_ERROR))
|
DP_AUX_CH_CTL_RECEIVE_ERROR))
|
||||||
continue;
|
continue;
|
||||||
if (status & DP_AUX_CH_CTL_DONE)
|
if (status & DP_AUX_CH_CTL_DONE)
|
||||||
break;
|
goto done;
|
||||||
}
|
}
|
||||||
if (status & DP_AUX_CH_CTL_DONE)
|
|
||||||
break;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
if ((status & DP_AUX_CH_CTL_DONE) == 0) {
|
if ((status & DP_AUX_CH_CTL_DONE) == 0) {
|
||||||
|
@ -892,6 +890,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
done:
|
||||||
/* Check for timeout or receive error.
|
/* Check for timeout or receive error.
|
||||||
* Timeouts occur when the sink is not connected
|
* Timeouts occur when the sink is not connected
|
||||||
*/
|
*/
|
||||||
|
|
|
@ -1134,6 +1134,12 @@ static int gen8_init_common_ring(struct intel_engine_cs *ring)
|
||||||
I915_WRITE_IMR(ring, ~(ring->irq_enable_mask | ring->irq_keep_mask));
|
I915_WRITE_IMR(ring, ~(ring->irq_enable_mask | ring->irq_keep_mask));
|
||||||
I915_WRITE(RING_HWSTAM(ring->mmio_base), 0xffffffff);
|
I915_WRITE(RING_HWSTAM(ring->mmio_base), 0xffffffff);
|
||||||
|
|
||||||
|
if (ring->status_page.obj) {
|
||||||
|
I915_WRITE(RING_HWS_PGA(ring->mmio_base),
|
||||||
|
(u32)ring->status_page.gfx_addr);
|
||||||
|
POSTING_READ(RING_HWS_PGA(ring->mmio_base));
|
||||||
|
}
|
||||||
|
|
||||||
I915_WRITE(RING_MODE_GEN7(ring),
|
I915_WRITE(RING_MODE_GEN7(ring),
|
||||||
_MASKED_BIT_DISABLE(GFX_REPLAY_MODE) |
|
_MASKED_BIT_DISABLE(GFX_REPLAY_MODE) |
|
||||||
_MASKED_BIT_ENABLE(GFX_RUN_LIST_ENABLE));
|
_MASKED_BIT_ENABLE(GFX_RUN_LIST_ENABLE));
|
||||||
|
|
|
@ -901,13 +901,6 @@ static int chv_init_workarounds(struct intel_engine_cs *ring)
|
||||||
GEN6_WIZ_HASHING_MASK,
|
GEN6_WIZ_HASHING_MASK,
|
||||||
GEN6_WIZ_HASHING_16x4);
|
GEN6_WIZ_HASHING_16x4);
|
||||||
|
|
||||||
if (INTEL_REVID(dev) == SKL_REVID_C0 ||
|
|
||||||
INTEL_REVID(dev) == SKL_REVID_D0)
|
|
||||||
/* WaBarrierPerformanceFixDisable:skl */
|
|
||||||
WA_SET_BIT_MASKED(HDC_CHICKEN0,
|
|
||||||
HDC_FENCE_DEST_SLM_DISABLE |
|
|
||||||
HDC_BARRIER_PERFORMANCE_DISABLE);
|
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1024,6 +1017,13 @@ static int skl_init_workarounds(struct intel_engine_cs *ring)
|
||||||
WA_SET_BIT_MASKED(HIZ_CHICKEN,
|
WA_SET_BIT_MASKED(HIZ_CHICKEN,
|
||||||
BDW_HIZ_POWER_COMPILER_CLOCK_GATING_DISABLE);
|
BDW_HIZ_POWER_COMPILER_CLOCK_GATING_DISABLE);
|
||||||
|
|
||||||
|
if (INTEL_REVID(dev) == SKL_REVID_C0 ||
|
||||||
|
INTEL_REVID(dev) == SKL_REVID_D0)
|
||||||
|
/* WaBarrierPerformanceFixDisable:skl */
|
||||||
|
WA_SET_BIT_MASKED(HDC_CHICKEN0,
|
||||||
|
HDC_FENCE_DEST_SLM_DISABLE |
|
||||||
|
HDC_BARRIER_PERFORMANCE_DISABLE);
|
||||||
|
|
||||||
return skl_tune_iz_hashing(ring);
|
return skl_tune_iz_hashing(ring);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -173,7 +173,7 @@ void dce3_2_hdmi_update_acr(struct drm_encoder *encoder, long offset,
|
||||||
struct drm_device *dev = encoder->dev;
|
struct drm_device *dev = encoder->dev;
|
||||||
struct radeon_device *rdev = dev->dev_private;
|
struct radeon_device *rdev = dev->dev_private;
|
||||||
|
|
||||||
WREG32(HDMI0_ACR_PACKET_CONTROL + offset,
|
WREG32(DCE3_HDMI0_ACR_PACKET_CONTROL + offset,
|
||||||
HDMI0_ACR_SOURCE | /* select SW CTS value */
|
HDMI0_ACR_SOURCE | /* select SW CTS value */
|
||||||
HDMI0_ACR_AUTO_SEND); /* allow hw to sent ACR packets when required */
|
HDMI0_ACR_AUTO_SEND); /* allow hw to sent ACR packets when required */
|
||||||
|
|
||||||
|
|
|
@ -554,4 +554,4 @@ module_platform_driver(hix5hd2_i2c_driver);
|
||||||
MODULE_DESCRIPTION("Hix5hd2 I2C Bus driver");
|
MODULE_DESCRIPTION("Hix5hd2 I2C Bus driver");
|
||||||
MODULE_AUTHOR("Wei Yan <sledge.yanwei@huawei.com>");
|
MODULE_AUTHOR("Wei Yan <sledge.yanwei@huawei.com>");
|
||||||
MODULE_LICENSE("GPL");
|
MODULE_LICENSE("GPL");
|
||||||
MODULE_ALIAS("platform:i2c-hix5hd2");
|
MODULE_ALIAS("platform:hix5hd2-i2c");
|
||||||
|
|
|
@ -1143,6 +1143,7 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
||||||
i2c->quirks = s3c24xx_get_device_quirks(pdev);
|
i2c->quirks = s3c24xx_get_device_quirks(pdev);
|
||||||
|
i2c->sysreg = ERR_PTR(-ENOENT);
|
||||||
if (pdata)
|
if (pdata)
|
||||||
memcpy(i2c->pdata, pdata, sizeof(*pdata));
|
memcpy(i2c->pdata, pdata, sizeof(*pdata));
|
||||||
else
|
else
|
||||||
|
|
|
@ -1001,7 +1001,7 @@ static struct platform_driver twl6030_gpadc_driver = {
|
||||||
|
|
||||||
module_platform_driver(twl6030_gpadc_driver);
|
module_platform_driver(twl6030_gpadc_driver);
|
||||||
|
|
||||||
MODULE_ALIAS("platform: " DRIVER_NAME);
|
MODULE_ALIAS("platform:" DRIVER_NAME);
|
||||||
MODULE_AUTHOR("Balaji T K <balajitk@ti.com>");
|
MODULE_AUTHOR("Balaji T K <balajitk@ti.com>");
|
||||||
MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
|
MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
|
||||||
MODULE_AUTHOR("Oleksandr Kozaruk <oleksandr.kozaruk@ti.com");
|
MODULE_AUTHOR("Oleksandr Kozaruk <oleksandr.kozaruk@ti.com");
|
||||||
|
|
|
@ -139,6 +139,7 @@
|
||||||
#define ADIS16400_NO_BURST BIT(1)
|
#define ADIS16400_NO_BURST BIT(1)
|
||||||
#define ADIS16400_HAS_SLOW_MODE BIT(2)
|
#define ADIS16400_HAS_SLOW_MODE BIT(2)
|
||||||
#define ADIS16400_HAS_SERIAL_NUMBER BIT(3)
|
#define ADIS16400_HAS_SERIAL_NUMBER BIT(3)
|
||||||
|
#define ADIS16400_BURST_DIAG_STAT BIT(4)
|
||||||
|
|
||||||
struct adis16400_state;
|
struct adis16400_state;
|
||||||
|
|
||||||
|
@ -165,6 +166,7 @@ struct adis16400_state {
|
||||||
int filt_int;
|
int filt_int;
|
||||||
|
|
||||||
struct adis adis;
|
struct adis adis;
|
||||||
|
unsigned long avail_scan_mask[2];
|
||||||
};
|
};
|
||||||
|
|
||||||
/* At the moment triggers are only used for ring buffer
|
/* At the moment triggers are only used for ring buffer
|
||||||
|
|
|
@ -18,7 +18,8 @@ int adis16400_update_scan_mode(struct iio_dev *indio_dev,
|
||||||
{
|
{
|
||||||
struct adis16400_state *st = iio_priv(indio_dev);
|
struct adis16400_state *st = iio_priv(indio_dev);
|
||||||
struct adis *adis = &st->adis;
|
struct adis *adis = &st->adis;
|
||||||
uint16_t *tx;
|
unsigned int burst_length;
|
||||||
|
u8 *tx;
|
||||||
|
|
||||||
if (st->variant->flags & ADIS16400_NO_BURST)
|
if (st->variant->flags & ADIS16400_NO_BURST)
|
||||||
return adis_update_scan_mode(indio_dev, scan_mask);
|
return adis_update_scan_mode(indio_dev, scan_mask);
|
||||||
|
@ -26,26 +27,29 @@ int adis16400_update_scan_mode(struct iio_dev *indio_dev,
|
||||||
kfree(adis->xfer);
|
kfree(adis->xfer);
|
||||||
kfree(adis->buffer);
|
kfree(adis->buffer);
|
||||||
|
|
||||||
|
/* All but the timestamp channel */
|
||||||
|
burst_length = (indio_dev->num_channels - 1) * sizeof(u16);
|
||||||
|
if (st->variant->flags & ADIS16400_BURST_DIAG_STAT)
|
||||||
|
burst_length += sizeof(u16);
|
||||||
|
|
||||||
adis->xfer = kcalloc(2, sizeof(*adis->xfer), GFP_KERNEL);
|
adis->xfer = kcalloc(2, sizeof(*adis->xfer), GFP_KERNEL);
|
||||||
if (!adis->xfer)
|
if (!adis->xfer)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
||||||
adis->buffer = kzalloc(indio_dev->scan_bytes + sizeof(u16),
|
adis->buffer = kzalloc(burst_length + sizeof(u16), GFP_KERNEL);
|
||||||
GFP_KERNEL);
|
|
||||||
if (!adis->buffer)
|
if (!adis->buffer)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
||||||
tx = adis->buffer + indio_dev->scan_bytes;
|
tx = adis->buffer + burst_length;
|
||||||
|
|
||||||
tx[0] = ADIS_READ_REG(ADIS16400_GLOB_CMD);
|
tx[0] = ADIS_READ_REG(ADIS16400_GLOB_CMD);
|
||||||
tx[1] = 0;
|
tx[1] = 0;
|
||||||
|
|
||||||
adis->xfer[0].tx_buf = tx;
|
adis->xfer[0].tx_buf = tx;
|
||||||
adis->xfer[0].bits_per_word = 8;
|
adis->xfer[0].bits_per_word = 8;
|
||||||
adis->xfer[0].len = 2;
|
adis->xfer[0].len = 2;
|
||||||
adis->xfer[1].tx_buf = tx;
|
adis->xfer[1].rx_buf = adis->buffer;
|
||||||
adis->xfer[1].bits_per_word = 8;
|
adis->xfer[1].bits_per_word = 8;
|
||||||
adis->xfer[1].len = indio_dev->scan_bytes;
|
adis->xfer[1].len = burst_length;
|
||||||
|
|
||||||
spi_message_init(&adis->msg);
|
spi_message_init(&adis->msg);
|
||||||
spi_message_add_tail(&adis->xfer[0], &adis->msg);
|
spi_message_add_tail(&adis->xfer[0], &adis->msg);
|
||||||
|
@ -61,6 +65,7 @@ irqreturn_t adis16400_trigger_handler(int irq, void *p)
|
||||||
struct adis16400_state *st = iio_priv(indio_dev);
|
struct adis16400_state *st = iio_priv(indio_dev);
|
||||||
struct adis *adis = &st->adis;
|
struct adis *adis = &st->adis;
|
||||||
u32 old_speed_hz = st->adis.spi->max_speed_hz;
|
u32 old_speed_hz = st->adis.spi->max_speed_hz;
|
||||||
|
void *buffer;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
if (!adis->buffer)
|
if (!adis->buffer)
|
||||||
|
@ -81,7 +86,12 @@ irqreturn_t adis16400_trigger_handler(int irq, void *p)
|
||||||
spi_setup(st->adis.spi);
|
spi_setup(st->adis.spi);
|
||||||
}
|
}
|
||||||
|
|
||||||
iio_push_to_buffers_with_timestamp(indio_dev, adis->buffer,
|
if (st->variant->flags & ADIS16400_BURST_DIAG_STAT)
|
||||||
|
buffer = adis->buffer + sizeof(u16);
|
||||||
|
else
|
||||||
|
buffer = adis->buffer;
|
||||||
|
|
||||||
|
iio_push_to_buffers_with_timestamp(indio_dev, buffer,
|
||||||
pf->timestamp);
|
pf->timestamp);
|
||||||
|
|
||||||
iio_trigger_notify_done(indio_dev->trig);
|
iio_trigger_notify_done(indio_dev->trig);
|
||||||
|
|
|
@ -405,6 +405,11 @@ static int adis16400_read_raw(struct iio_dev *indio_dev,
|
||||||
*val = st->variant->temp_scale_nano / 1000000;
|
*val = st->variant->temp_scale_nano / 1000000;
|
||||||
*val2 = (st->variant->temp_scale_nano % 1000000);
|
*val2 = (st->variant->temp_scale_nano % 1000000);
|
||||||
return IIO_VAL_INT_PLUS_MICRO;
|
return IIO_VAL_INT_PLUS_MICRO;
|
||||||
|
case IIO_PRESSURE:
|
||||||
|
/* 20 uBar = 0.002kPascal */
|
||||||
|
*val = 0;
|
||||||
|
*val2 = 2000;
|
||||||
|
return IIO_VAL_INT_PLUS_MICRO;
|
||||||
default:
|
default:
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
@ -454,10 +459,10 @@ static int adis16400_read_raw(struct iio_dev *indio_dev,
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#define ADIS16400_VOLTAGE_CHAN(addr, bits, name, si) { \
|
#define ADIS16400_VOLTAGE_CHAN(addr, bits, name, si, chn) { \
|
||||||
.type = IIO_VOLTAGE, \
|
.type = IIO_VOLTAGE, \
|
||||||
.indexed = 1, \
|
.indexed = 1, \
|
||||||
.channel = 0, \
|
.channel = chn, \
|
||||||
.extend_name = name, \
|
.extend_name = name, \
|
||||||
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
|
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
|
||||||
BIT(IIO_CHAN_INFO_SCALE), \
|
BIT(IIO_CHAN_INFO_SCALE), \
|
||||||
|
@ -474,10 +479,10 @@ static int adis16400_read_raw(struct iio_dev *indio_dev,
|
||||||
}
|
}
|
||||||
|
|
||||||
#define ADIS16400_SUPPLY_CHAN(addr, bits) \
|
#define ADIS16400_SUPPLY_CHAN(addr, bits) \
|
||||||
ADIS16400_VOLTAGE_CHAN(addr, bits, "supply", ADIS16400_SCAN_SUPPLY)
|
ADIS16400_VOLTAGE_CHAN(addr, bits, "supply", ADIS16400_SCAN_SUPPLY, 0)
|
||||||
|
|
||||||
#define ADIS16400_AUX_ADC_CHAN(addr, bits) \
|
#define ADIS16400_AUX_ADC_CHAN(addr, bits) \
|
||||||
ADIS16400_VOLTAGE_CHAN(addr, bits, NULL, ADIS16400_SCAN_ADC)
|
ADIS16400_VOLTAGE_CHAN(addr, bits, NULL, ADIS16400_SCAN_ADC, 1)
|
||||||
|
|
||||||
#define ADIS16400_GYRO_CHAN(mod, addr, bits) { \
|
#define ADIS16400_GYRO_CHAN(mod, addr, bits) { \
|
||||||
.type = IIO_ANGL_VEL, \
|
.type = IIO_ANGL_VEL, \
|
||||||
|
@ -773,7 +778,8 @@ static struct adis16400_chip_info adis16400_chips[] = {
|
||||||
.channels = adis16448_channels,
|
.channels = adis16448_channels,
|
||||||
.num_channels = ARRAY_SIZE(adis16448_channels),
|
.num_channels = ARRAY_SIZE(adis16448_channels),
|
||||||
.flags = ADIS16400_HAS_PROD_ID |
|
.flags = ADIS16400_HAS_PROD_ID |
|
||||||
ADIS16400_HAS_SERIAL_NUMBER,
|
ADIS16400_HAS_SERIAL_NUMBER |
|
||||||
|
ADIS16400_BURST_DIAG_STAT,
|
||||||
.gyro_scale_micro = IIO_DEGREE_TO_RAD(10000), /* 0.01 deg/s */
|
.gyro_scale_micro = IIO_DEGREE_TO_RAD(10000), /* 0.01 deg/s */
|
||||||
.accel_scale_micro = IIO_G_TO_M_S_2(833), /* 1/1200 g */
|
.accel_scale_micro = IIO_G_TO_M_S_2(833), /* 1/1200 g */
|
||||||
.temp_scale_nano = 73860000, /* 0.07386 C */
|
.temp_scale_nano = 73860000, /* 0.07386 C */
|
||||||
|
@ -791,11 +797,6 @@ static const struct iio_info adis16400_info = {
|
||||||
.debugfs_reg_access = adis_debugfs_reg_access,
|
.debugfs_reg_access = adis_debugfs_reg_access,
|
||||||
};
|
};
|
||||||
|
|
||||||
static const unsigned long adis16400_burst_scan_mask[] = {
|
|
||||||
~0UL,
|
|
||||||
0,
|
|
||||||
};
|
|
||||||
|
|
||||||
static const char * const adis16400_status_error_msgs[] = {
|
static const char * const adis16400_status_error_msgs[] = {
|
||||||
[ADIS16400_DIAG_STAT_ZACCL_FAIL] = "Z-axis accelerometer self-test failure",
|
[ADIS16400_DIAG_STAT_ZACCL_FAIL] = "Z-axis accelerometer self-test failure",
|
||||||
[ADIS16400_DIAG_STAT_YACCL_FAIL] = "Y-axis accelerometer self-test failure",
|
[ADIS16400_DIAG_STAT_YACCL_FAIL] = "Y-axis accelerometer self-test failure",
|
||||||
|
@ -843,6 +844,20 @@ static const struct adis_data adis16400_data = {
|
||||||
BIT(ADIS16400_DIAG_STAT_POWER_LOW),
|
BIT(ADIS16400_DIAG_STAT_POWER_LOW),
|
||||||
};
|
};
|
||||||
|
|
||||||
|
static void adis16400_setup_chan_mask(struct adis16400_state *st)
|
||||||
|
{
|
||||||
|
const struct adis16400_chip_info *chip_info = st->variant;
|
||||||
|
unsigned i;
|
||||||
|
|
||||||
|
for (i = 0; i < chip_info->num_channels; i++) {
|
||||||
|
const struct iio_chan_spec *ch = &chip_info->channels[i];
|
||||||
|
|
||||||
|
if (ch->scan_index >= 0 &&
|
||||||
|
ch->scan_index != ADIS16400_SCAN_TIMESTAMP)
|
||||||
|
st->avail_scan_mask[0] |= BIT(ch->scan_index);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
static int adis16400_probe(struct spi_device *spi)
|
static int adis16400_probe(struct spi_device *spi)
|
||||||
{
|
{
|
||||||
struct adis16400_state *st;
|
struct adis16400_state *st;
|
||||||
|
@ -866,8 +881,10 @@ static int adis16400_probe(struct spi_device *spi)
|
||||||
indio_dev->info = &adis16400_info;
|
indio_dev->info = &adis16400_info;
|
||||||
indio_dev->modes = INDIO_DIRECT_MODE;
|
indio_dev->modes = INDIO_DIRECT_MODE;
|
||||||
|
|
||||||
if (!(st->variant->flags & ADIS16400_NO_BURST))
|
if (!(st->variant->flags & ADIS16400_NO_BURST)) {
|
||||||
indio_dev->available_scan_masks = adis16400_burst_scan_mask;
|
adis16400_setup_chan_mask(st);
|
||||||
|
indio_dev->available_scan_masks = st->avail_scan_mask;
|
||||||
|
}
|
||||||
|
|
||||||
ret = adis_init(&st->adis, indio_dev, spi, &adis16400_data);
|
ret = adis_init(&st->adis, indio_dev, spi, &adis16400_data);
|
||||||
if (ret)
|
if (ret)
|
||||||
|
|
|
@ -1063,9 +1063,8 @@ static void alps_process_trackstick_packet_v7(struct psmouse *psmouse)
|
||||||
right = (packet[1] & 0x02) >> 1;
|
right = (packet[1] & 0x02) >> 1;
|
||||||
middle = (packet[1] & 0x04) >> 2;
|
middle = (packet[1] & 0x04) >> 2;
|
||||||
|
|
||||||
/* Divide 2 since trackpoint's speed is too fast */
|
input_report_rel(dev2, REL_X, (char)x);
|
||||||
input_report_rel(dev2, REL_X, (char)x / 2);
|
input_report_rel(dev2, REL_Y, -((char)y));
|
||||||
input_report_rel(dev2, REL_Y, -((char)y / 2));
|
|
||||||
|
|
||||||
input_report_key(dev2, BTN_LEFT, left);
|
input_report_key(dev2, BTN_LEFT, left);
|
||||||
input_report_key(dev2, BTN_RIGHT, right);
|
input_report_key(dev2, BTN_RIGHT, right);
|
||||||
|
|
|
@ -1376,10 +1376,11 @@ static bool elantech_is_signature_valid(const unsigned char *param)
|
||||||
return true;
|
return true;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Some models have a revision higher then 20. Meaning param[2] may
|
* Some hw_version >= 4 models have a revision higher then 20. Meaning
|
||||||
* be 10 or 20, skip the rates check for these.
|
* that param[2] may be 10 or 20, skip the rates check for these.
|
||||||
*/
|
*/
|
||||||
if (param[0] == 0x46 && (param[1] & 0xef) == 0x0f && param[2] < 40)
|
if ((param[0] & 0x0f) >= 0x06 && (param[1] & 0xaf) == 0x0f &&
|
||||||
|
param[2] < 40)
|
||||||
return true;
|
return true;
|
||||||
|
|
||||||
for (i = 0; i < ARRAY_SIZE(rates); i++)
|
for (i = 0; i < ARRAY_SIZE(rates); i++)
|
||||||
|
@ -1555,6 +1556,7 @@ static int elantech_set_properties(struct elantech_data *etd)
|
||||||
case 9:
|
case 9:
|
||||||
case 10:
|
case 10:
|
||||||
case 13:
|
case 13:
|
||||||
|
case 14:
|
||||||
etd->hw_version = 4;
|
etd->hw_version = 4;
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
|
|
|
@ -2930,6 +2930,7 @@ static void *alloc_coherent(struct device *dev, size_t size,
|
||||||
size = PAGE_ALIGN(size);
|
size = PAGE_ALIGN(size);
|
||||||
dma_mask = dev->coherent_dma_mask;
|
dma_mask = dev->coherent_dma_mask;
|
||||||
flag &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32);
|
flag &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32);
|
||||||
|
flag |= __GFP_ZERO;
|
||||||
|
|
||||||
page = alloc_pages(flag | __GFP_NOWARN, get_order(size));
|
page = alloc_pages(flag | __GFP_NOWARN, get_order(size));
|
||||||
if (!page) {
|
if (!page) {
|
||||||
|
|
|
@ -1774,7 +1774,7 @@ struct bnx2x {
|
||||||
int stats_state;
|
int stats_state;
|
||||||
|
|
||||||
/* used for synchronization of concurrent threads statistics handling */
|
/* used for synchronization of concurrent threads statistics handling */
|
||||||
struct mutex stats_lock;
|
struct semaphore stats_lock;
|
||||||
|
|
||||||
/* used by dmae command loader */
|
/* used by dmae command loader */
|
||||||
struct dmae_command stats_dmae;
|
struct dmae_command stats_dmae;
|
||||||
|
|
|
@ -12054,7 +12054,7 @@ static int bnx2x_init_bp(struct bnx2x *bp)
|
||||||
mutex_init(&bp->port.phy_mutex);
|
mutex_init(&bp->port.phy_mutex);
|
||||||
mutex_init(&bp->fw_mb_mutex);
|
mutex_init(&bp->fw_mb_mutex);
|
||||||
mutex_init(&bp->drv_info_mutex);
|
mutex_init(&bp->drv_info_mutex);
|
||||||
mutex_init(&bp->stats_lock);
|
sema_init(&bp->stats_lock, 1);
|
||||||
bp->drv_info_mng_owner = false;
|
bp->drv_info_mng_owner = false;
|
||||||
|
|
||||||
INIT_DELAYED_WORK(&bp->sp_task, bnx2x_sp_task);
|
INIT_DELAYED_WORK(&bp->sp_task, bnx2x_sp_task);
|
||||||
|
@ -13690,9 +13690,10 @@ static int bnx2x_eeh_nic_unload(struct bnx2x *bp)
|
||||||
cancel_delayed_work_sync(&bp->sp_task);
|
cancel_delayed_work_sync(&bp->sp_task);
|
||||||
cancel_delayed_work_sync(&bp->period_task);
|
cancel_delayed_work_sync(&bp->period_task);
|
||||||
|
|
||||||
mutex_lock(&bp->stats_lock);
|
if (!down_timeout(&bp->stats_lock, HZ / 10)) {
|
||||||
bp->stats_state = STATS_STATE_DISABLED;
|
bp->stats_state = STATS_STATE_DISABLED;
|
||||||
mutex_unlock(&bp->stats_lock);
|
up(&bp->stats_lock);
|
||||||
|
}
|
||||||
|
|
||||||
bnx2x_save_statistics(bp);
|
bnx2x_save_statistics(bp);
|
||||||
|
|
||||||
|
|
|
@ -1372,19 +1372,23 @@ void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event)
|
||||||
* that context in case someone is in the middle of a transition.
|
* that context in case someone is in the middle of a transition.
|
||||||
* For other events, wait a bit until lock is taken.
|
* For other events, wait a bit until lock is taken.
|
||||||
*/
|
*/
|
||||||
if (!mutex_trylock(&bp->stats_lock)) {
|
if (down_trylock(&bp->stats_lock)) {
|
||||||
if (event == STATS_EVENT_UPDATE)
|
if (event == STATS_EVENT_UPDATE)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
DP(BNX2X_MSG_STATS,
|
DP(BNX2X_MSG_STATS,
|
||||||
"Unlikely stats' lock contention [event %d]\n", event);
|
"Unlikely stats' lock contention [event %d]\n", event);
|
||||||
mutex_lock(&bp->stats_lock);
|
if (unlikely(down_timeout(&bp->stats_lock, HZ / 10))) {
|
||||||
|
BNX2X_ERR("Failed to take stats lock [event %d]\n",
|
||||||
|
event);
|
||||||
|
return;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
bnx2x_stats_stm[state][event].action(bp);
|
bnx2x_stats_stm[state][event].action(bp);
|
||||||
bp->stats_state = bnx2x_stats_stm[state][event].next_state;
|
bp->stats_state = bnx2x_stats_stm[state][event].next_state;
|
||||||
|
|
||||||
mutex_unlock(&bp->stats_lock);
|
up(&bp->stats_lock);
|
||||||
|
|
||||||
if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp))
|
if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp))
|
||||||
DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n",
|
DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n",
|
||||||
|
@ -1970,7 +1974,11 @@ int bnx2x_stats_safe_exec(struct bnx2x *bp,
|
||||||
/* Wait for statistics to end [while blocking further requests],
|
/* Wait for statistics to end [while blocking further requests],
|
||||||
* then run supplied function 'safely'.
|
* then run supplied function 'safely'.
|
||||||
*/
|
*/
|
||||||
mutex_lock(&bp->stats_lock);
|
rc = down_timeout(&bp->stats_lock, HZ / 10);
|
||||||
|
if (unlikely(rc)) {
|
||||||
|
BNX2X_ERR("Failed to take statistics lock for safe execution\n");
|
||||||
|
goto out_no_lock;
|
||||||
|
}
|
||||||
|
|
||||||
bnx2x_stats_comp(bp);
|
bnx2x_stats_comp(bp);
|
||||||
while (bp->stats_pending && cnt--)
|
while (bp->stats_pending && cnt--)
|
||||||
|
@ -1988,7 +1996,7 @@ out:
|
||||||
/* No need to restart statistics - if they're enabled, the timer
|
/* No need to restart statistics - if they're enabled, the timer
|
||||||
* will restart the statistics.
|
* will restart the statistics.
|
||||||
*/
|
*/
|
||||||
mutex_unlock(&bp->stats_lock);
|
up(&bp->stats_lock);
|
||||||
|
out_no_lock:
|
||||||
return rc;
|
return rc;
|
||||||
}
|
}
|
||||||
|
|
|
@ -2414,7 +2414,7 @@ bfa_ioc_boot(struct bfa_ioc *ioc, enum bfi_fwboot_type boot_type,
|
||||||
if (status == BFA_STATUS_OK)
|
if (status == BFA_STATUS_OK)
|
||||||
bfa_ioc_lpu_start(ioc);
|
bfa_ioc_lpu_start(ioc);
|
||||||
else
|
else
|
||||||
bfa_nw_iocpf_timeout(ioc);
|
bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_TIMEOUT);
|
||||||
|
|
||||||
return status;
|
return status;
|
||||||
}
|
}
|
||||||
|
@ -3029,7 +3029,7 @@ bfa_ioc_poll_fwinit(struct bfa_ioc *ioc)
|
||||||
}
|
}
|
||||||
|
|
||||||
if (ioc->iocpf.poll_time >= BFA_IOC_TOV) {
|
if (ioc->iocpf.poll_time >= BFA_IOC_TOV) {
|
||||||
bfa_nw_iocpf_timeout(ioc);
|
bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_TIMEOUT);
|
||||||
} else {
|
} else {
|
||||||
ioc->iocpf.poll_time += BFA_IOC_POLL_TOV;
|
ioc->iocpf.poll_time += BFA_IOC_POLL_TOV;
|
||||||
mod_timer(&ioc->iocpf_timer, jiffies +
|
mod_timer(&ioc->iocpf_timer, jiffies +
|
||||||
|
|
|
@ -3701,10 +3701,6 @@ bnad_pci_probe(struct pci_dev *pdev,
|
||||||
setup_timer(&bnad->bna.ioceth.ioc.sem_timer, bnad_iocpf_sem_timeout,
|
setup_timer(&bnad->bna.ioceth.ioc.sem_timer, bnad_iocpf_sem_timeout,
|
||||||
((unsigned long)bnad));
|
((unsigned long)bnad));
|
||||||
|
|
||||||
/* Now start the timer before calling IOC */
|
|
||||||
mod_timer(&bnad->bna.ioceth.ioc.iocpf_timer,
|
|
||||||
jiffies + msecs_to_jiffies(BNA_IOC_TIMER_FREQ));
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Start the chip
|
* Start the chip
|
||||||
* If the call back comes with error, we bail out.
|
* If the call back comes with error, we bail out.
|
||||||
|
|
|
@ -30,6 +30,7 @@ cna_read_firmware(struct pci_dev *pdev, u32 **bfi_image,
|
||||||
u32 *bfi_image_size, char *fw_name)
|
u32 *bfi_image_size, char *fw_name)
|
||||||
{
|
{
|
||||||
const struct firmware *fw;
|
const struct firmware *fw;
|
||||||
|
u32 n;
|
||||||
|
|
||||||
if (request_firmware(&fw, fw_name, &pdev->dev)) {
|
if (request_firmware(&fw, fw_name, &pdev->dev)) {
|
||||||
pr_alert("Can't locate firmware %s\n", fw_name);
|
pr_alert("Can't locate firmware %s\n", fw_name);
|
||||||
|
@ -40,6 +41,12 @@ cna_read_firmware(struct pci_dev *pdev, u32 **bfi_image,
|
||||||
*bfi_image_size = fw->size/sizeof(u32);
|
*bfi_image_size = fw->size/sizeof(u32);
|
||||||
bfi_fw = fw;
|
bfi_fw = fw;
|
||||||
|
|
||||||
|
/* Convert loaded firmware to host order as it is stored in file
|
||||||
|
* as sequence of LE32 integers.
|
||||||
|
*/
|
||||||
|
for (n = 0; n < *bfi_image_size; n++)
|
||||||
|
le32_to_cpus(*bfi_image + n);
|
||||||
|
|
||||||
return *bfi_image;
|
return *bfi_image;
|
||||||
error:
|
error:
|
||||||
return NULL;
|
return NULL;
|
||||||
|
|
|
@ -224,12 +224,17 @@ static void efx_unmap_rx_buffer(struct efx_nic *efx,
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static void efx_free_rx_buffer(struct efx_rx_buffer *rx_buf)
|
static void efx_free_rx_buffers(struct efx_rx_queue *rx_queue,
|
||||||
|
struct efx_rx_buffer *rx_buf,
|
||||||
|
unsigned int num_bufs)
|
||||||
{
|
{
|
||||||
if (rx_buf->page) {
|
do {
|
||||||
put_page(rx_buf->page);
|
if (rx_buf->page) {
|
||||||
rx_buf->page = NULL;
|
put_page(rx_buf->page);
|
||||||
}
|
rx_buf->page = NULL;
|
||||||
|
}
|
||||||
|
rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
|
||||||
|
} while (--num_bufs);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Attempt to recycle the page if there is an RX recycle ring; the page can
|
/* Attempt to recycle the page if there is an RX recycle ring; the page can
|
||||||
|
@ -278,7 +283,7 @@ static void efx_fini_rx_buffer(struct efx_rx_queue *rx_queue,
|
||||||
/* If this is the last buffer in a page, unmap and free it. */
|
/* If this is the last buffer in a page, unmap and free it. */
|
||||||
if (rx_buf->flags & EFX_RX_BUF_LAST_IN_PAGE) {
|
if (rx_buf->flags & EFX_RX_BUF_LAST_IN_PAGE) {
|
||||||
efx_unmap_rx_buffer(rx_queue->efx, rx_buf);
|
efx_unmap_rx_buffer(rx_queue->efx, rx_buf);
|
||||||
efx_free_rx_buffer(rx_buf);
|
efx_free_rx_buffers(rx_queue, rx_buf, 1);
|
||||||
}
|
}
|
||||||
rx_buf->page = NULL;
|
rx_buf->page = NULL;
|
||||||
}
|
}
|
||||||
|
@ -304,10 +309,7 @@ static void efx_discard_rx_packet(struct efx_channel *channel,
|
||||||
|
|
||||||
efx_recycle_rx_pages(channel, rx_buf, n_frags);
|
efx_recycle_rx_pages(channel, rx_buf, n_frags);
|
||||||
|
|
||||||
do {
|
efx_free_rx_buffers(rx_queue, rx_buf, n_frags);
|
||||||
efx_free_rx_buffer(rx_buf);
|
|
||||||
rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
|
|
||||||
} while (--n_frags);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -431,11 +433,10 @@ efx_rx_packet_gro(struct efx_channel *channel, struct efx_rx_buffer *rx_buf,
|
||||||
|
|
||||||
skb = napi_get_frags(napi);
|
skb = napi_get_frags(napi);
|
||||||
if (unlikely(!skb)) {
|
if (unlikely(!skb)) {
|
||||||
while (n_frags--) {
|
struct efx_rx_queue *rx_queue;
|
||||||
put_page(rx_buf->page);
|
|
||||||
rx_buf->page = NULL;
|
rx_queue = efx_channel_get_rx_queue(channel);
|
||||||
rx_buf = efx_rx_buf_next(&channel->rx_queue, rx_buf);
|
efx_free_rx_buffers(rx_queue, rx_buf, n_frags);
|
||||||
}
|
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -622,7 +623,10 @@ static void efx_rx_deliver(struct efx_channel *channel, u8 *eh,
|
||||||
|
|
||||||
skb = efx_rx_mk_skb(channel, rx_buf, n_frags, eh, hdr_len);
|
skb = efx_rx_mk_skb(channel, rx_buf, n_frags, eh, hdr_len);
|
||||||
if (unlikely(skb == NULL)) {
|
if (unlikely(skb == NULL)) {
|
||||||
efx_free_rx_buffer(rx_buf);
|
struct efx_rx_queue *rx_queue;
|
||||||
|
|
||||||
|
rx_queue = efx_channel_get_rx_queue(channel);
|
||||||
|
efx_free_rx_buffers(rx_queue, rx_buf, n_frags);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
skb_record_rx_queue(skb, channel->rx_queue.core_index);
|
skb_record_rx_queue(skb, channel->rx_queue.core_index);
|
||||||
|
@ -661,8 +665,12 @@ void __efx_rx_packet(struct efx_channel *channel)
|
||||||
* loopback layer, and free the rx_buf here
|
* loopback layer, and free the rx_buf here
|
||||||
*/
|
*/
|
||||||
if (unlikely(efx->loopback_selftest)) {
|
if (unlikely(efx->loopback_selftest)) {
|
||||||
|
struct efx_rx_queue *rx_queue;
|
||||||
|
|
||||||
efx_loopback_rx_packet(efx, eh, rx_buf->len);
|
efx_loopback_rx_packet(efx, eh, rx_buf->len);
|
||||||
efx_free_rx_buffer(rx_buf);
|
rx_queue = efx_channel_get_rx_queue(channel);
|
||||||
|
efx_free_rx_buffers(rx_queue, rx_buf,
|
||||||
|
channel->rx_pkt_n_frags);
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -511,11 +511,9 @@ static int brcmf_msgbuf_query_dcmd(struct brcmf_pub *drvr, int ifidx,
|
||||||
msgbuf->rx_pktids,
|
msgbuf->rx_pktids,
|
||||||
msgbuf->ioctl_resp_pktid);
|
msgbuf->ioctl_resp_pktid);
|
||||||
if (msgbuf->ioctl_resp_ret_len != 0) {
|
if (msgbuf->ioctl_resp_ret_len != 0) {
|
||||||
if (!skb) {
|
if (!skb)
|
||||||
brcmf_err("Invalid packet id idx recv'd %d\n",
|
|
||||||
msgbuf->ioctl_resp_pktid);
|
|
||||||
return -EBADF;
|
return -EBADF;
|
||||||
}
|
|
||||||
memcpy(buf, skb->data, (len < msgbuf->ioctl_resp_ret_len) ?
|
memcpy(buf, skb->data, (len < msgbuf->ioctl_resp_ret_len) ?
|
||||||
len : msgbuf->ioctl_resp_ret_len);
|
len : msgbuf->ioctl_resp_ret_len);
|
||||||
}
|
}
|
||||||
|
@ -874,10 +872,8 @@ brcmf_msgbuf_process_txstatus(struct brcmf_msgbuf *msgbuf, void *buf)
|
||||||
flowid -= BRCMF_NROF_H2D_COMMON_MSGRINGS;
|
flowid -= BRCMF_NROF_H2D_COMMON_MSGRINGS;
|
||||||
skb = brcmf_msgbuf_get_pktid(msgbuf->drvr->bus_if->dev,
|
skb = brcmf_msgbuf_get_pktid(msgbuf->drvr->bus_if->dev,
|
||||||
msgbuf->tx_pktids, idx);
|
msgbuf->tx_pktids, idx);
|
||||||
if (!skb) {
|
if (!skb)
|
||||||
brcmf_err("Invalid packet id idx recv'd %d\n", idx);
|
|
||||||
return;
|
return;
|
||||||
}
|
|
||||||
|
|
||||||
set_bit(flowid, msgbuf->txstatus_done_map);
|
set_bit(flowid, msgbuf->txstatus_done_map);
|
||||||
commonring = msgbuf->flowrings[flowid];
|
commonring = msgbuf->flowrings[flowid];
|
||||||
|
@ -1156,6 +1152,8 @@ brcmf_msgbuf_process_rx_complete(struct brcmf_msgbuf *msgbuf, void *buf)
|
||||||
|
|
||||||
skb = brcmf_msgbuf_get_pktid(msgbuf->drvr->bus_if->dev,
|
skb = brcmf_msgbuf_get_pktid(msgbuf->drvr->bus_if->dev,
|
||||||
msgbuf->rx_pktids, idx);
|
msgbuf->rx_pktids, idx);
|
||||||
|
if (!skb)
|
||||||
|
return;
|
||||||
|
|
||||||
if (data_offset)
|
if (data_offset)
|
||||||
skb_pull(skb, data_offset);
|
skb_pull(skb, data_offset);
|
||||||
|
|
|
@ -471,7 +471,7 @@ static int iwl_get_radio_cfg(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
|
||||||
if (cfg->device_family != IWL_DEVICE_FAMILY_8000)
|
if (cfg->device_family != IWL_DEVICE_FAMILY_8000)
|
||||||
return le16_to_cpup(nvm_sw + RADIO_CFG);
|
return le16_to_cpup(nvm_sw + RADIO_CFG);
|
||||||
|
|
||||||
return le32_to_cpup((__le32 *)(nvm_sw + RADIO_CFG_FAMILY_8000));
|
return le32_to_cpup((__le32 *)(phy_sku + RADIO_CFG_FAMILY_8000));
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
/******************************************************************************
|
/******************************************************************************
|
||||||
*
|
*
|
||||||
* Copyright(c) 2003 - 2014 Intel Corporation. All rights reserved.
|
* Copyright(c) 2003 - 2015 Intel Corporation. All rights reserved.
|
||||||
* Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
|
* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
|
||||||
*
|
*
|
||||||
* Portions of this file are derived from the ipw3945 project, as well
|
* Portions of this file are derived from the ipw3945 project, as well
|
||||||
* as portions of the ieee80211 subsystem header files.
|
* as portions of the ieee80211 subsystem header files.
|
||||||
|
@ -320,7 +320,7 @@ struct iwl_trans_pcie {
|
||||||
|
|
||||||
/*protect hw register */
|
/*protect hw register */
|
||||||
spinlock_t reg_lock;
|
spinlock_t reg_lock;
|
||||||
bool cmd_in_flight;
|
bool cmd_hold_nic_awake;
|
||||||
bool ref_cmd_in_flight;
|
bool ref_cmd_in_flight;
|
||||||
|
|
||||||
/* protect ref counter */
|
/* protect ref counter */
|
||||||
|
|
|
@ -1372,7 +1372,7 @@ static bool iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans, bool silent,
|
||||||
|
|
||||||
spin_lock_irqsave(&trans_pcie->reg_lock, *flags);
|
spin_lock_irqsave(&trans_pcie->reg_lock, *flags);
|
||||||
|
|
||||||
if (trans_pcie->cmd_in_flight)
|
if (trans_pcie->cmd_hold_nic_awake)
|
||||||
goto out;
|
goto out;
|
||||||
|
|
||||||
/* this bit wakes up the NIC */
|
/* this bit wakes up the NIC */
|
||||||
|
@ -1438,7 +1438,7 @@ static void iwl_trans_pcie_release_nic_access(struct iwl_trans *trans,
|
||||||
*/
|
*/
|
||||||
__acquire(&trans_pcie->reg_lock);
|
__acquire(&trans_pcie->reg_lock);
|
||||||
|
|
||||||
if (trans_pcie->cmd_in_flight)
|
if (trans_pcie->cmd_hold_nic_awake)
|
||||||
goto out;
|
goto out;
|
||||||
|
|
||||||
__iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL,
|
__iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL,
|
||||||
|
|
|
@ -1039,18 +1039,14 @@ static int iwl_pcie_set_cmd_in_flight(struct iwl_trans *trans,
|
||||||
iwl_trans_pcie_ref(trans);
|
iwl_trans_pcie_ref(trans);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (trans_pcie->cmd_in_flight)
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
trans_pcie->cmd_in_flight = true;
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* wake up the NIC to make sure that the firmware will see the host
|
* wake up the NIC to make sure that the firmware will see the host
|
||||||
* command - we will let the NIC sleep once all the host commands
|
* command - we will let the NIC sleep once all the host commands
|
||||||
* returned. This needs to be done only on NICs that have
|
* returned. This needs to be done only on NICs that have
|
||||||
* apmg_wake_up_wa set.
|
* apmg_wake_up_wa set.
|
||||||
*/
|
*/
|
||||||
if (trans->cfg->base_params->apmg_wake_up_wa) {
|
if (trans->cfg->base_params->apmg_wake_up_wa &&
|
||||||
|
!trans_pcie->cmd_hold_nic_awake) {
|
||||||
__iwl_trans_pcie_set_bit(trans, CSR_GP_CNTRL,
|
__iwl_trans_pcie_set_bit(trans, CSR_GP_CNTRL,
|
||||||
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
|
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
|
||||||
if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000)
|
if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000)
|
||||||
|
@ -1064,10 +1060,10 @@ static int iwl_pcie_set_cmd_in_flight(struct iwl_trans *trans,
|
||||||
if (ret < 0) {
|
if (ret < 0) {
|
||||||
__iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL,
|
__iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL,
|
||||||
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
|
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
|
||||||
trans_pcie->cmd_in_flight = false;
|
|
||||||
IWL_ERR(trans, "Failed to wake NIC for hcmd\n");
|
IWL_ERR(trans, "Failed to wake NIC for hcmd\n");
|
||||||
return -EIO;
|
return -EIO;
|
||||||
}
|
}
|
||||||
|
trans_pcie->cmd_hold_nic_awake = true;
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -1085,15 +1081,14 @@ static int iwl_pcie_clear_cmd_in_flight(struct iwl_trans *trans)
|
||||||
iwl_trans_pcie_unref(trans);
|
iwl_trans_pcie_unref(trans);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (WARN_ON(!trans_pcie->cmd_in_flight))
|
if (trans->cfg->base_params->apmg_wake_up_wa) {
|
||||||
return 0;
|
if (WARN_ON(!trans_pcie->cmd_hold_nic_awake))
|
||||||
|
return 0;
|
||||||
|
|
||||||
trans_pcie->cmd_in_flight = false;
|
trans_pcie->cmd_hold_nic_awake = false;
|
||||||
|
|
||||||
if (trans->cfg->base_params->apmg_wake_up_wa)
|
|
||||||
__iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL,
|
__iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL,
|
||||||
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
|
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
|
||||||
|
}
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -1250,7 +1250,7 @@ static void xenvif_tx_build_gops(struct xenvif_queue *queue,
|
||||||
netdev_err(queue->vif->dev,
|
netdev_err(queue->vif->dev,
|
||||||
"txreq.offset: %x, size: %u, end: %lu\n",
|
"txreq.offset: %x, size: %u, end: %lu\n",
|
||||||
txreq.offset, txreq.size,
|
txreq.offset, txreq.size,
|
||||||
(txreq.offset&~PAGE_MASK) + txreq.size);
|
(unsigned long)(txreq.offset&~PAGE_MASK) + txreq.size);
|
||||||
xenvif_fatal_tx_err(queue->vif);
|
xenvif_fatal_tx_err(queue->vif);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
|
@ -34,6 +34,8 @@ struct backend_info {
|
||||||
enum xenbus_state frontend_state;
|
enum xenbus_state frontend_state;
|
||||||
struct xenbus_watch hotplug_status_watch;
|
struct xenbus_watch hotplug_status_watch;
|
||||||
u8 have_hotplug_status_watch:1;
|
u8 have_hotplug_status_watch:1;
|
||||||
|
|
||||||
|
const char *hotplug_script;
|
||||||
};
|
};
|
||||||
|
|
||||||
static int connect_rings(struct backend_info *be, struct xenvif_queue *queue);
|
static int connect_rings(struct backend_info *be, struct xenvif_queue *queue);
|
||||||
|
@ -238,6 +240,7 @@ static int netback_remove(struct xenbus_device *dev)
|
||||||
xenvif_free(be->vif);
|
xenvif_free(be->vif);
|
||||||
be->vif = NULL;
|
be->vif = NULL;
|
||||||
}
|
}
|
||||||
|
kfree(be->hotplug_script);
|
||||||
kfree(be);
|
kfree(be);
|
||||||
dev_set_drvdata(&dev->dev, NULL);
|
dev_set_drvdata(&dev->dev, NULL);
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -255,6 +258,7 @@ static int netback_probe(struct xenbus_device *dev,
|
||||||
struct xenbus_transaction xbt;
|
struct xenbus_transaction xbt;
|
||||||
int err;
|
int err;
|
||||||
int sg;
|
int sg;
|
||||||
|
const char *script;
|
||||||
struct backend_info *be = kzalloc(sizeof(struct backend_info),
|
struct backend_info *be = kzalloc(sizeof(struct backend_info),
|
||||||
GFP_KERNEL);
|
GFP_KERNEL);
|
||||||
if (!be) {
|
if (!be) {
|
||||||
|
@ -347,6 +351,15 @@ static int netback_probe(struct xenbus_device *dev,
|
||||||
if (err)
|
if (err)
|
||||||
pr_debug("Error writing multi-queue-max-queues\n");
|
pr_debug("Error writing multi-queue-max-queues\n");
|
||||||
|
|
||||||
|
script = xenbus_read(XBT_NIL, dev->nodename, "script", NULL);
|
||||||
|
if (IS_ERR(script)) {
|
||||||
|
err = PTR_ERR(script);
|
||||||
|
xenbus_dev_fatal(dev, err, "reading script");
|
||||||
|
goto fail;
|
||||||
|
}
|
||||||
|
|
||||||
|
be->hotplug_script = script;
|
||||||
|
|
||||||
err = xenbus_switch_state(dev, XenbusStateInitWait);
|
err = xenbus_switch_state(dev, XenbusStateInitWait);
|
||||||
if (err)
|
if (err)
|
||||||
goto fail;
|
goto fail;
|
||||||
|
@ -379,22 +392,14 @@ static int netback_uevent(struct xenbus_device *xdev,
|
||||||
struct kobj_uevent_env *env)
|
struct kobj_uevent_env *env)
|
||||||
{
|
{
|
||||||
struct backend_info *be = dev_get_drvdata(&xdev->dev);
|
struct backend_info *be = dev_get_drvdata(&xdev->dev);
|
||||||
char *val;
|
|
||||||
|
|
||||||
val = xenbus_read(XBT_NIL, xdev->nodename, "script", NULL);
|
if (!be)
|
||||||
if (IS_ERR(val)) {
|
return 0;
|
||||||
int err = PTR_ERR(val);
|
|
||||||
xenbus_dev_fatal(xdev, err, "reading script");
|
|
||||||
return err;
|
|
||||||
} else {
|
|
||||||
if (add_uevent_var(env, "script=%s", val)) {
|
|
||||||
kfree(val);
|
|
||||||
return -ENOMEM;
|
|
||||||
}
|
|
||||||
kfree(val);
|
|
||||||
}
|
|
||||||
|
|
||||||
if (!be || !be->vif)
|
if (add_uevent_var(env, "script=%s", be->hotplug_script))
|
||||||
|
return -ENOMEM;
|
||||||
|
|
||||||
|
if (!be->vif)
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
return add_uevent_var(env, "vif=%s", be->vif->dev->name);
|
return add_uevent_var(env, "vif=%s", be->vif->dev->name);
|
||||||
|
|
|
@ -189,7 +189,7 @@ int __of_attach_node_sysfs(struct device_node *np)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int __init of_init(void)
|
void __init of_core_init(void)
|
||||||
{
|
{
|
||||||
struct device_node *np;
|
struct device_node *np;
|
||||||
|
|
||||||
|
@ -198,7 +198,8 @@ static int __init of_init(void)
|
||||||
of_kset = kset_create_and_add("devicetree", NULL, firmware_kobj);
|
of_kset = kset_create_and_add("devicetree", NULL, firmware_kobj);
|
||||||
if (!of_kset) {
|
if (!of_kset) {
|
||||||
mutex_unlock(&of_mutex);
|
mutex_unlock(&of_mutex);
|
||||||
return -ENOMEM;
|
pr_err("devicetree: failed to register existing nodes\n");
|
||||||
|
return;
|
||||||
}
|
}
|
||||||
for_each_of_allnodes(np)
|
for_each_of_allnodes(np)
|
||||||
__of_attach_node_sysfs(np);
|
__of_attach_node_sysfs(np);
|
||||||
|
@ -207,10 +208,7 @@ static int __init of_init(void)
|
||||||
/* Symlink in /proc as required by userspace ABI */
|
/* Symlink in /proc as required by userspace ABI */
|
||||||
if (of_root)
|
if (of_root)
|
||||||
proc_symlink("device-tree", NULL, "/sys/firmware/devicetree/base");
|
proc_symlink("device-tree", NULL, "/sys/firmware/devicetree/base");
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
}
|
||||||
core_initcall(of_init);
|
|
||||||
|
|
||||||
static struct property *__of_find_property(const struct device_node *np,
|
static struct property *__of_find_property(const struct device_node *np,
|
||||||
const char *name, int *lenp)
|
const char *name, int *lenp)
|
||||||
|
|
|
@ -225,7 +225,7 @@ void __of_attach_node(struct device_node *np)
|
||||||
phandle = __of_get_property(np, "phandle", &sz);
|
phandle = __of_get_property(np, "phandle", &sz);
|
||||||
if (!phandle)
|
if (!phandle)
|
||||||
phandle = __of_get_property(np, "linux,phandle", &sz);
|
phandle = __of_get_property(np, "linux,phandle", &sz);
|
||||||
if (IS_ENABLED(PPC_PSERIES) && !phandle)
|
if (IS_ENABLED(CONFIG_PPC_PSERIES) && !phandle)
|
||||||
phandle = __of_get_property(np, "ibm,phandle", &sz);
|
phandle = __of_get_property(np, "ibm,phandle", &sz);
|
||||||
np->phandle = (phandle && (sz >= 4)) ? be32_to_cpup(phandle) : 0;
|
np->phandle = (phandle && (sz >= 4)) ? be32_to_cpup(phandle) : 0;
|
||||||
|
|
||||||
|
|
|
@ -428,16 +428,19 @@ static void __assign_resources_sorted(struct list_head *head,
|
||||||
* consistent.
|
* consistent.
|
||||||
*/
|
*/
|
||||||
if (add_align > dev_res->res->start) {
|
if (add_align > dev_res->res->start) {
|
||||||
|
resource_size_t r_size = resource_size(dev_res->res);
|
||||||
|
|
||||||
dev_res->res->start = add_align;
|
dev_res->res->start = add_align;
|
||||||
dev_res->res->end = add_align +
|
dev_res->res->end = add_align + r_size - 1;
|
||||||
resource_size(dev_res->res);
|
|
||||||
|
|
||||||
list_for_each_entry(dev_res2, head, list) {
|
list_for_each_entry(dev_res2, head, list) {
|
||||||
align = pci_resource_alignment(dev_res2->dev,
|
align = pci_resource_alignment(dev_res2->dev,
|
||||||
dev_res2->res);
|
dev_res2->res);
|
||||||
if (add_align > align)
|
if (add_align > align) {
|
||||||
list_move_tail(&dev_res->list,
|
list_move_tail(&dev_res->list,
|
||||||
&dev_res2->list);
|
&dev_res2->list);
|
||||||
|
break;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -38,7 +38,9 @@ config ARMADA375_USBCLUSTER_PHY
|
||||||
config PHY_DM816X_USB
|
config PHY_DM816X_USB
|
||||||
tristate "TI dm816x USB PHY driver"
|
tristate "TI dm816x USB PHY driver"
|
||||||
depends on ARCH_OMAP2PLUS
|
depends on ARCH_OMAP2PLUS
|
||||||
|
depends on USB_SUPPORT
|
||||||
select GENERIC_PHY
|
select GENERIC_PHY
|
||||||
|
select USB_PHY
|
||||||
help
|
help
|
||||||
Enable this for dm816x USB to work.
|
Enable this for dm816x USB to work.
|
||||||
|
|
||||||
|
@ -97,8 +99,9 @@ config OMAP_CONTROL_PHY
|
||||||
config OMAP_USB2
|
config OMAP_USB2
|
||||||
tristate "OMAP USB2 PHY Driver"
|
tristate "OMAP USB2 PHY Driver"
|
||||||
depends on ARCH_OMAP2PLUS
|
depends on ARCH_OMAP2PLUS
|
||||||
depends on USB_PHY
|
depends on USB_SUPPORT
|
||||||
select GENERIC_PHY
|
select GENERIC_PHY
|
||||||
|
select USB_PHY
|
||||||
select OMAP_CONTROL_PHY
|
select OMAP_CONTROL_PHY
|
||||||
depends on OMAP_OCP2SCP
|
depends on OMAP_OCP2SCP
|
||||||
help
|
help
|
||||||
|
@ -122,8 +125,9 @@ config TI_PIPE3
|
||||||
config TWL4030_USB
|
config TWL4030_USB
|
||||||
tristate "TWL4030 USB Transceiver Driver"
|
tristate "TWL4030 USB Transceiver Driver"
|
||||||
depends on TWL4030_CORE && REGULATOR_TWL4030 && USB_MUSB_OMAP2PLUS
|
depends on TWL4030_CORE && REGULATOR_TWL4030 && USB_MUSB_OMAP2PLUS
|
||||||
depends on USB_PHY
|
depends on USB_SUPPORT
|
||||||
select GENERIC_PHY
|
select GENERIC_PHY
|
||||||
|
select USB_PHY
|
||||||
help
|
help
|
||||||
Enable this to support the USB OTG transceiver on TWL4030
|
Enable this to support the USB OTG transceiver on TWL4030
|
||||||
family chips (including the TWL5030 and TPS659x0 devices).
|
family chips (including the TWL5030 and TPS659x0 devices).
|
||||||
|
@ -304,7 +308,7 @@ config PHY_STIH41X_USB
|
||||||
|
|
||||||
config PHY_QCOM_UFS
|
config PHY_QCOM_UFS
|
||||||
tristate "Qualcomm UFS PHY driver"
|
tristate "Qualcomm UFS PHY driver"
|
||||||
depends on OF && ARCH_MSM
|
depends on OF && ARCH_QCOM
|
||||||
select GENERIC_PHY
|
select GENERIC_PHY
|
||||||
help
|
help
|
||||||
Support for UFS PHY on QCOM chipsets.
|
Support for UFS PHY on QCOM chipsets.
|
||||||
|
|
|
@ -530,7 +530,7 @@ struct phy *phy_optional_get(struct device *dev, const char *string)
|
||||||
{
|
{
|
||||||
struct phy *phy = phy_get(dev, string);
|
struct phy *phy = phy_get(dev, string);
|
||||||
|
|
||||||
if (PTR_ERR(phy) == -ENODEV)
|
if (IS_ERR(phy) && (PTR_ERR(phy) == -ENODEV))
|
||||||
phy = NULL;
|
phy = NULL;
|
||||||
|
|
||||||
return phy;
|
return phy;
|
||||||
|
@ -584,7 +584,7 @@ struct phy *devm_phy_optional_get(struct device *dev, const char *string)
|
||||||
{
|
{
|
||||||
struct phy *phy = devm_phy_get(dev, string);
|
struct phy *phy = devm_phy_get(dev, string);
|
||||||
|
|
||||||
if (PTR_ERR(phy) == -ENODEV)
|
if (IS_ERR(phy) && (PTR_ERR(phy) == -ENODEV))
|
||||||
phy = NULL;
|
phy = NULL;
|
||||||
|
|
||||||
return phy;
|
return phy;
|
||||||
|
|
|
@ -275,6 +275,7 @@ static int omap_usb2_probe(struct platform_device *pdev)
|
||||||
phy->wkupclk = devm_clk_get(phy->dev, "usb_phy_cm_clk32k");
|
phy->wkupclk = devm_clk_get(phy->dev, "usb_phy_cm_clk32k");
|
||||||
if (IS_ERR(phy->wkupclk)) {
|
if (IS_ERR(phy->wkupclk)) {
|
||||||
dev_err(&pdev->dev, "unable to get usb_phy_cm_clk32k\n");
|
dev_err(&pdev->dev, "unable to get usb_phy_cm_clk32k\n");
|
||||||
|
pm_runtime_disable(phy->dev);
|
||||||
return PTR_ERR(phy->wkupclk);
|
return PTR_ERR(phy->wkupclk);
|
||||||
} else {
|
} else {
|
||||||
dev_warn(&pdev->dev,
|
dev_warn(&pdev->dev,
|
||||||
|
|
|
@ -23,7 +23,7 @@
|
||||||
#define USBHS_LPSTS 0x02
|
#define USBHS_LPSTS 0x02
|
||||||
#define USBHS_UGCTRL 0x80
|
#define USBHS_UGCTRL 0x80
|
||||||
#define USBHS_UGCTRL2 0x84
|
#define USBHS_UGCTRL2 0x84
|
||||||
#define USBHS_UGSTS 0x88 /* The manuals have 0x90 */
|
#define USBHS_UGSTS 0x88 /* From technical update */
|
||||||
|
|
||||||
/* Low Power Status register (LPSTS) */
|
/* Low Power Status register (LPSTS) */
|
||||||
#define USBHS_LPSTS_SUSPM 0x4000
|
#define USBHS_LPSTS_SUSPM 0x4000
|
||||||
|
@ -41,7 +41,7 @@
|
||||||
#define USBHS_UGCTRL2_USB0SEL_HS_USB 0x00000030
|
#define USBHS_UGCTRL2_USB0SEL_HS_USB 0x00000030
|
||||||
|
|
||||||
/* USB General status register (UGSTS) */
|
/* USB General status register (UGSTS) */
|
||||||
#define USBHS_UGSTS_LOCK 0x00000300 /* The manuals have 0x3 */
|
#define USBHS_UGSTS_LOCK 0x00000100 /* From technical update */
|
||||||
|
|
||||||
#define PHYS_PER_CHANNEL 2
|
#define PHYS_PER_CHANNEL 2
|
||||||
|
|
||||||
|
|
|
@ -746,8 +746,8 @@ void oz_hcd_pd_reset(void *hpd, void *hport)
|
||||||
/*
|
/*
|
||||||
* Context: softirq
|
* Context: softirq
|
||||||
*/
|
*/
|
||||||
void oz_hcd_get_desc_cnf(void *hport, u8 req_id, int status, const u8 *desc,
|
void oz_hcd_get_desc_cnf(void *hport, u8 req_id, u8 status, const u8 *desc,
|
||||||
int length, int offset, int total_size)
|
u8 length, u16 offset, u16 total_size)
|
||||||
{
|
{
|
||||||
struct oz_port *port = hport;
|
struct oz_port *port = hport;
|
||||||
struct urb *urb;
|
struct urb *urb;
|
||||||
|
@ -759,8 +759,8 @@ void oz_hcd_get_desc_cnf(void *hport, u8 req_id, int status, const u8 *desc,
|
||||||
if (!urb)
|
if (!urb)
|
||||||
return;
|
return;
|
||||||
if (status == 0) {
|
if (status == 0) {
|
||||||
int copy_len;
|
unsigned int copy_len;
|
||||||
int required_size = urb->transfer_buffer_length;
|
unsigned int required_size = urb->transfer_buffer_length;
|
||||||
|
|
||||||
if (required_size > total_size)
|
if (required_size > total_size)
|
||||||
required_size = total_size;
|
required_size = total_size;
|
||||||
|
|
|
@ -29,8 +29,8 @@ void oz_usb_request_heartbeat(void *hpd);
|
||||||
|
|
||||||
/* Confirmation functions.
|
/* Confirmation functions.
|
||||||
*/
|
*/
|
||||||
void oz_hcd_get_desc_cnf(void *hport, u8 req_id, int status,
|
void oz_hcd_get_desc_cnf(void *hport, u8 req_id, u8 status,
|
||||||
const u8 *desc, int length, int offset, int total_size);
|
const u8 *desc, u8 length, u16 offset, u16 total_size);
|
||||||
void oz_hcd_control_cnf(void *hport, u8 req_id, u8 rcode,
|
void oz_hcd_control_cnf(void *hport, u8 req_id, u8 rcode,
|
||||||
const u8 *data, int data_len);
|
const u8 *data, int data_len);
|
||||||
|
|
||||||
|
|
|
@ -326,7 +326,11 @@ static void oz_usb_handle_ep_data(struct oz_usb_ctx *usb_ctx,
|
||||||
struct oz_multiple_fixed *body =
|
struct oz_multiple_fixed *body =
|
||||||
(struct oz_multiple_fixed *)data_hdr;
|
(struct oz_multiple_fixed *)data_hdr;
|
||||||
u8 *data = body->data;
|
u8 *data = body->data;
|
||||||
int n = (len - sizeof(struct oz_multiple_fixed)+1)
|
unsigned int n;
|
||||||
|
if (!body->unit_size ||
|
||||||
|
len < sizeof(struct oz_multiple_fixed) - 1)
|
||||||
|
break;
|
||||||
|
n = (len - (sizeof(struct oz_multiple_fixed) - 1))
|
||||||
/ body->unit_size;
|
/ body->unit_size;
|
||||||
while (n--) {
|
while (n--) {
|
||||||
oz_hcd_data_ind(usb_ctx->hport, body->endpoint,
|
oz_hcd_data_ind(usb_ctx->hport, body->endpoint,
|
||||||
|
@ -390,10 +394,15 @@ void oz_usb_rx(struct oz_pd *pd, struct oz_elt *elt)
|
||||||
case OZ_GET_DESC_RSP: {
|
case OZ_GET_DESC_RSP: {
|
||||||
struct oz_get_desc_rsp *body =
|
struct oz_get_desc_rsp *body =
|
||||||
(struct oz_get_desc_rsp *)usb_hdr;
|
(struct oz_get_desc_rsp *)usb_hdr;
|
||||||
int data_len = elt->length -
|
u16 offs, total_size;
|
||||||
sizeof(struct oz_get_desc_rsp) + 1;
|
u8 data_len;
|
||||||
u16 offs = le16_to_cpu(get_unaligned(&body->offset));
|
|
||||||
u16 total_size =
|
if (elt->length < sizeof(struct oz_get_desc_rsp) - 1)
|
||||||
|
break;
|
||||||
|
data_len = elt->length -
|
||||||
|
(sizeof(struct oz_get_desc_rsp) - 1);
|
||||||
|
offs = le16_to_cpu(get_unaligned(&body->offset));
|
||||||
|
total_size =
|
||||||
le16_to_cpu(get_unaligned(&body->total_size));
|
le16_to_cpu(get_unaligned(&body->total_size));
|
||||||
oz_dbg(ON, "USB_REQ_GET_DESCRIPTOR - cnf\n");
|
oz_dbg(ON, "USB_REQ_GET_DESCRIPTOR - cnf\n");
|
||||||
oz_hcd_get_desc_cnf(usb_ctx->hport, body->req_id,
|
oz_hcd_get_desc_cnf(usb_ctx->hport, body->req_id,
|
||||||
|
|
|
@ -898,11 +898,11 @@ static void SwLedControlMode1(struct _adapter *padapter,
|
||||||
IS_LED_WPS_BLINKING(pLed))
|
IS_LED_WPS_BLINKING(pLed))
|
||||||
return;
|
return;
|
||||||
if (pLed->bLedLinkBlinkInProgress == true) {
|
if (pLed->bLedLinkBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedLinkBlinkInProgress = false;
|
pLed->bLedLinkBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedBlinkInProgress == true) {
|
if (pLed->bLedBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedBlinkInProgress = false;
|
pLed->bLedBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
pLed->bLedNoLinkBlinkInProgress = true;
|
pLed->bLedNoLinkBlinkInProgress = true;
|
||||||
|
@ -921,11 +921,11 @@ static void SwLedControlMode1(struct _adapter *padapter,
|
||||||
IS_LED_WPS_BLINKING(pLed))
|
IS_LED_WPS_BLINKING(pLed))
|
||||||
return;
|
return;
|
||||||
if (pLed->bLedNoLinkBlinkInProgress == true) {
|
if (pLed->bLedNoLinkBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedNoLinkBlinkInProgress = false;
|
pLed->bLedNoLinkBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedBlinkInProgress == true) {
|
if (pLed->bLedBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedBlinkInProgress = false;
|
pLed->bLedBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
pLed->bLedLinkBlinkInProgress = true;
|
pLed->bLedLinkBlinkInProgress = true;
|
||||||
|
@ -946,15 +946,15 @@ static void SwLedControlMode1(struct _adapter *padapter,
|
||||||
if (IS_LED_WPS_BLINKING(pLed))
|
if (IS_LED_WPS_BLINKING(pLed))
|
||||||
return;
|
return;
|
||||||
if (pLed->bLedNoLinkBlinkInProgress == true) {
|
if (pLed->bLedNoLinkBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedNoLinkBlinkInProgress = false;
|
pLed->bLedNoLinkBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedLinkBlinkInProgress == true) {
|
if (pLed->bLedLinkBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedLinkBlinkInProgress = false;
|
pLed->bLedLinkBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedBlinkInProgress == true) {
|
if (pLed->bLedBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedBlinkInProgress = false;
|
pLed->bLedBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
pLed->bLedScanBlinkInProgress = true;
|
pLed->bLedScanBlinkInProgress = true;
|
||||||
|
@ -975,11 +975,11 @@ static void SwLedControlMode1(struct _adapter *padapter,
|
||||||
IS_LED_WPS_BLINKING(pLed))
|
IS_LED_WPS_BLINKING(pLed))
|
||||||
return;
|
return;
|
||||||
if (pLed->bLedNoLinkBlinkInProgress == true) {
|
if (pLed->bLedNoLinkBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedNoLinkBlinkInProgress = false;
|
pLed->bLedNoLinkBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedLinkBlinkInProgress == true) {
|
if (pLed->bLedLinkBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedLinkBlinkInProgress = false;
|
pLed->bLedLinkBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
pLed->bLedBlinkInProgress = true;
|
pLed->bLedBlinkInProgress = true;
|
||||||
|
@ -998,19 +998,19 @@ static void SwLedControlMode1(struct _adapter *padapter,
|
||||||
case LED_CTL_START_WPS_BOTTON:
|
case LED_CTL_START_WPS_BOTTON:
|
||||||
if (pLed->bLedWPSBlinkInProgress == false) {
|
if (pLed->bLedWPSBlinkInProgress == false) {
|
||||||
if (pLed->bLedNoLinkBlinkInProgress == true) {
|
if (pLed->bLedNoLinkBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedNoLinkBlinkInProgress = false;
|
pLed->bLedNoLinkBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedLinkBlinkInProgress == true) {
|
if (pLed->bLedLinkBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedLinkBlinkInProgress = false;
|
pLed->bLedLinkBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedBlinkInProgress == true) {
|
if (pLed->bLedBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedBlinkInProgress = false;
|
pLed->bLedBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedScanBlinkInProgress == true) {
|
if (pLed->bLedScanBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedScanBlinkInProgress = false;
|
pLed->bLedScanBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
pLed->bLedWPSBlinkInProgress = true;
|
pLed->bLedWPSBlinkInProgress = true;
|
||||||
|
@ -1025,23 +1025,23 @@ static void SwLedControlMode1(struct _adapter *padapter,
|
||||||
break;
|
break;
|
||||||
case LED_CTL_STOP_WPS:
|
case LED_CTL_STOP_WPS:
|
||||||
if (pLed->bLedNoLinkBlinkInProgress == true) {
|
if (pLed->bLedNoLinkBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedNoLinkBlinkInProgress = false;
|
pLed->bLedNoLinkBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedLinkBlinkInProgress == true) {
|
if (pLed->bLedLinkBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedLinkBlinkInProgress = false;
|
pLed->bLedLinkBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedBlinkInProgress == true) {
|
if (pLed->bLedBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedBlinkInProgress = false;
|
pLed->bLedBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedScanBlinkInProgress == true) {
|
if (pLed->bLedScanBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedScanBlinkInProgress = false;
|
pLed->bLedScanBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedWPSBlinkInProgress)
|
if (pLed->bLedWPSBlinkInProgress)
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
else
|
else
|
||||||
pLed->bLedWPSBlinkInProgress = true;
|
pLed->bLedWPSBlinkInProgress = true;
|
||||||
pLed->CurrLedState = LED_BLINK_WPS_STOP;
|
pLed->CurrLedState = LED_BLINK_WPS_STOP;
|
||||||
|
@ -1057,7 +1057,7 @@ static void SwLedControlMode1(struct _adapter *padapter,
|
||||||
break;
|
break;
|
||||||
case LED_CTL_STOP_WPS_FAIL:
|
case LED_CTL_STOP_WPS_FAIL:
|
||||||
if (pLed->bLedWPSBlinkInProgress) {
|
if (pLed->bLedWPSBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedWPSBlinkInProgress = false;
|
pLed->bLedWPSBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
pLed->bLedNoLinkBlinkInProgress = true;
|
pLed->bLedNoLinkBlinkInProgress = true;
|
||||||
|
@ -1073,23 +1073,23 @@ static void SwLedControlMode1(struct _adapter *padapter,
|
||||||
pLed->CurrLedState = LED_OFF;
|
pLed->CurrLedState = LED_OFF;
|
||||||
pLed->BlinkingLedState = LED_OFF;
|
pLed->BlinkingLedState = LED_OFF;
|
||||||
if (pLed->bLedNoLinkBlinkInProgress) {
|
if (pLed->bLedNoLinkBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedNoLinkBlinkInProgress = false;
|
pLed->bLedNoLinkBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedLinkBlinkInProgress) {
|
if (pLed->bLedLinkBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedLinkBlinkInProgress = false;
|
pLed->bLedLinkBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedBlinkInProgress) {
|
if (pLed->bLedBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedBlinkInProgress = false;
|
pLed->bLedBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedWPSBlinkInProgress) {
|
if (pLed->bLedWPSBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedWPSBlinkInProgress = false;
|
pLed->bLedWPSBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedScanBlinkInProgress) {
|
if (pLed->bLedScanBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedScanBlinkInProgress = false;
|
pLed->bLedScanBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
mod_timer(&pLed->BlinkTimer,
|
mod_timer(&pLed->BlinkTimer,
|
||||||
|
@ -1116,7 +1116,7 @@ static void SwLedControlMode2(struct _adapter *padapter,
|
||||||
return;
|
return;
|
||||||
|
|
||||||
if (pLed->bLedBlinkInProgress == true) {
|
if (pLed->bLedBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedBlinkInProgress = false;
|
pLed->bLedBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
pLed->bLedScanBlinkInProgress = true;
|
pLed->bLedScanBlinkInProgress = true;
|
||||||
|
@ -1154,11 +1154,11 @@ static void SwLedControlMode2(struct _adapter *padapter,
|
||||||
pLed->CurrLedState = LED_ON;
|
pLed->CurrLedState = LED_ON;
|
||||||
pLed->BlinkingLedState = LED_ON;
|
pLed->BlinkingLedState = LED_ON;
|
||||||
if (pLed->bLedBlinkInProgress) {
|
if (pLed->bLedBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedBlinkInProgress = false;
|
pLed->bLedBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedScanBlinkInProgress) {
|
if (pLed->bLedScanBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedScanBlinkInProgress = false;
|
pLed->bLedScanBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1170,11 +1170,11 @@ static void SwLedControlMode2(struct _adapter *padapter,
|
||||||
case LED_CTL_START_WPS_BOTTON:
|
case LED_CTL_START_WPS_BOTTON:
|
||||||
if (pLed->bLedWPSBlinkInProgress == false) {
|
if (pLed->bLedWPSBlinkInProgress == false) {
|
||||||
if (pLed->bLedBlinkInProgress == true) {
|
if (pLed->bLedBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedBlinkInProgress = false;
|
pLed->bLedBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedScanBlinkInProgress == true) {
|
if (pLed->bLedScanBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedScanBlinkInProgress = false;
|
pLed->bLedScanBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
pLed->bLedWPSBlinkInProgress = true;
|
pLed->bLedWPSBlinkInProgress = true;
|
||||||
|
@ -1214,15 +1214,15 @@ static void SwLedControlMode2(struct _adapter *padapter,
|
||||||
pLed->CurrLedState = LED_OFF;
|
pLed->CurrLedState = LED_OFF;
|
||||||
pLed->BlinkingLedState = LED_OFF;
|
pLed->BlinkingLedState = LED_OFF;
|
||||||
if (pLed->bLedBlinkInProgress) {
|
if (pLed->bLedBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedBlinkInProgress = false;
|
pLed->bLedBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedScanBlinkInProgress) {
|
if (pLed->bLedScanBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedScanBlinkInProgress = false;
|
pLed->bLedScanBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedWPSBlinkInProgress) {
|
if (pLed->bLedWPSBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedWPSBlinkInProgress = false;
|
pLed->bLedWPSBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
mod_timer(&pLed->BlinkTimer,
|
mod_timer(&pLed->BlinkTimer,
|
||||||
|
@ -1248,7 +1248,7 @@ static void SwLedControlMode3(struct _adapter *padapter,
|
||||||
if (IS_LED_WPS_BLINKING(pLed))
|
if (IS_LED_WPS_BLINKING(pLed))
|
||||||
return;
|
return;
|
||||||
if (pLed->bLedBlinkInProgress == true) {
|
if (pLed->bLedBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedBlinkInProgress = false;
|
pLed->bLedBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
pLed->bLedScanBlinkInProgress = true;
|
pLed->bLedScanBlinkInProgress = true;
|
||||||
|
@ -1286,11 +1286,11 @@ static void SwLedControlMode3(struct _adapter *padapter,
|
||||||
pLed->CurrLedState = LED_ON;
|
pLed->CurrLedState = LED_ON;
|
||||||
pLed->BlinkingLedState = LED_ON;
|
pLed->BlinkingLedState = LED_ON;
|
||||||
if (pLed->bLedBlinkInProgress) {
|
if (pLed->bLedBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedBlinkInProgress = false;
|
pLed->bLedBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedScanBlinkInProgress) {
|
if (pLed->bLedScanBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedScanBlinkInProgress = false;
|
pLed->bLedScanBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
mod_timer(&pLed->BlinkTimer,
|
mod_timer(&pLed->BlinkTimer,
|
||||||
|
@ -1300,11 +1300,11 @@ static void SwLedControlMode3(struct _adapter *padapter,
|
||||||
case LED_CTL_START_WPS_BOTTON:
|
case LED_CTL_START_WPS_BOTTON:
|
||||||
if (pLed->bLedWPSBlinkInProgress == false) {
|
if (pLed->bLedWPSBlinkInProgress == false) {
|
||||||
if (pLed->bLedBlinkInProgress == true) {
|
if (pLed->bLedBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedBlinkInProgress = false;
|
pLed->bLedBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedScanBlinkInProgress == true) {
|
if (pLed->bLedScanBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedScanBlinkInProgress = false;
|
pLed->bLedScanBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
pLed->bLedWPSBlinkInProgress = true;
|
pLed->bLedWPSBlinkInProgress = true;
|
||||||
|
@ -1319,7 +1319,7 @@ static void SwLedControlMode3(struct _adapter *padapter,
|
||||||
break;
|
break;
|
||||||
case LED_CTL_STOP_WPS:
|
case LED_CTL_STOP_WPS:
|
||||||
if (pLed->bLedWPSBlinkInProgress) {
|
if (pLed->bLedWPSBlinkInProgress) {
|
||||||
del_timer_sync(&(pLed->BlinkTimer));
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedWPSBlinkInProgress = false;
|
pLed->bLedWPSBlinkInProgress = false;
|
||||||
} else
|
} else
|
||||||
pLed->bLedWPSBlinkInProgress = true;
|
pLed->bLedWPSBlinkInProgress = true;
|
||||||
|
@ -1336,7 +1336,7 @@ static void SwLedControlMode3(struct _adapter *padapter,
|
||||||
break;
|
break;
|
||||||
case LED_CTL_STOP_WPS_FAIL:
|
case LED_CTL_STOP_WPS_FAIL:
|
||||||
if (pLed->bLedWPSBlinkInProgress) {
|
if (pLed->bLedWPSBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedWPSBlinkInProgress = false;
|
pLed->bLedWPSBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
pLed->CurrLedState = LED_OFF;
|
pLed->CurrLedState = LED_OFF;
|
||||||
|
@ -1357,15 +1357,15 @@ static void SwLedControlMode3(struct _adapter *padapter,
|
||||||
pLed->CurrLedState = LED_OFF;
|
pLed->CurrLedState = LED_OFF;
|
||||||
pLed->BlinkingLedState = LED_OFF;
|
pLed->BlinkingLedState = LED_OFF;
|
||||||
if (pLed->bLedBlinkInProgress) {
|
if (pLed->bLedBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedBlinkInProgress = false;
|
pLed->bLedBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedScanBlinkInProgress) {
|
if (pLed->bLedScanBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedScanBlinkInProgress = false;
|
pLed->bLedScanBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedWPSBlinkInProgress) {
|
if (pLed->bLedWPSBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedWPSBlinkInProgress = false;
|
pLed->bLedWPSBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
mod_timer(&pLed->BlinkTimer,
|
mod_timer(&pLed->BlinkTimer,
|
||||||
|
@ -1388,7 +1388,7 @@ static void SwLedControlMode4(struct _adapter *padapter,
|
||||||
case LED_CTL_START_TO_LINK:
|
case LED_CTL_START_TO_LINK:
|
||||||
if (pLed1->bLedWPSBlinkInProgress) {
|
if (pLed1->bLedWPSBlinkInProgress) {
|
||||||
pLed1->bLedWPSBlinkInProgress = false;
|
pLed1->bLedWPSBlinkInProgress = false;
|
||||||
del_timer_sync(&pLed1->BlinkTimer);
|
del_timer(&pLed1->BlinkTimer);
|
||||||
pLed1->BlinkingLedState = LED_OFF;
|
pLed1->BlinkingLedState = LED_OFF;
|
||||||
pLed1->CurrLedState = LED_OFF;
|
pLed1->CurrLedState = LED_OFF;
|
||||||
if (pLed1->bLedOn)
|
if (pLed1->bLedOn)
|
||||||
|
@ -1400,11 +1400,11 @@ static void SwLedControlMode4(struct _adapter *padapter,
|
||||||
IS_LED_WPS_BLINKING(pLed))
|
IS_LED_WPS_BLINKING(pLed))
|
||||||
return;
|
return;
|
||||||
if (pLed->bLedBlinkInProgress == true) {
|
if (pLed->bLedBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedBlinkInProgress = false;
|
pLed->bLedBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedNoLinkBlinkInProgress == true) {
|
if (pLed->bLedNoLinkBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedNoLinkBlinkInProgress = false;
|
pLed->bLedNoLinkBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
pLed->bLedStartToLinkBlinkInProgress = true;
|
pLed->bLedStartToLinkBlinkInProgress = true;
|
||||||
|
@ -1426,7 +1426,7 @@ static void SwLedControlMode4(struct _adapter *padapter,
|
||||||
if (LedAction == LED_CTL_LINK) {
|
if (LedAction == LED_CTL_LINK) {
|
||||||
if (pLed1->bLedWPSBlinkInProgress) {
|
if (pLed1->bLedWPSBlinkInProgress) {
|
||||||
pLed1->bLedWPSBlinkInProgress = false;
|
pLed1->bLedWPSBlinkInProgress = false;
|
||||||
del_timer_sync(&pLed1->BlinkTimer);
|
del_timer(&pLed1->BlinkTimer);
|
||||||
pLed1->BlinkingLedState = LED_OFF;
|
pLed1->BlinkingLedState = LED_OFF;
|
||||||
pLed1->CurrLedState = LED_OFF;
|
pLed1->CurrLedState = LED_OFF;
|
||||||
if (pLed1->bLedOn)
|
if (pLed1->bLedOn)
|
||||||
|
@ -1439,7 +1439,7 @@ static void SwLedControlMode4(struct _adapter *padapter,
|
||||||
IS_LED_WPS_BLINKING(pLed))
|
IS_LED_WPS_BLINKING(pLed))
|
||||||
return;
|
return;
|
||||||
if (pLed->bLedBlinkInProgress == true) {
|
if (pLed->bLedBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedBlinkInProgress = false;
|
pLed->bLedBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
pLed->bLedNoLinkBlinkInProgress = true;
|
pLed->bLedNoLinkBlinkInProgress = true;
|
||||||
|
@ -1460,11 +1460,11 @@ static void SwLedControlMode4(struct _adapter *padapter,
|
||||||
if (IS_LED_WPS_BLINKING(pLed))
|
if (IS_LED_WPS_BLINKING(pLed))
|
||||||
return;
|
return;
|
||||||
if (pLed->bLedNoLinkBlinkInProgress == true) {
|
if (pLed->bLedNoLinkBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedNoLinkBlinkInProgress = false;
|
pLed->bLedNoLinkBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedBlinkInProgress == true) {
|
if (pLed->bLedBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedBlinkInProgress = false;
|
pLed->bLedBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
pLed->bLedScanBlinkInProgress = true;
|
pLed->bLedScanBlinkInProgress = true;
|
||||||
|
@ -1485,7 +1485,7 @@ static void SwLedControlMode4(struct _adapter *padapter,
|
||||||
IS_LED_WPS_BLINKING(pLed))
|
IS_LED_WPS_BLINKING(pLed))
|
||||||
return;
|
return;
|
||||||
if (pLed->bLedNoLinkBlinkInProgress == true) {
|
if (pLed->bLedNoLinkBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedNoLinkBlinkInProgress = false;
|
pLed->bLedNoLinkBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
pLed->bLedBlinkInProgress = true;
|
pLed->bLedBlinkInProgress = true;
|
||||||
|
@ -1503,7 +1503,7 @@ static void SwLedControlMode4(struct _adapter *padapter,
|
||||||
case LED_CTL_START_WPS_BOTTON:
|
case LED_CTL_START_WPS_BOTTON:
|
||||||
if (pLed1->bLedWPSBlinkInProgress) {
|
if (pLed1->bLedWPSBlinkInProgress) {
|
||||||
pLed1->bLedWPSBlinkInProgress = false;
|
pLed1->bLedWPSBlinkInProgress = false;
|
||||||
del_timer_sync(&(pLed1->BlinkTimer));
|
del_timer(&pLed1->BlinkTimer);
|
||||||
pLed1->BlinkingLedState = LED_OFF;
|
pLed1->BlinkingLedState = LED_OFF;
|
||||||
pLed1->CurrLedState = LED_OFF;
|
pLed1->CurrLedState = LED_OFF;
|
||||||
if (pLed1->bLedOn)
|
if (pLed1->bLedOn)
|
||||||
|
@ -1512,15 +1512,15 @@ static void SwLedControlMode4(struct _adapter *padapter,
|
||||||
}
|
}
|
||||||
if (pLed->bLedWPSBlinkInProgress == false) {
|
if (pLed->bLedWPSBlinkInProgress == false) {
|
||||||
if (pLed->bLedNoLinkBlinkInProgress == true) {
|
if (pLed->bLedNoLinkBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedNoLinkBlinkInProgress = false;
|
pLed->bLedNoLinkBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedBlinkInProgress == true) {
|
if (pLed->bLedBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedBlinkInProgress = false;
|
pLed->bLedBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedScanBlinkInProgress == true) {
|
if (pLed->bLedScanBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedScanBlinkInProgress = false;
|
pLed->bLedScanBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
pLed->bLedWPSBlinkInProgress = true;
|
pLed->bLedWPSBlinkInProgress = true;
|
||||||
|
@ -1538,7 +1538,7 @@ static void SwLedControlMode4(struct _adapter *padapter,
|
||||||
break;
|
break;
|
||||||
case LED_CTL_STOP_WPS: /*WPS connect success*/
|
case LED_CTL_STOP_WPS: /*WPS connect success*/
|
||||||
if (pLed->bLedWPSBlinkInProgress) {
|
if (pLed->bLedWPSBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedWPSBlinkInProgress = false;
|
pLed->bLedWPSBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
pLed->bLedNoLinkBlinkInProgress = true;
|
pLed->bLedNoLinkBlinkInProgress = true;
|
||||||
|
@ -1552,7 +1552,7 @@ static void SwLedControlMode4(struct _adapter *padapter,
|
||||||
break;
|
break;
|
||||||
case LED_CTL_STOP_WPS_FAIL: /*WPS authentication fail*/
|
case LED_CTL_STOP_WPS_FAIL: /*WPS authentication fail*/
|
||||||
if (pLed->bLedWPSBlinkInProgress) {
|
if (pLed->bLedWPSBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedWPSBlinkInProgress = false;
|
pLed->bLedWPSBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
pLed->bLedNoLinkBlinkInProgress = true;
|
pLed->bLedNoLinkBlinkInProgress = true;
|
||||||
|
@ -1565,7 +1565,7 @@ static void SwLedControlMode4(struct _adapter *padapter,
|
||||||
msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
|
msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
|
||||||
/*LED1 settings*/
|
/*LED1 settings*/
|
||||||
if (pLed1->bLedWPSBlinkInProgress)
|
if (pLed1->bLedWPSBlinkInProgress)
|
||||||
del_timer_sync(&pLed1->BlinkTimer);
|
del_timer(&pLed1->BlinkTimer);
|
||||||
else
|
else
|
||||||
pLed1->bLedWPSBlinkInProgress = true;
|
pLed1->bLedWPSBlinkInProgress = true;
|
||||||
pLed1->CurrLedState = LED_BLINK_WPS_STOP;
|
pLed1->CurrLedState = LED_BLINK_WPS_STOP;
|
||||||
|
@ -1578,7 +1578,7 @@ static void SwLedControlMode4(struct _adapter *padapter,
|
||||||
break;
|
break;
|
||||||
case LED_CTL_STOP_WPS_FAIL_OVERLAP: /*WPS session overlap*/
|
case LED_CTL_STOP_WPS_FAIL_OVERLAP: /*WPS session overlap*/
|
||||||
if (pLed->bLedWPSBlinkInProgress) {
|
if (pLed->bLedWPSBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedWPSBlinkInProgress = false;
|
pLed->bLedWPSBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
pLed->bLedNoLinkBlinkInProgress = true;
|
pLed->bLedNoLinkBlinkInProgress = true;
|
||||||
|
@ -1591,7 +1591,7 @@ static void SwLedControlMode4(struct _adapter *padapter,
|
||||||
msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
|
msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
|
||||||
/*LED1 settings*/
|
/*LED1 settings*/
|
||||||
if (pLed1->bLedWPSBlinkInProgress)
|
if (pLed1->bLedWPSBlinkInProgress)
|
||||||
del_timer_sync(&pLed1->BlinkTimer);
|
del_timer(&pLed1->BlinkTimer);
|
||||||
else
|
else
|
||||||
pLed1->bLedWPSBlinkInProgress = true;
|
pLed1->bLedWPSBlinkInProgress = true;
|
||||||
pLed1->CurrLedState = LED_BLINK_WPS_STOP_OVERLAP;
|
pLed1->CurrLedState = LED_BLINK_WPS_STOP_OVERLAP;
|
||||||
|
@ -1607,31 +1607,31 @@ static void SwLedControlMode4(struct _adapter *padapter,
|
||||||
pLed->CurrLedState = LED_OFF;
|
pLed->CurrLedState = LED_OFF;
|
||||||
pLed->BlinkingLedState = LED_OFF;
|
pLed->BlinkingLedState = LED_OFF;
|
||||||
if (pLed->bLedNoLinkBlinkInProgress) {
|
if (pLed->bLedNoLinkBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedNoLinkBlinkInProgress = false;
|
pLed->bLedNoLinkBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedLinkBlinkInProgress) {
|
if (pLed->bLedLinkBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedLinkBlinkInProgress = false;
|
pLed->bLedLinkBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedBlinkInProgress) {
|
if (pLed->bLedBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedBlinkInProgress = false;
|
pLed->bLedBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedWPSBlinkInProgress) {
|
if (pLed->bLedWPSBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedWPSBlinkInProgress = false;
|
pLed->bLedWPSBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedScanBlinkInProgress) {
|
if (pLed->bLedScanBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedScanBlinkInProgress = false;
|
pLed->bLedScanBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedStartToLinkBlinkInProgress) {
|
if (pLed->bLedStartToLinkBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedStartToLinkBlinkInProgress = false;
|
pLed->bLedStartToLinkBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed1->bLedWPSBlinkInProgress) {
|
if (pLed1->bLedWPSBlinkInProgress) {
|
||||||
del_timer_sync(&pLed1->BlinkTimer);
|
del_timer(&pLed1->BlinkTimer);
|
||||||
pLed1->bLedWPSBlinkInProgress = false;
|
pLed1->bLedWPSBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
pLed1->BlinkingLedState = LED_UNKNOWN;
|
pLed1->BlinkingLedState = LED_UNKNOWN;
|
||||||
|
@ -1671,7 +1671,7 @@ static void SwLedControlMode5(struct _adapter *padapter,
|
||||||
; /* dummy branch */
|
; /* dummy branch */
|
||||||
else if (pLed->bLedScanBlinkInProgress == false) {
|
else if (pLed->bLedScanBlinkInProgress == false) {
|
||||||
if (pLed->bLedBlinkInProgress == true) {
|
if (pLed->bLedBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedBlinkInProgress = false;
|
pLed->bLedBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
pLed->bLedScanBlinkInProgress = true;
|
pLed->bLedScanBlinkInProgress = true;
|
||||||
|
@ -1705,7 +1705,7 @@ static void SwLedControlMode5(struct _adapter *padapter,
|
||||||
pLed->CurrLedState = LED_OFF;
|
pLed->CurrLedState = LED_OFF;
|
||||||
pLed->BlinkingLedState = LED_OFF;
|
pLed->BlinkingLedState = LED_OFF;
|
||||||
if (pLed->bLedBlinkInProgress) {
|
if (pLed->bLedBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedBlinkInProgress = false;
|
pLed->bLedBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
SwLedOff(padapter, pLed);
|
SwLedOff(padapter, pLed);
|
||||||
|
@ -1756,7 +1756,7 @@ static void SwLedControlMode6(struct _adapter *padapter,
|
||||||
case LED_CTL_START_WPS_BOTTON:
|
case LED_CTL_START_WPS_BOTTON:
|
||||||
if (pLed->bLedWPSBlinkInProgress == false) {
|
if (pLed->bLedWPSBlinkInProgress == false) {
|
||||||
if (pLed->bLedBlinkInProgress == true) {
|
if (pLed->bLedBlinkInProgress == true) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedBlinkInProgress = false;
|
pLed->bLedBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
pLed->bLedWPSBlinkInProgress = true;
|
pLed->bLedWPSBlinkInProgress = true;
|
||||||
|
@ -1772,7 +1772,7 @@ static void SwLedControlMode6(struct _adapter *padapter,
|
||||||
case LED_CTL_STOP_WPS_FAIL:
|
case LED_CTL_STOP_WPS_FAIL:
|
||||||
case LED_CTL_STOP_WPS:
|
case LED_CTL_STOP_WPS:
|
||||||
if (pLed->bLedWPSBlinkInProgress) {
|
if (pLed->bLedWPSBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedWPSBlinkInProgress = false;
|
pLed->bLedWPSBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
pLed->CurrLedState = LED_ON;
|
pLed->CurrLedState = LED_ON;
|
||||||
|
@ -1784,11 +1784,11 @@ static void SwLedControlMode6(struct _adapter *padapter,
|
||||||
pLed->CurrLedState = LED_OFF;
|
pLed->CurrLedState = LED_OFF;
|
||||||
pLed->BlinkingLedState = LED_OFF;
|
pLed->BlinkingLedState = LED_OFF;
|
||||||
if (pLed->bLedBlinkInProgress) {
|
if (pLed->bLedBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedBlinkInProgress = false;
|
pLed->bLedBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
if (pLed->bLedWPSBlinkInProgress) {
|
if (pLed->bLedWPSBlinkInProgress) {
|
||||||
del_timer_sync(&pLed->BlinkTimer);
|
del_timer(&pLed->BlinkTimer);
|
||||||
pLed->bLedWPSBlinkInProgress = false;
|
pLed->bLedWPSBlinkInProgress = false;
|
||||||
}
|
}
|
||||||
SwLedOff(padapter, pLed);
|
SwLedOff(padapter, pLed);
|
||||||
|
|
|
@ -910,7 +910,7 @@ void r8712_createbss_cmd_callback(struct _adapter *padapter,
|
||||||
if (pcmd->res != H2C_SUCCESS)
|
if (pcmd->res != H2C_SUCCESS)
|
||||||
mod_timer(&pmlmepriv->assoc_timer,
|
mod_timer(&pmlmepriv->assoc_timer,
|
||||||
jiffies + msecs_to_jiffies(1));
|
jiffies + msecs_to_jiffies(1));
|
||||||
del_timer_sync(&pmlmepriv->assoc_timer);
|
del_timer(&pmlmepriv->assoc_timer);
|
||||||
#ifdef __BIG_ENDIAN
|
#ifdef __BIG_ENDIAN
|
||||||
/* endian_convert */
|
/* endian_convert */
|
||||||
pnetwork->Length = le32_to_cpu(pnetwork->Length);
|
pnetwork->Length = le32_to_cpu(pnetwork->Length);
|
||||||
|
|
|
@ -582,7 +582,7 @@ void r8712_surveydone_event_callback(struct _adapter *adapter, u8 *pbuf)
|
||||||
spin_lock_irqsave(&pmlmepriv->lock, irqL);
|
spin_lock_irqsave(&pmlmepriv->lock, irqL);
|
||||||
|
|
||||||
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == true) {
|
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == true) {
|
||||||
del_timer_sync(&pmlmepriv->scan_to_timer);
|
del_timer(&pmlmepriv->scan_to_timer);
|
||||||
|
|
||||||
_clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY);
|
_clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY);
|
||||||
}
|
}
|
||||||
|
@ -696,7 +696,7 @@ void r8712_ind_disconnect(struct _adapter *padapter)
|
||||||
}
|
}
|
||||||
if (padapter->pwrctrlpriv.pwr_mode !=
|
if (padapter->pwrctrlpriv.pwr_mode !=
|
||||||
padapter->registrypriv.power_mgnt) {
|
padapter->registrypriv.power_mgnt) {
|
||||||
del_timer_sync(&pmlmepriv->dhcp_timer);
|
del_timer(&pmlmepriv->dhcp_timer);
|
||||||
r8712_set_ps_mode(padapter, padapter->registrypriv.power_mgnt,
|
r8712_set_ps_mode(padapter, padapter->registrypriv.power_mgnt,
|
||||||
padapter->registrypriv.smart_ps);
|
padapter->registrypriv.smart_ps);
|
||||||
}
|
}
|
||||||
|
@ -910,7 +910,7 @@ void r8712_joinbss_event_callback(struct _adapter *adapter, u8 *pbuf)
|
||||||
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)
|
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)
|
||||||
== true)
|
== true)
|
||||||
r8712_indicate_connect(adapter);
|
r8712_indicate_connect(adapter);
|
||||||
del_timer_sync(&pmlmepriv->assoc_timer);
|
del_timer(&pmlmepriv->assoc_timer);
|
||||||
} else
|
} else
|
||||||
goto ignore_joinbss_callback;
|
goto ignore_joinbss_callback;
|
||||||
} else {
|
} else {
|
||||||
|
|
|
@ -103,7 +103,7 @@ void r8712_cpwm_int_hdl(struct _adapter *padapter,
|
||||||
|
|
||||||
if (pwrpriv->cpwm_tog == ((preportpwrstate->state) & 0x80))
|
if (pwrpriv->cpwm_tog == ((preportpwrstate->state) & 0x80))
|
||||||
return;
|
return;
|
||||||
del_timer_sync(&padapter->pwrctrlpriv.rpwm_check_timer);
|
del_timer(&padapter->pwrctrlpriv.rpwm_check_timer);
|
||||||
_enter_pwrlock(&pwrpriv->lock);
|
_enter_pwrlock(&pwrpriv->lock);
|
||||||
pwrpriv->cpwm = (preportpwrstate->state) & 0xf;
|
pwrpriv->cpwm = (preportpwrstate->state) & 0xf;
|
||||||
if (pwrpriv->cpwm >= PS_STATE_S2) {
|
if (pwrpriv->cpwm >= PS_STATE_S2) {
|
||||||
|
|
|
@ -198,7 +198,7 @@ void r8712_free_stainfo(struct _adapter *padapter, struct sta_info *psta)
|
||||||
* cancel reordering_ctrl_timer */
|
* cancel reordering_ctrl_timer */
|
||||||
for (i = 0; i < 16; i++) {
|
for (i = 0; i < 16; i++) {
|
||||||
preorder_ctrl = &psta->recvreorder_ctrl[i];
|
preorder_ctrl = &psta->recvreorder_ctrl[i];
|
||||||
del_timer_sync(&preorder_ctrl->reordering_ctrl_timer);
|
del_timer(&preorder_ctrl->reordering_ctrl_timer);
|
||||||
}
|
}
|
||||||
spin_lock(&(pfree_sta_queue->lock));
|
spin_lock(&(pfree_sta_queue->lock));
|
||||||
/* insert into free_sta_queue; 20061114 */
|
/* insert into free_sta_queue; 20061114 */
|
||||||
|
|
|
@ -162,6 +162,17 @@ static inline int tty_put_user(struct tty_struct *tty, unsigned char x,
|
||||||
return put_user(x, ptr);
|
return put_user(x, ptr);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static inline int tty_copy_to_user(struct tty_struct *tty,
|
||||||
|
void __user *to,
|
||||||
|
const void *from,
|
||||||
|
unsigned long n)
|
||||||
|
{
|
||||||
|
struct n_tty_data *ldata = tty->disc_data;
|
||||||
|
|
||||||
|
tty_audit_add_data(tty, to, n, ldata->icanon);
|
||||||
|
return copy_to_user(to, from, n);
|
||||||
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* n_tty_kick_worker - start input worker (if required)
|
* n_tty_kick_worker - start input worker (if required)
|
||||||
* @tty: terminal
|
* @tty: terminal
|
||||||
|
@ -2070,8 +2081,8 @@ static int canon_copy_from_read_buf(struct tty_struct *tty,
|
||||||
|
|
||||||
size = N_TTY_BUF_SIZE - tail;
|
size = N_TTY_BUF_SIZE - tail;
|
||||||
n = eol - tail;
|
n = eol - tail;
|
||||||
if (n > 4096)
|
if (n > N_TTY_BUF_SIZE)
|
||||||
n += 4096;
|
n += N_TTY_BUF_SIZE;
|
||||||
n += found;
|
n += found;
|
||||||
c = n;
|
c = n;
|
||||||
|
|
||||||
|
@ -2084,12 +2095,12 @@ static int canon_copy_from_read_buf(struct tty_struct *tty,
|
||||||
__func__, eol, found, n, c, size, more);
|
__func__, eol, found, n, c, size, more);
|
||||||
|
|
||||||
if (n > size) {
|
if (n > size) {
|
||||||
ret = copy_to_user(*b, read_buf_addr(ldata, tail), size);
|
ret = tty_copy_to_user(tty, *b, read_buf_addr(ldata, tail), size);
|
||||||
if (ret)
|
if (ret)
|
||||||
return -EFAULT;
|
return -EFAULT;
|
||||||
ret = copy_to_user(*b + size, ldata->read_buf, n - size);
|
ret = tty_copy_to_user(tty, *b + size, ldata->read_buf, n - size);
|
||||||
} else
|
} else
|
||||||
ret = copy_to_user(*b, read_buf_addr(ldata, tail), n);
|
ret = tty_copy_to_user(tty, *b, read_buf_addr(ldata, tail), n);
|
||||||
|
|
||||||
if (ret)
|
if (ret)
|
||||||
return -EFAULT;
|
return -EFAULT;
|
||||||
|
|
|
@ -562,12 +562,36 @@ static irqreturn_t omap_wake_irq(int irq, void *dev_id)
|
||||||
return IRQ_NONE;
|
return IRQ_NONE;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#ifdef CONFIG_SERIAL_8250_DMA
|
||||||
|
static int omap_8250_dma_handle_irq(struct uart_port *port);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
static irqreturn_t omap8250_irq(int irq, void *dev_id)
|
||||||
|
{
|
||||||
|
struct uart_port *port = dev_id;
|
||||||
|
struct uart_8250_port *up = up_to_u8250p(port);
|
||||||
|
unsigned int iir;
|
||||||
|
int ret;
|
||||||
|
|
||||||
|
#ifdef CONFIG_SERIAL_8250_DMA
|
||||||
|
if (up->dma) {
|
||||||
|
ret = omap_8250_dma_handle_irq(port);
|
||||||
|
return IRQ_RETVAL(ret);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
serial8250_rpm_get(up);
|
||||||
|
iir = serial_port_in(port, UART_IIR);
|
||||||
|
ret = serial8250_handle_irq(port, iir);
|
||||||
|
serial8250_rpm_put(up);
|
||||||
|
|
||||||
|
return IRQ_RETVAL(ret);
|
||||||
|
}
|
||||||
|
|
||||||
static int omap_8250_startup(struct uart_port *port)
|
static int omap_8250_startup(struct uart_port *port)
|
||||||
{
|
{
|
||||||
struct uart_8250_port *up =
|
struct uart_8250_port *up = up_to_u8250p(port);
|
||||||
container_of(port, struct uart_8250_port, port);
|
|
||||||
struct omap8250_priv *priv = port->private_data;
|
struct omap8250_priv *priv = port->private_data;
|
||||||
|
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
if (priv->wakeirq) {
|
if (priv->wakeirq) {
|
||||||
|
@ -580,10 +604,31 @@ static int omap_8250_startup(struct uart_port *port)
|
||||||
|
|
||||||
pm_runtime_get_sync(port->dev);
|
pm_runtime_get_sync(port->dev);
|
||||||
|
|
||||||
ret = serial8250_do_startup(port);
|
up->mcr = 0;
|
||||||
if (ret)
|
serial_out(up, UART_FCR, UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
|
||||||
|
|
||||||
|
serial_out(up, UART_LCR, UART_LCR_WLEN8);
|
||||||
|
|
||||||
|
up->lsr_saved_flags = 0;
|
||||||
|
up->msr_saved_flags = 0;
|
||||||
|
|
||||||
|
if (up->dma) {
|
||||||
|
ret = serial8250_request_dma(up);
|
||||||
|
if (ret) {
|
||||||
|
dev_warn_ratelimited(port->dev,
|
||||||
|
"failed to request DMA\n");
|
||||||
|
up->dma = NULL;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
ret = request_irq(port->irq, omap8250_irq, IRQF_SHARED,
|
||||||
|
dev_name(port->dev), port);
|
||||||
|
if (ret < 0)
|
||||||
goto err;
|
goto err;
|
||||||
|
|
||||||
|
up->ier = UART_IER_RLSI | UART_IER_RDI;
|
||||||
|
serial_out(up, UART_IER, up->ier);
|
||||||
|
|
||||||
#ifdef CONFIG_PM
|
#ifdef CONFIG_PM
|
||||||
up->capabilities |= UART_CAP_RPM;
|
up->capabilities |= UART_CAP_RPM;
|
||||||
#endif
|
#endif
|
||||||
|
@ -610,8 +655,7 @@ err:
|
||||||
|
|
||||||
static void omap_8250_shutdown(struct uart_port *port)
|
static void omap_8250_shutdown(struct uart_port *port)
|
||||||
{
|
{
|
||||||
struct uart_8250_port *up =
|
struct uart_8250_port *up = up_to_u8250p(port);
|
||||||
container_of(port, struct uart_8250_port, port);
|
|
||||||
struct omap8250_priv *priv = port->private_data;
|
struct omap8250_priv *priv = port->private_data;
|
||||||
|
|
||||||
flush_work(&priv->qos_work);
|
flush_work(&priv->qos_work);
|
||||||
|
@ -621,11 +665,24 @@ static void omap_8250_shutdown(struct uart_port *port)
|
||||||
pm_runtime_get_sync(port->dev);
|
pm_runtime_get_sync(port->dev);
|
||||||
|
|
||||||
serial_out(up, UART_OMAP_WER, 0);
|
serial_out(up, UART_OMAP_WER, 0);
|
||||||
serial8250_do_shutdown(port);
|
|
||||||
|
up->ier = 0;
|
||||||
|
serial_out(up, UART_IER, 0);
|
||||||
|
|
||||||
|
if (up->dma)
|
||||||
|
serial8250_release_dma(up);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Disable break condition and FIFOs
|
||||||
|
*/
|
||||||
|
if (up->lcr & UART_LCR_SBC)
|
||||||
|
serial_out(up, UART_LCR, up->lcr & ~UART_LCR_SBC);
|
||||||
|
serial_out(up, UART_FCR, UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
|
||||||
|
|
||||||
pm_runtime_mark_last_busy(port->dev);
|
pm_runtime_mark_last_busy(port->dev);
|
||||||
pm_runtime_put_autosuspend(port->dev);
|
pm_runtime_put_autosuspend(port->dev);
|
||||||
|
|
||||||
|
free_irq(port->irq, port);
|
||||||
if (priv->wakeirq)
|
if (priv->wakeirq)
|
||||||
free_irq(priv->wakeirq, port);
|
free_irq(priv->wakeirq, port);
|
||||||
}
|
}
|
||||||
|
@ -974,6 +1031,13 @@ static inline int omap_8250_rx_dma(struct uart_8250_port *p, unsigned int iir)
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
static int omap8250_no_handle_irq(struct uart_port *port)
|
||||||
|
{
|
||||||
|
/* IRQ has not been requested but handling irq? */
|
||||||
|
WARN_ONCE(1, "Unexpected irq handling before port startup\n");
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
static int omap8250_probe(struct platform_device *pdev)
|
static int omap8250_probe(struct platform_device *pdev)
|
||||||
{
|
{
|
||||||
struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||||
|
@ -1075,6 +1139,7 @@ static int omap8250_probe(struct platform_device *pdev)
|
||||||
pm_runtime_get_sync(&pdev->dev);
|
pm_runtime_get_sync(&pdev->dev);
|
||||||
|
|
||||||
omap_serial_fill_features_erratas(&up, priv);
|
omap_serial_fill_features_erratas(&up, priv);
|
||||||
|
up.port.handle_irq = omap8250_no_handle_irq;
|
||||||
#ifdef CONFIG_SERIAL_8250_DMA
|
#ifdef CONFIG_SERIAL_8250_DMA
|
||||||
if (pdev->dev.of_node) {
|
if (pdev->dev.of_node) {
|
||||||
/*
|
/*
|
||||||
|
@ -1088,7 +1153,6 @@ static int omap8250_probe(struct platform_device *pdev)
|
||||||
ret = of_property_count_strings(pdev->dev.of_node, "dma-names");
|
ret = of_property_count_strings(pdev->dev.of_node, "dma-names");
|
||||||
if (ret == 2) {
|
if (ret == 2) {
|
||||||
up.dma = &priv->omap8250_dma;
|
up.dma = &priv->omap8250_dma;
|
||||||
up.port.handle_irq = omap_8250_dma_handle_irq;
|
|
||||||
priv->omap8250_dma.fn = the_no_dma_filter_fn;
|
priv->omap8250_dma.fn = the_no_dma_filter_fn;
|
||||||
priv->omap8250_dma.tx_dma = omap_8250_tx_dma;
|
priv->omap8250_dma.tx_dma = omap_8250_tx_dma;
|
||||||
priv->omap8250_dma.rx_dma = omap_8250_rx_dma;
|
priv->omap8250_dma.rx_dma = omap_8250_rx_dma;
|
||||||
|
|
|
@ -1249,20 +1249,19 @@ __acquires(&uap->port.lock)
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Transmit a character
|
* Transmit a character
|
||||||
* There must be at least one free entry in the TX FIFO to accept the char.
|
|
||||||
*
|
*
|
||||||
* Returns true if the FIFO might have space in it afterwards;
|
* Returns true if the character was successfully queued to the FIFO.
|
||||||
* returns false if the FIFO definitely became full.
|
* Returns false otherwise.
|
||||||
*/
|
*/
|
||||||
static bool pl011_tx_char(struct uart_amba_port *uap, unsigned char c)
|
static bool pl011_tx_char(struct uart_amba_port *uap, unsigned char c)
|
||||||
{
|
{
|
||||||
|
if (readw(uap->port.membase + UART01x_FR) & UART01x_FR_TXFF)
|
||||||
|
return false; /* unable to transmit character */
|
||||||
|
|
||||||
writew(c, uap->port.membase + UART01x_DR);
|
writew(c, uap->port.membase + UART01x_DR);
|
||||||
uap->port.icount.tx++;
|
uap->port.icount.tx++;
|
||||||
|
|
||||||
if (likely(uap->tx_irq_seen > 1))
|
return true;
|
||||||
return true;
|
|
||||||
|
|
||||||
return !(readw(uap->port.membase + UART01x_FR) & UART01x_FR_TXFF);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static bool pl011_tx_chars(struct uart_amba_port *uap)
|
static bool pl011_tx_chars(struct uart_amba_port *uap)
|
||||||
|
@ -1296,7 +1295,8 @@ static bool pl011_tx_chars(struct uart_amba_port *uap)
|
||||||
return false;
|
return false;
|
||||||
|
|
||||||
if (uap->port.x_char) {
|
if (uap->port.x_char) {
|
||||||
pl011_tx_char(uap, uap->port.x_char);
|
if (!pl011_tx_char(uap, uap->port.x_char))
|
||||||
|
goto done;
|
||||||
uap->port.x_char = 0;
|
uap->port.x_char = 0;
|
||||||
--count;
|
--count;
|
||||||
}
|
}
|
||||||
|
|
|
@ -911,6 +911,14 @@ static void dma_rx_callback(void *data)
|
||||||
|
|
||||||
status = dmaengine_tx_status(chan, (dma_cookie_t)0, &state);
|
status = dmaengine_tx_status(chan, (dma_cookie_t)0, &state);
|
||||||
count = RX_BUF_SIZE - state.residue;
|
count = RX_BUF_SIZE - state.residue;
|
||||||
|
|
||||||
|
if (readl(sport->port.membase + USR2) & USR2_IDLE) {
|
||||||
|
/* In condition [3] the SDMA counted up too early */
|
||||||
|
count--;
|
||||||
|
|
||||||
|
writel(USR2_IDLE, sport->port.membase + USR2);
|
||||||
|
}
|
||||||
|
|
||||||
dev_dbg(sport->port.dev, "We get %d bytes.\n", count);
|
dev_dbg(sport->port.dev, "We get %d bytes.\n", count);
|
||||||
|
|
||||||
if (count) {
|
if (count) {
|
||||||
|
|
|
@ -339,7 +339,7 @@
|
||||||
#define DWC3_DGCMD_SET_ENDPOINT_NRDY 0x0c
|
#define DWC3_DGCMD_SET_ENDPOINT_NRDY 0x0c
|
||||||
#define DWC3_DGCMD_RUN_SOC_BUS_LOOPBACK 0x10
|
#define DWC3_DGCMD_RUN_SOC_BUS_LOOPBACK 0x10
|
||||||
|
|
||||||
#define DWC3_DGCMD_STATUS(n) (((n) >> 15) & 1)
|
#define DWC3_DGCMD_STATUS(n) (((n) >> 12) & 0x0F)
|
||||||
#define DWC3_DGCMD_CMDACT (1 << 10)
|
#define DWC3_DGCMD_CMDACT (1 << 10)
|
||||||
#define DWC3_DGCMD_CMDIOC (1 << 8)
|
#define DWC3_DGCMD_CMDIOC (1 << 8)
|
||||||
|
|
||||||
|
@ -355,7 +355,7 @@
|
||||||
#define DWC3_DEPCMD_PARAM_SHIFT 16
|
#define DWC3_DEPCMD_PARAM_SHIFT 16
|
||||||
#define DWC3_DEPCMD_PARAM(x) ((x) << DWC3_DEPCMD_PARAM_SHIFT)
|
#define DWC3_DEPCMD_PARAM(x) ((x) << DWC3_DEPCMD_PARAM_SHIFT)
|
||||||
#define DWC3_DEPCMD_GET_RSC_IDX(x) (((x) >> DWC3_DEPCMD_PARAM_SHIFT) & 0x7f)
|
#define DWC3_DEPCMD_GET_RSC_IDX(x) (((x) >> DWC3_DEPCMD_PARAM_SHIFT) & 0x7f)
|
||||||
#define DWC3_DEPCMD_STATUS(x) (((x) >> 15) & 1)
|
#define DWC3_DEPCMD_STATUS(x) (((x) >> 12) & 0x0F)
|
||||||
#define DWC3_DEPCMD_HIPRI_FORCERM (1 << 11)
|
#define DWC3_DEPCMD_HIPRI_FORCERM (1 << 11)
|
||||||
#define DWC3_DEPCMD_CMDACT (1 << 10)
|
#define DWC3_DEPCMD_CMDACT (1 << 10)
|
||||||
#define DWC3_DEPCMD_CMDIOC (1 << 8)
|
#define DWC3_DEPCMD_CMDIOC (1 << 8)
|
||||||
|
|
|
@ -315,7 +315,6 @@ static ssize_t ffs_ep0_write(struct file *file, const char __user *buf,
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
set_bit(FFS_FL_CALL_CLOSED_CALLBACK, &ffs->flags);
|
|
||||||
return len;
|
return len;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
@ -847,7 +846,7 @@ static ssize_t ffs_epfile_io(struct file *file, struct ffs_io_data *io_data)
|
||||||
ret = ep->status;
|
ret = ep->status;
|
||||||
if (io_data->read && ret > 0) {
|
if (io_data->read && ret > 0) {
|
||||||
ret = copy_to_iter(data, ret, &io_data->data);
|
ret = copy_to_iter(data, ret, &io_data->data);
|
||||||
if (unlikely(iov_iter_count(&io_data->data)))
|
if (!ret)
|
||||||
ret = -EFAULT;
|
ret = -EFAULT;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -1463,8 +1462,7 @@ static void ffs_data_clear(struct ffs_data *ffs)
|
||||||
{
|
{
|
||||||
ENTER();
|
ENTER();
|
||||||
|
|
||||||
if (test_and_clear_bit(FFS_FL_CALL_CLOSED_CALLBACK, &ffs->flags))
|
ffs_closed(ffs);
|
||||||
ffs_closed(ffs);
|
|
||||||
|
|
||||||
BUG_ON(ffs->gadget);
|
BUG_ON(ffs->gadget);
|
||||||
|
|
||||||
|
@ -3422,9 +3420,13 @@ static int ffs_ready(struct ffs_data *ffs)
|
||||||
ffs_obj->desc_ready = true;
|
ffs_obj->desc_ready = true;
|
||||||
ffs_obj->ffs_data = ffs;
|
ffs_obj->ffs_data = ffs;
|
||||||
|
|
||||||
if (ffs_obj->ffs_ready_callback)
|
if (ffs_obj->ffs_ready_callback) {
|
||||||
ret = ffs_obj->ffs_ready_callback(ffs);
|
ret = ffs_obj->ffs_ready_callback(ffs);
|
||||||
|
if (ret)
|
||||||
|
goto done;
|
||||||
|
}
|
||||||
|
|
||||||
|
set_bit(FFS_FL_CALL_CLOSED_CALLBACK, &ffs->flags);
|
||||||
done:
|
done:
|
||||||
ffs_dev_unlock();
|
ffs_dev_unlock();
|
||||||
return ret;
|
return ret;
|
||||||
|
@ -3443,7 +3445,8 @@ static void ffs_closed(struct ffs_data *ffs)
|
||||||
|
|
||||||
ffs_obj->desc_ready = false;
|
ffs_obj->desc_ready = false;
|
||||||
|
|
||||||
if (ffs_obj->ffs_closed_callback)
|
if (test_and_clear_bit(FFS_FL_CALL_CLOSED_CALLBACK, &ffs->flags) &&
|
||||||
|
ffs_obj->ffs_closed_callback)
|
||||||
ffs_obj->ffs_closed_callback(ffs);
|
ffs_obj->ffs_closed_callback(ffs);
|
||||||
|
|
||||||
if (!ffs_obj->opts || ffs_obj->opts->no_configfs
|
if (!ffs_obj->opts || ffs_obj->opts->no_configfs
|
||||||
|
|
|
@ -973,7 +973,13 @@ static ssize_t f_midi_opts_id_show(struct f_midi_opts *opts, char *page)
|
||||||
int result;
|
int result;
|
||||||
|
|
||||||
mutex_lock(&opts->lock);
|
mutex_lock(&opts->lock);
|
||||||
result = strlcpy(page, opts->id, PAGE_SIZE);
|
if (opts->id) {
|
||||||
|
result = strlcpy(page, opts->id, PAGE_SIZE);
|
||||||
|
} else {
|
||||||
|
page[0] = 0;
|
||||||
|
result = 0;
|
||||||
|
}
|
||||||
|
|
||||||
mutex_unlock(&opts->lock);
|
mutex_unlock(&opts->lock);
|
||||||
|
|
||||||
return result;
|
return result;
|
||||||
|
|
|
@ -588,7 +588,10 @@ static int f_audio_set_alt(struct usb_function *f, unsigned intf, unsigned alt)
|
||||||
|
|
||||||
if (intf == 1) {
|
if (intf == 1) {
|
||||||
if (alt == 1) {
|
if (alt == 1) {
|
||||||
config_ep_by_speed(cdev->gadget, f, out_ep);
|
err = config_ep_by_speed(cdev->gadget, f, out_ep);
|
||||||
|
if (err)
|
||||||
|
return err;
|
||||||
|
|
||||||
usb_ep_enable(out_ep);
|
usb_ep_enable(out_ep);
|
||||||
out_ep->driver_data = audio;
|
out_ep->driver_data = audio;
|
||||||
audio->copy_buf = f_audio_buffer_alloc(audio_buf_size);
|
audio->copy_buf = f_audio_buffer_alloc(audio_buf_size);
|
||||||
|
|
|
@ -304,8 +304,10 @@ static int functionfs_ready_callback(struct ffs_data *ffs)
|
||||||
gfs_registered = true;
|
gfs_registered = true;
|
||||||
|
|
||||||
ret = usb_composite_probe(&gfs_driver);
|
ret = usb_composite_probe(&gfs_driver);
|
||||||
if (unlikely(ret < 0))
|
if (unlikely(ret < 0)) {
|
||||||
|
++missing_funcs;
|
||||||
gfs_registered = false;
|
gfs_registered = false;
|
||||||
|
}
|
||||||
|
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
|
@ -1487,7 +1487,7 @@ static int s3c2410_udc_pullup(struct usb_gadget *gadget, int is_on)
|
||||||
|
|
||||||
dprintk(DEBUG_NORMAL, "%s()\n", __func__);
|
dprintk(DEBUG_NORMAL, "%s()\n", __func__);
|
||||||
|
|
||||||
s3c2410_udc_set_pullup(udc, is_on ? 0 : 1);
|
s3c2410_udc_set_pullup(udc, is_on);
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue