m68knommu: modify timer init code to make it consistent with m68k code
With a few small changes we can make the m68knommu timer init code the same as the m68k code. By using the mach_sched_init function pointer and reworking the current timer initializers to keep track of the common m68k timer_interrupt() handler we end up with almost identical code for m68knommu. This will allow us to more easily merge the mmu and non-mmu m68k time.c in future patches. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
This commit is contained in:
parent
9517746131
commit
35aefb2645
|
@ -33,9 +33,8 @@ extern void (*mach_l2_flush) (int);
|
|||
extern void (*mach_beep) (unsigned int, unsigned int);
|
||||
|
||||
/* Hardware clock functions */
|
||||
extern void hw_timer_init(void);
|
||||
extern void hw_timer_init(irq_handler_t handler);
|
||||
extern unsigned long hw_timer_offset(void);
|
||||
extern irqreturn_t arch_timer_interrupt(int irq, void *dummy);
|
||||
|
||||
extern void config_BSP(char *command, int len);
|
||||
|
||||
|
|
|
@ -48,6 +48,7 @@ EXPORT_SYMBOL(memory_end);
|
|||
char __initdata command_line[COMMAND_LINE_SIZE];
|
||||
|
||||
/* machine dependent timer functions */
|
||||
void (*mach_sched_init)(irq_handler_t handler) __initdata = NULL;
|
||||
int (*mach_set_clock_mmss)(unsigned long);
|
||||
int (*mach_hwclk) (int, struct rtc_time*);
|
||||
|
||||
|
|
|
@ -32,12 +32,11 @@ static inline int set_rtc_mmss(unsigned long nowtime)
|
|||
return -1;
|
||||
}
|
||||
|
||||
#ifndef CONFIG_GENERIC_CLOCKEVENTS
|
||||
/*
|
||||
* timer_interrupt() needs to keep up the real-time clock,
|
||||
* as well as call the "xtime_update()" routine every clocktick
|
||||
*/
|
||||
irqreturn_t arch_timer_interrupt(int irq, void *dummy)
|
||||
static irqreturn_t timer_interrupt(int irq, void *dummy)
|
||||
{
|
||||
|
||||
if (current->pid)
|
||||
|
@ -49,7 +48,6 @@ irqreturn_t arch_timer_interrupt(int irq, void *dummy)
|
|||
|
||||
return(IRQ_HANDLED);
|
||||
}
|
||||
#endif
|
||||
|
||||
void read_persistent_clock(struct timespec *ts)
|
||||
{
|
||||
|
@ -72,7 +70,7 @@ int update_persistent_clock(struct timespec now)
|
|||
return set_rtc_mmss(now.tv_sec);
|
||||
}
|
||||
|
||||
void time_init(void)
|
||||
void __init time_init(void)
|
||||
{
|
||||
hw_timer_init();
|
||||
mach_sched_init(timer_interrupt);
|
||||
}
|
||||
|
|
|
@ -105,6 +105,7 @@ void __init config_BSP(char *commandp, int size)
|
|||
#endif /* CONFIG_NETtel */
|
||||
|
||||
mach_reset = m5206_cpu_reset;
|
||||
mach_sched_init = hw_timer_init;
|
||||
m5206_timers_init();
|
||||
m5206_uarts_init();
|
||||
|
||||
|
|
|
@ -291,6 +291,7 @@ static void m520x_cpu_reset(void)
|
|||
void __init config_BSP(char *commandp, int size)
|
||||
{
|
||||
mach_reset = m520x_cpu_reset;
|
||||
mach_sched_init = hw_timer_init;
|
||||
m520x_uarts_init();
|
||||
m520x_fec_init();
|
||||
#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
|
||||
|
|
|
@ -274,6 +274,7 @@ static void m523x_cpu_reset(void)
|
|||
void __init config_BSP(char *commandp, int size)
|
||||
{
|
||||
mach_reset = m523x_cpu_reset;
|
||||
mach_sched_init = hw_timer_init;
|
||||
}
|
||||
|
||||
/***************************************************************************/
|
||||
|
|
|
@ -307,6 +307,7 @@ void m5249_cpu_reset(void)
|
|||
void __init config_BSP(char *commandp, int size)
|
||||
{
|
||||
mach_reset = m5249_cpu_reset;
|
||||
mach_sched_init = hw_timer_init;
|
||||
m5249_timers_init();
|
||||
m5249_uarts_init();
|
||||
#ifdef CONFIG_M5249C3
|
||||
|
|
|
@ -146,6 +146,7 @@ void __init config_BSP(char *commandp, int size)
|
|||
#endif
|
||||
|
||||
mach_reset = m5272_cpu_reset;
|
||||
mach_sched_init = hw_timer_init;
|
||||
}
|
||||
|
||||
/***************************************************************************/
|
||||
|
|
|
@ -364,6 +364,7 @@ static void m527x_cpu_reset(void)
|
|||
void __init config_BSP(char *commandp, int size)
|
||||
{
|
||||
mach_reset = m527x_cpu_reset;
|
||||
mach_sched_init = hw_timer_init;
|
||||
m527x_uarts_init();
|
||||
m527x_fec_init();
|
||||
#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
|
||||
|
|
|
@ -306,6 +306,7 @@ void __init config_BSP(char *commandp, int size)
|
|||
static int __init init_BSP(void)
|
||||
{
|
||||
mach_reset = m528x_cpu_reset;
|
||||
mach_sched_init = hw_timer_init;
|
||||
m528x_uarts_init();
|
||||
m528x_fec_init();
|
||||
#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
|
||||
|
|
|
@ -115,6 +115,7 @@ void __init config_BSP(char *commandp, int size)
|
|||
#endif
|
||||
|
||||
mach_reset = m5307_cpu_reset;
|
||||
mach_sched_init = hw_timer_init;
|
||||
m5307_timers_init();
|
||||
m5307_uarts_init();
|
||||
|
||||
|
|
|
@ -263,6 +263,8 @@ void __init config_BSP(char *commandp, int size)
|
|||
}
|
||||
#endif
|
||||
|
||||
mach_sched_init = hw_timer_init;
|
||||
|
||||
#ifdef CONFIG_BDM_DISABLE
|
||||
/*
|
||||
* Disable the BDM clocking. This also turns off most of the rest of
|
||||
|
|
|
@ -99,6 +99,7 @@ void m5407_cpu_reset(void)
|
|||
void __init config_BSP(char *commandp, int size)
|
||||
{
|
||||
mach_reset = m5407_cpu_reset;
|
||||
mach_sched_init = hw_timer_init;
|
||||
m5407_timers_init();
|
||||
m5407_uarts_init();
|
||||
|
||||
|
|
|
@ -145,6 +145,7 @@ void __init config_BSP(char *commandp, int size)
|
|||
mmu_context_init();
|
||||
#endif
|
||||
mach_reset = mcf54xx_reset;
|
||||
mach_sched_init = hw_timer_init;
|
||||
m54xx_uarts_init();
|
||||
}
|
||||
|
||||
|
|
|
@ -149,7 +149,7 @@ static struct clocksource pit_clk = {
|
|||
|
||||
/***************************************************************************/
|
||||
|
||||
void hw_timer_init(void)
|
||||
void hw_timer_init(irq_handler_t handler)
|
||||
{
|
||||
cf_pit_clockevent.cpumask = cpumask_of(smp_processor_id());
|
||||
cf_pit_clockevent.mult = div_sc(FREQ, NSEC_PER_SEC, 32);
|
||||
|
|
|
@ -81,12 +81,14 @@ void mcfslt_profile_init(void)
|
|||
static u32 mcfslt_cycles_per_jiffy;
|
||||
static u32 mcfslt_cnt;
|
||||
|
||||
static irq_handler_t timer_interrupt;
|
||||
|
||||
static irqreturn_t mcfslt_tick(int irq, void *dummy)
|
||||
{
|
||||
/* Reset Slice Timer 0 */
|
||||
__raw_writel(MCFSLT_SSR_BE | MCFSLT_SSR_TE, TA(MCFSLT_SSR));
|
||||
mcfslt_cnt += mcfslt_cycles_per_jiffy;
|
||||
return arch_timer_interrupt(irq, dummy);
|
||||
return timer_interrupt(irq, dummy);
|
||||
}
|
||||
|
||||
static struct irqaction mcfslt_timer_irq = {
|
||||
|
@ -121,7 +123,7 @@ static struct clocksource mcfslt_clk = {
|
|||
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
|
||||
};
|
||||
|
||||
void hw_timer_init(void)
|
||||
void hw_timer_init(irq_handler_t handler)
|
||||
{
|
||||
mcfslt_cycles_per_jiffy = MCF_BUSCLK / HZ;
|
||||
/*
|
||||
|
@ -136,6 +138,7 @@ void hw_timer_init(void)
|
|||
/* initialize mcfslt_cnt knowing that slice timers count down */
|
||||
mcfslt_cnt = mcfslt_cycles_per_jiffy;
|
||||
|
||||
timer_interrupt = handler;
|
||||
setup_irq(MCF_IRQ_TIMER, &mcfslt_timer_irq);
|
||||
|
||||
clocksource_register_hz(&mcfslt_clk, MCF_BUSCLK);
|
||||
|
|
|
@ -47,6 +47,8 @@ void coldfire_profile_init(void);
|
|||
static u32 mcftmr_cycles_per_jiffy;
|
||||
static u32 mcftmr_cnt;
|
||||
|
||||
static irq_handler_t timer_interrupt;
|
||||
|
||||
/***************************************************************************/
|
||||
|
||||
static irqreturn_t mcftmr_tick(int irq, void *dummy)
|
||||
|
@ -55,7 +57,7 @@ static irqreturn_t mcftmr_tick(int irq, void *dummy)
|
|||
__raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, TA(MCFTIMER_TER));
|
||||
|
||||
mcftmr_cnt += mcftmr_cycles_per_jiffy;
|
||||
return arch_timer_interrupt(irq, dummy);
|
||||
return timer_interrupt(irq, dummy);
|
||||
}
|
||||
|
||||
/***************************************************************************/
|
||||
|
@ -94,7 +96,7 @@ static struct clocksource mcftmr_clk = {
|
|||
|
||||
/***************************************************************************/
|
||||
|
||||
void hw_timer_init(void)
|
||||
void hw_timer_init(irq_handler_t handler)
|
||||
{
|
||||
__raw_writew(MCFTIMER_TMR_DISABLE, TA(MCFTIMER_TMR));
|
||||
mcftmr_cycles_per_jiffy = FREQ / HZ;
|
||||
|
@ -110,6 +112,7 @@ void hw_timer_init(void)
|
|||
|
||||
clocksource_register_hz(&mcftmr_clk, FREQ);
|
||||
|
||||
timer_interrupt = handler;
|
||||
setup_irq(MCF_IRQ_TIMER, &mcftmr_timer_irq);
|
||||
|
||||
#ifdef CONFIG_HIGHPROFILE
|
||||
|
|
Loading…
Reference in a new issue