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drm/gk104/gr: disable PGOB at init time

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This removes the previous hack that worked on some boards.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs 2014-06-12 19:49:08 +10:00
parent 61854bdb13
commit 36b990260d
2 changed files with 7 additions and 25 deletions
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2
drivers/gpu/drm/nouveau/core/engine/graph/gk20a.c
View file

@ -39,7 +39,7 @@ gk20a_graph_oclass = &(struct nvc0_graph_oclass) {
.ctor = nvc0_graph_ctor, .ctor = nvc0_graph_ctor,
.dtor = nvc0_graph_dtor, .dtor = nvc0_graph_dtor,
.init = nve4_graph_init, .init = nve4_graph_init,
.fini = nve4_graph_fini, .fini = _nouveau_graph_fini,
}, },
.cclass = &gk20a_grctx_oclass, .cclass = &gk20a_grctx_oclass,
.sclass = gk20a_graph_sclass, .sclass = gk20a_graph_sclass,

30
drivers/gpu/drm/nouveau/core/engine/graph/nve4.c
View file

@ -22,6 +22,8 @@
* Authors: Ben Skeggs <bskeggs@redhat.com> * Authors: Ben Skeggs <bskeggs@redhat.com>
*/ */
#include <subdev/pwr.h>
#include "nvc0.h" #include "nvc0.h"
#include "ctxnvc0.h" #include "ctxnvc0.h"
@ -189,40 +191,20 @@ nve4_graph_pack_mmio[] = {
* PGRAPH engine/subdev functions * PGRAPH engine/subdev functions
******************************************************************************/ ******************************************************************************/
int
nve4_graph_fini(struct nouveau_object *object, bool suspend)
{
struct nvc0_graph_priv *priv = (void *)object;
/*XXX: this is a nasty hack to power on gr on certain boards
* where it's disabled by therm, somehow. ideally it'd
* be nice to know when we should be doing this, and why,
* but, it's yet to be determined. for now we test for
* the particular mmio error that occurs in the situation,
* and then bash therm in the way nvidia do.
*/
nv_mask(priv, 0x000200, 0x08001000, 0x08001000);
nv_rd32(priv, 0x000200);
if (nv_rd32(priv, 0x400700) == 0xbadf1000) {
nv_mask(priv, 0x000200, 0x08001000, 0x00000000);
nv_rd32(priv, 0x000200);
nv_mask(priv, 0x020004, 0xc0000000, 0x40000000);
}
return nouveau_graph_fini(&priv->base, suspend);
}
int int
nve4_graph_init(struct nouveau_object *object) nve4_graph_init(struct nouveau_object *object)
{ {
struct nvc0_graph_oclass *oclass = (void *)object->oclass; struct nvc0_graph_oclass *oclass = (void *)object->oclass;
struct nvc0_graph_priv *priv = (void *)object; struct nvc0_graph_priv *priv = (void *)object;
struct nouveau_pwr *ppwr = nouveau_pwr(priv);
const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, priv->tpc_total); const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, priv->tpc_total);
u32 data[TPC_MAX / 8] = {}; u32 data[TPC_MAX / 8] = {};
u8 tpcnr[GPC_MAX]; u8 tpcnr[GPC_MAX];
int gpc, tpc, rop; int gpc, tpc, rop;
int ret, i; int ret, i;
ppwr->pgob(ppwr, false);
ret = nouveau_graph_init(&priv->base); ret = nouveau_graph_init(&priv->base);
if (ret) if (ret)
return ret; return ret;
@ -350,7 +332,7 @@ nve4_graph_oclass = &(struct nvc0_graph_oclass) {
.ctor = nvc0_graph_ctor, .ctor = nvc0_graph_ctor,
.dtor = nvc0_graph_dtor, .dtor = nvc0_graph_dtor,
.init = nve4_graph_init, .init = nve4_graph_init,
.fini = nve4_graph_fini, .fini = _nouveau_graph_fini,
}, },
.cclass = &nve4_grctx_oclass, .cclass = &nve4_grctx_oclass,
.sclass = nve4_graph_sclass, .sclass = nve4_graph_sclass,