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MIPS: BMIPS: Move post DMA flush implementation to common header 

arch/mips/include/asm/mach-bmips/dma-coherence.h contains the
plat_post_dma_flush implementation which is not specific to mach-bmips,
but required for all BMIPS-based systems.

Move plat_post_dma_flush to arch/mips/include/asm/bmips.h, rename it to
bmips_post_dma_flush such that other platforms like bcm63xx can utilize
it.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Cc: jogo@openwrt.org
Patchwork: https://patchwork.linux-mips.org/patch/9724/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
wifi-calibration
Florian Fainelli 2015-04-07 13:34:00 -07:00 committed by Ralf Baechle
parent 87842661a3
commit 36fe976358
2 changed files with 17 additions and 15 deletions
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16
arch/mips/include/asm/bmips.h
View File

@ -122,6 +122,22 @@ static inline void bmips_write_zscm_reg(unsigned int offset, unsigned long data)
barrier();
}
static inline void bmips_post_dma_flush(struct device *dev)
{
void __iomem *cbr = BMIPS_GET_CBR();
u32 cfg;
if (boot_cpu_type() != CPU_BMIPS3300 &&
boot_cpu_type() != CPU_BMIPS4350 &&
boot_cpu_type() != CPU_BMIPS4380)
return;
/* Flush stale data out of the readahead cache */
cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG);
__raw_writel(cfg | 0x100, cbr + BMIPS_RAC_CONFIG);
__raw_readl(cbr + BMIPS_RAC_CONFIG);
}
#endif /* !defined(__ASSEMBLY__) */
#endif /* _ASM_BMIPS_H */

16
arch/mips/include/asm/mach-bmips/dma-coherence.h
View File

@ -49,20 +49,6 @@ static inline int plat_device_is_coherent(struct device *dev)
return 0;
}
static inline void plat_post_dma_flush(struct device *dev)
{
void __iomem *cbr = BMIPS_GET_CBR();
u32 cfg;
if (boot_cpu_type() != CPU_BMIPS3300 &&
boot_cpu_type() != CPU_BMIPS4350 &&
boot_cpu_type() != CPU_BMIPS4380)
return;
/* Flush stale data out of the readahead cache */
cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG);
__raw_writel(cfg | 0x100, cbr + BMIPS_RAC_CONFIG);
__raw_readl(cbr + BMIPS_RAC_CONFIG);
}
#define plat_post_dma_flush bmips_post_dma_flush
#endif /* __ASM_MACH_BMIPS_DMA_COHERENCE_H */