Staging: rtxxx0: remove superfluous RT30xx ifdefs
* add !RT30xx version of IS_RT3090() macro * remove superfluous RT30xx ifdefs * unify RT30xx and !RT30xx code where possible * kill RT28XX_UPDATE_PROTECT() macro * remove needless variable initializations * kill some needless function prototypes Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
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bf5f6ca4a8
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37843390d1
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@ -528,15 +528,8 @@ VOID SendRefreshBAR(
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sizeof(FRAME_BAR), &FrameBar,
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sizeof(FRAME_BAR), &FrameBar,
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END_OF_ARGS);
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END_OF_ARGS);
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if (1) // Now we always send BAR.
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MiniportMMRequest(pAd, QID_AC_BE, pOutBuffer, FrameLen);
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{
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#ifndef RT30xx
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MiniportMMRequest(pAd, 0, pOutBuffer, FrameLen);
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#endif
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#ifdef RT30xx
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MiniportMMRequest(pAd, QID_AC_BE, pOutBuffer, FrameLen);
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#endif
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}
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MlmeFreeMemory(pAd, pOutBuffer);
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MlmeFreeMemory(pAd, pOutBuffer);
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}
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}
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}
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}
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@ -1391,10 +1391,8 @@ VOID SendPSMPAction(
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//ULONG Idx;
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//ULONG Idx;
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FRAME_PSMP_ACTION Frame;
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FRAME_PSMP_ACTION Frame;
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ULONG FrameLen;
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ULONG FrameLen;
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#ifdef RT30xx
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UCHAR bbpdata=0;
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UCHAR bbpdata=0;
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UINT32 macdata;
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UINT32 macdata;
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#endif // RT30xx //
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NStatus = MlmeAllocateMemory(pAd, &pOutBuffer); //Get an unused nonpaged memory
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NStatus = MlmeAllocateMemory(pAd, &pOutBuffer); //Get an unused nonpaged memory
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if (NStatus != NDIS_STATUS_SUCCESS)
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if (NStatus != NDIS_STATUS_SUCCESS)
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@ -1410,7 +1408,6 @@ VOID SendPSMPAction(
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switch (Psmp)
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switch (Psmp)
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{
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{
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case MMPS_ENABLE:
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case MMPS_ENABLE:
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#ifdef RT30xx
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if (IS_RT3090(pAd))
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if (IS_RT3090(pAd))
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{
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{
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// disable MMPS BBP control register
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// disable MMPS BBP control register
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@ -1423,11 +1420,9 @@ VOID SendPSMPAction(
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macdata &= ~(0x09); //bit 0, 3
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macdata &= ~(0x09); //bit 0, 3
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RTMP_IO_WRITE32(pAd, 0x1210, macdata);
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RTMP_IO_WRITE32(pAd, 0x1210, macdata);
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}
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}
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#endif // RT30xx //
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Frame.Psmp = 0;
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Frame.Psmp = 0;
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break;
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break;
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case MMPS_DYNAMIC:
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case MMPS_DYNAMIC:
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#ifdef RT30xx
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if (IS_RT3090(pAd))
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if (IS_RT3090(pAd))
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{
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{
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// enable MMPS BBP control register
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// enable MMPS BBP control register
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@ -1440,11 +1435,9 @@ VOID SendPSMPAction(
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macdata |= 0x09; //bit 0, 3
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macdata |= 0x09; //bit 0, 3
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RTMP_IO_WRITE32(pAd, 0x1210, macdata);
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RTMP_IO_WRITE32(pAd, 0x1210, macdata);
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}
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}
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#endif // RT30xx //
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Frame.Psmp = 3;
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Frame.Psmp = 3;
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break;
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break;
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case MMPS_STATIC:
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case MMPS_STATIC:
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#ifdef RT30xx
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if (IS_RT3090(pAd))
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if (IS_RT3090(pAd))
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{
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{
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// enable MMPS BBP control register
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// enable MMPS BBP control register
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@ -1457,7 +1450,6 @@ VOID SendPSMPAction(
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macdata |= 0x09; //bit 0, 3
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macdata |= 0x09; //bit 0, 3
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RTMP_IO_WRITE32(pAd, 0x1210, macdata);
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RTMP_IO_WRITE32(pAd, 0x1210, macdata);
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}
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}
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#endif // RT30xx //
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Frame.Psmp = 1;
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Frame.Psmp = 1;
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break;
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break;
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}
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}
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@ -2616,7 +2616,9 @@ BOOLEAN MacTableDeleteEntry(
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AsicUpdateProtect(pAd, 0 /*pAd->CommonCfg.AddHTInfo.AddHtInfo2.OperaionMode*/, (ALLN_SETPROTECT), TRUE, 0 /*pAd->MacTab.fAnyStationNonGF*/);
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AsicUpdateProtect(pAd, 0 /*pAd->CommonCfg.AddHTInfo.AddHtInfo2.OperaionMode*/, (ALLN_SETPROTECT), TRUE, 0 /*pAd->MacTab.fAnyStationNonGF*/);
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#endif
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#endif
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#ifdef RT30xx
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#ifdef RT30xx
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RT28XX_UPDATE_PROTECT(pAd); // edit by johnli, fix "in_interrupt" error when call "MacTableDeleteEntry" in Rx tasklet
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// edit by johnli, fix "in_interrupt" error when call "MacTableDeleteEntry" in Rx tasklet
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// Set MAC register value according operation mode
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RTUSBEnqueueInternalCmd(pAd, CMDTHREAD_UPDATE_PROTECT, NULL, 0);
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#endif
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#endif
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}
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}
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@ -73,16 +73,12 @@ USHORT ShiftInBits(
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RaiseClock(pAd, &x);
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RaiseClock(pAd, &x);
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RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
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RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
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#ifdef RT30xx
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LowerClock(pAd, &x); //prevent read failed
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LowerClock(pAd, &x); /* prevent read failed */
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#endif
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x &= ~(EEDI);
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x &= ~(EEDI);
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if(x & EEDO)
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if(x & EEDO)
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data |= 1;
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data |= 1;
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#ifndef RT30xx
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LowerClock(pAd, &x);
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#endif
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}
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}
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return data;
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return data;
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@ -201,17 +197,13 @@ USHORT RTMP_EEPROM_READ16(
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x |= EECS;
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x |= EECS;
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RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
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RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
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#ifdef RT30xx
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// patch can not access e-Fuse issue
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// patch can not access e-Fuse issue
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if (!IS_RT3090(pAd))
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if (!IS_RT3090(pAd))
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{
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{
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#endif
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// kick a pulse
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// kick a pulse
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RaiseClock(pAd, &x);
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RaiseClock(pAd, &x);
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LowerClock(pAd, &x);
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LowerClock(pAd, &x);
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#ifdef RT30xx
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}
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}
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#endif
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// output the read_opcode and register number in that order
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// output the read_opcode and register number in that order
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ShiftOutBits(pAd, EEPROM_READ_OPCODE, 3);
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ShiftOutBits(pAd, EEPROM_READ_OPCODE, 3);
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@ -262,17 +254,13 @@ VOID RTMP_EEPROM_WRITE16(
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x |= EECS;
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x |= EECS;
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RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
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RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
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#ifdef RT30xx
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// patch can not access e-Fuse issue
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// patch can not access e-Fuse issue
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if (!IS_RT3090(pAd))
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if (!IS_RT3090(pAd))
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{
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{
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#endif
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// kick a pulse
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// kick a pulse
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RaiseClock(pAd, &x);
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RaiseClock(pAd, &x);
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LowerClock(pAd, &x);
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LowerClock(pAd, &x);
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#ifdef RT30xx
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}
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}
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#endif
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// output the read_opcode ,register number and data in that order
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// output the read_opcode ,register number and data in that order
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ShiftOutBits(pAd, EEPROM_WRITE_OPCODE, 3);
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ShiftOutBits(pAd, EEPROM_WRITE_OPCODE, 3);
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@ -449,13 +449,7 @@ FREQUENCY_ITEM FreqItems3020[] =
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{13, 247, 2, 2},
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{13, 247, 2, 2},
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{14, 248, 2, 4},
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{14, 248, 2, 4},
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};
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};
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#ifndef RT30xx
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#define NUM_OF_3020_CHNL (sizeof(FreqItems3020) / sizeof(FREQUENCY_ITEM))
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#endif
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#ifdef RT30xx
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//2008/07/10:KH Modified to share this variable
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UCHAR NUM_OF_3020_CHNL=(sizeof(FreqItems3020) / sizeof(FREQUENCY_ITEM));
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UCHAR NUM_OF_3020_CHNL=(sizeof(FreqItems3020) / sizeof(FREQUENCY_ITEM));
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#endif
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/*
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/*
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==========================================================================
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==========================================================================
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@ -3949,14 +3943,12 @@ VOID BssTableSsidSort(
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continue;
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continue;
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// check group cipher
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// check group cipher
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if (
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#ifndef RT30xx
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#ifndef RT30xx
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if ((pAd->StaCfg.WepStatus < pInBss->WPA.GroupCipher) &&
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pInBss->WPA.GroupCipher != Ndis802_11GroupWEP40Enabled &&
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(pInBss->WPA.GroupCipher != Ndis802_11GroupWEP40Enabled) &&
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pInBss->WPA.GroupCipher != Ndis802_11GroupWEP104Enabled &&
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(pInBss->WPA.GroupCipher != Ndis802_11GroupWEP104Enabled))
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#endif
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#ifdef RT30xx
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if (pAd->StaCfg.WepStatus < pInBss->WPA.GroupCipher)
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#endif
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#endif
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pAd->StaCfg.WepStatus < pInBss->WPA.GroupCipher)
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continue;
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continue;
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// check pairwise cipher, skip if none matched
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// check pairwise cipher, skip if none matched
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@ -3975,14 +3967,12 @@ VOID BssTableSsidSort(
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continue;
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continue;
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// check group cipher
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// check group cipher
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if (
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#ifndef RT30xx
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#ifndef RT30xx
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if ((pAd->StaCfg.WepStatus < pInBss->WPA.GroupCipher) &&
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pInBss->WPA2.GroupCipher != Ndis802_11GroupWEP40Enabled &&
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(pInBss->WPA2.GroupCipher != Ndis802_11GroupWEP40Enabled) &&
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pInBss->WPA2.GroupCipher != Ndis802_11GroupWEP104Enabled &&
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(pInBss->WPA2.GroupCipher != Ndis802_11GroupWEP104Enabled))
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#endif
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#ifdef RT30xx
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if (pAd->StaCfg.WepStatus < pInBss->WPA2.GroupCipher)
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#endif
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#endif
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pAd->StaCfg.WepStatus < pInBss->WPA2.GroupCipher)
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continue;
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continue;
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// check pairwise cipher, skip if none matched
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// check pairwise cipher, skip if none matched
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@ -8229,7 +8219,6 @@ VOID AsicSetRxAnt(
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IN PRTMP_ADAPTER pAd,
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IN PRTMP_ADAPTER pAd,
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IN UCHAR Ant)
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IN UCHAR Ant)
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{
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{
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#ifdef RT30xx
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UINT32 Value;
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UINT32 Value;
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UINT32 x;
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UINT32 x;
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@ -8268,7 +8257,6 @@ VOID AsicSetRxAnt(
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RTMP_IO_WRITE32(pAd, GPIO_CTRL_CFG, Value);
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RTMP_IO_WRITE32(pAd, GPIO_CTRL_CFG, Value);
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DBGPRINT_RAW(RT_DEBUG_TRACE, ("AsicSetRxAnt, switch to aux antenna\n"));
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DBGPRINT_RAW(RT_DEBUG_TRACE, ("AsicSetRxAnt, switch to aux antenna\n"));
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}
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}
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#endif // RT30xx //
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}
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}
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#endif /* RT30xx */
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#endif /* RT30xx */
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@ -8330,9 +8318,7 @@ VOID AsicEvaluateRxAnt(
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fRTMP_ADAPTER_NIC_NOT_EXIST |
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fRTMP_ADAPTER_NIC_NOT_EXIST |
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fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS) ||
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fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS) ||
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OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE)
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OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE)
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#ifdef RT30xx
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|| (pAd->EepromAccess)
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|| (pAd->EepromAccess)
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#endif // RT30xx //
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)
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)
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return;
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return;
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@ -8822,27 +8808,13 @@ VOID AsicStaBbpTuning(
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{
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{
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R66 = 0x1C + 2*GET_LNA_GAIN(pAd) + 0x20;
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R66 = 0x1C + 2*GET_LNA_GAIN(pAd) + 0x20;
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if (OrigR66Value != R66)
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if (OrigR66Value != R66)
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{
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#ifndef RT30xx
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RTUSBWriteBBPRegister(pAd, BBP_R66, R66);
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#endif
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#ifdef RT30xx
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RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
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RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
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#endif
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}
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}
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}
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else
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else
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{
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{
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R66 = 0x1C + 2*GET_LNA_GAIN(pAd);
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R66 = 0x1C + 2*GET_LNA_GAIN(pAd);
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if (OrigR66Value != R66)
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if (OrigR66Value != R66)
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{
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#ifndef RT30xx
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RTUSBWriteBBPRegister(pAd, BBP_R66, R66);
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#endif
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#ifdef RT30xx
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RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
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RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
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#endif
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}
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}
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}
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}
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}
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else
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else
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@ -9051,15 +9023,13 @@ VOID AsicTurnOffRFClk(
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UCHAR index;
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UCHAR index;
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RTMP_RF_REGS *RFRegTable;
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RTMP_RF_REGS *RFRegTable;
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#ifdef RT30xx
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// The RF programming sequence is difference between 3xxx and 2xxx
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// The RF programming sequence is difference between 3xxx and 2xxx
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if (IS_RT3090(pAd))
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if (IS_RT3090(pAd))
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{
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{
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RT30xxLoadRFSleepModeSetup(pAd); // add by johnli, RF power sequence setup, load RF sleep-mode setup
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RT30xxLoadRFSleepModeSetup(pAd); // add by johnli, RF power sequence setup, load RF sleep-mode setup
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return;
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}
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}
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else
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{
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#endif // RT30xx //
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RFRegTable = RF2850RegTable;
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RFRegTable = RF2850RegTable;
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switch (pAd->RfIcType)
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switch (pAd->RfIcType)
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@ -9101,10 +9071,6 @@ VOID AsicTurnOffRFClk(
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default:
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default:
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break;
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break;
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}
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}
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#ifdef RT30xx
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}
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#endif // RT30xx //
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}
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}
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@ -9118,14 +9084,10 @@ VOID AsicTurnOnRFClk(
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UCHAR index;
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UCHAR index;
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RTMP_RF_REGS *RFRegTable;
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RTMP_RF_REGS *RFRegTable;
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#ifdef RT30xx
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// The RF programming sequence is difference between 3xxx and 2xxx
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// The RF programming sequence is difference between 3xxx and 2xxx
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if (IS_RT3090(pAd))
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if (IS_RT3090(pAd))
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{
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return;
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}
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else
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{
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#endif // RT30xx //
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RFRegTable = RF2850RegTable;
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RFRegTable = RF2850RegTable;
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switch (pAd->RfIcType)
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switch (pAd->RfIcType)
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@ -9178,8 +9140,5 @@ VOID AsicTurnOnRFClk(
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pAd->RfIcType,
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pAd->RfIcType,
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R2));
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R2));
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#endif
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#endif
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#ifdef RT30xx
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}
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#endif // RT30xx //
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}
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}
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@ -1675,7 +1675,6 @@ VOID NICReadEEPROMParameters(
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Antenna.word = pAd->EEPROMDefaultValue[0];
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Antenna.word = pAd->EEPROMDefaultValue[0];
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if (Antenna.word == 0xFFFF)
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if (Antenna.word == 0xFFFF)
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{
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{
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#ifdef RT30xx
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if(IS_RT3090(pAd))
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if(IS_RT3090(pAd))
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{
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{
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Antenna.word = 0;
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Antenna.word = 0;
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@ -1685,15 +1684,12 @@ VOID NICReadEEPROMParameters(
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}
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}
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else
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else
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{
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{
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#endif // RT30xx //
|
|
||||||
Antenna.word = 0;
|
Antenna.word = 0;
|
||||||
Antenna.field.RfIcType = RFIC_2820;
|
Antenna.field.RfIcType = RFIC_2820;
|
||||||
Antenna.field.TxPath = 1;
|
Antenna.field.TxPath = 1;
|
||||||
Antenna.field.RxPath = 2;
|
Antenna.field.RxPath = 2;
|
||||||
DBGPRINT(RT_DEBUG_WARN, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
|
DBGPRINT(RT_DEBUG_WARN, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
|
||||||
#ifdef RT30xx
|
|
||||||
}
|
}
|
||||||
#endif // RT30xx //
|
|
||||||
}
|
}
|
||||||
|
|
||||||
// Choose the desired Tx&Rx stream.
|
// Choose the desired Tx&Rx stream.
|
||||||
|
@ -2445,7 +2441,6 @@ NDIS_STATUS NICInitializeAsic(
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef RT30xx
|
|
||||||
// Initialize RT3070 serial MAc registers which is different from RT2870 serial
|
// Initialize RT3070 serial MAc registers which is different from RT2870 serial
|
||||||
if (IS_RT3090(pAd))
|
if (IS_RT3090(pAd))
|
||||||
{
|
{
|
||||||
|
@ -2468,6 +2463,7 @@ NDIS_STATUS NICInitializeAsic(
|
||||||
RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0);
|
RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
#ifdef RT30xx
|
||||||
else if (IS_RT3070(pAd))
|
else if (IS_RT3070(pAd))
|
||||||
{
|
{
|
||||||
RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
|
RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
|
||||||
|
|
|
@ -535,10 +535,8 @@ typedef enum _NDIS_802_11_WEP_STATUS
|
||||||
Ndis802_11Encryption3KeyAbsent,
|
Ndis802_11Encryption3KeyAbsent,
|
||||||
Ndis802_11Encryption4Enabled, // TKIP or AES mix
|
Ndis802_11Encryption4Enabled, // TKIP or AES mix
|
||||||
Ndis802_11Encryption4KeyAbsent,
|
Ndis802_11Encryption4KeyAbsent,
|
||||||
#ifndef RT30xx
|
|
||||||
Ndis802_11GroupWEP40Enabled,
|
Ndis802_11GroupWEP40Enabled,
|
||||||
Ndis802_11GroupWEP104Enabled,
|
Ndis802_11GroupWEP104Enabled,
|
||||||
#endif
|
|
||||||
} NDIS_802_11_WEP_STATUS, *PNDIS_802_11_WEP_STATUS,
|
} NDIS_802_11_WEP_STATUS, *PNDIS_802_11_WEP_STATUS,
|
||||||
NDIS_802_11_ENCRYPTION_STATUS, *PNDIS_802_11_ENCRYPTION_STATUS;
|
NDIS_802_11_ENCRYPTION_STATUS, *PNDIS_802_11_ENCRYPTION_STATUS;
|
||||||
|
|
||||||
|
@ -626,17 +624,13 @@ typedef struct _NDIS_802_11_CAPABILITY
|
||||||
NDIS_802_11_AUTHENTICATION_ENCRYPTION AuthenticationEncryptionSupported[1];
|
NDIS_802_11_AUTHENTICATION_ENCRYPTION AuthenticationEncryptionSupported[1];
|
||||||
} NDIS_802_11_CAPABILITY, *PNDIS_802_11_CAPABILITY;
|
} NDIS_802_11_CAPABILITY, *PNDIS_802_11_CAPABILITY;
|
||||||
|
|
||||||
#ifdef RT30xx
|
|
||||||
#define RT_PRIV_IOCTL_EXT (SIOCIWFIRSTPRIV + 0x01) // Sync. with AP for wsc upnp daemon
|
#define RT_PRIV_IOCTL_EXT (SIOCIWFIRSTPRIV + 0x01) // Sync. with AP for wsc upnp daemon
|
||||||
#endif
|
|
||||||
#define RTPRIV_IOCTL_SET (SIOCIWFIRSTPRIV + 0x02)
|
#define RTPRIV_IOCTL_SET (SIOCIWFIRSTPRIV + 0x02)
|
||||||
|
|
||||||
#ifdef DBG
|
#ifdef DBG
|
||||||
#define RTPRIV_IOCTL_BBP (SIOCIWFIRSTPRIV + 0x03)
|
#define RTPRIV_IOCTL_BBP (SIOCIWFIRSTPRIV + 0x03)
|
||||||
#define RTPRIV_IOCTL_MAC (SIOCIWFIRSTPRIV + 0x05)
|
#define RTPRIV_IOCTL_MAC (SIOCIWFIRSTPRIV + 0x05)
|
||||||
#ifdef RT30xx
|
|
||||||
#define RTPRIV_IOCTL_RF (SIOCIWFIRSTPRIV + 0x13)
|
#define RTPRIV_IOCTL_RF (SIOCIWFIRSTPRIV + 0x13)
|
||||||
#endif
|
|
||||||
#define RTPRIV_IOCTL_E2P (SIOCIWFIRSTPRIV + 0x07)
|
#define RTPRIV_IOCTL_E2P (SIOCIWFIRSTPRIV + 0x07)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
@ -660,7 +654,7 @@ enum {
|
||||||
RAIO_OFF = 10,
|
RAIO_OFF = 10,
|
||||||
RAIO_ON = 11,
|
RAIO_ON = 11,
|
||||||
SHOW_CFG_VALUE = 20,
|
SHOW_CFG_VALUE = 20,
|
||||||
#if !defined(RT2860) && !defined(RT30xx)
|
#if !defined(RT2860)
|
||||||
SHOW_ADHOC_ENTRY_INFO = 21,
|
SHOW_ADHOC_ENTRY_INFO = 21,
|
||||||
#endif
|
#endif
|
||||||
};
|
};
|
||||||
|
|
|
@ -49,14 +49,8 @@
|
||||||
|
|
||||||
typedef int NTSTATUS;
|
typedef int NTSTATUS;
|
||||||
|
|
||||||
#ifdef RT30xx
|
|
||||||
#define OPT_14 0x114
|
#define OPT_14 0x114
|
||||||
|
|
||||||
#define RETRY_LIMIT 10
|
|
||||||
#define STATUS_SUCCESS 0x00
|
|
||||||
#define STATUS_UNSUCCESSFUL 0x01
|
|
||||||
#endif
|
|
||||||
|
|
||||||
//
|
//
|
||||||
// SCH/DMA registers - base address 0x0200
|
// SCH/DMA registers - base address 0x0200
|
||||||
//
|
//
|
||||||
|
@ -292,7 +286,6 @@ typedef union _USB_DMA_CFG_STRUC {
|
||||||
#define PBF_DBG 0x043c
|
#define PBF_DBG 0x043c
|
||||||
#define PBF_CAP_CTRL 0x0440
|
#define PBF_CAP_CTRL 0x0440
|
||||||
|
|
||||||
#ifdef RT30xx
|
|
||||||
// eFuse registers
|
// eFuse registers
|
||||||
#define EFUSE_CTRL 0x0580
|
#define EFUSE_CTRL 0x0580
|
||||||
#define EFUSE_DATA0 0x0590
|
#define EFUSE_DATA0 0x0590
|
||||||
|
@ -320,7 +313,6 @@ typedef union _EFUSE_CTRL_STRUC {
|
||||||
|
|
||||||
#define LDO_CFG0 0x05d4
|
#define LDO_CFG0 0x05d4
|
||||||
#define GPIO_SWITCH 0x05dc
|
#define GPIO_SWITCH 0x05dc
|
||||||
#endif /* RT30xx */
|
|
||||||
|
|
||||||
//
|
//
|
||||||
// 4 MAC registers
|
// 4 MAC registers
|
||||||
|
@ -1137,9 +1129,7 @@ typedef struct _HW_WCID_ENTRY { // 8-byte per entry
|
||||||
#define BBP_R22 22
|
#define BBP_R22 22
|
||||||
#define BBP_R24 24
|
#define BBP_R24 24
|
||||||
#define BBP_R25 25
|
#define BBP_R25 25
|
||||||
#ifdef RT30xx
|
|
||||||
#define BBP_R31 31
|
#define BBP_R31 31
|
||||||
#endif
|
|
||||||
#define BBP_R49 49 //TSSI
|
#define BBP_R49 49 //TSSI
|
||||||
#define BBP_R50 50
|
#define BBP_R50 50
|
||||||
#define BBP_R51 51
|
#define BBP_R51 51
|
||||||
|
@ -1157,10 +1147,8 @@ typedef struct _HW_WCID_ENTRY { // 8-byte per entry
|
||||||
#define BBP_R73 73
|
#define BBP_R73 73
|
||||||
#define BBP_R75 75
|
#define BBP_R75 75
|
||||||
#define BBP_R77 77
|
#define BBP_R77 77
|
||||||
#ifdef RT30xx
|
|
||||||
#define BBP_R79 79
|
#define BBP_R79 79
|
||||||
#define BBP_R80 80
|
#define BBP_R80 80
|
||||||
#endif
|
|
||||||
#define BBP_R81 81
|
#define BBP_R81 81
|
||||||
#define BBP_R82 82
|
#define BBP_R82 82
|
||||||
#define BBP_R83 83
|
#define BBP_R83 83
|
||||||
|
@ -1182,9 +1170,7 @@ typedef struct _HW_WCID_ENTRY { // 8-byte per entry
|
||||||
#define BBP_R121 121
|
#define BBP_R121 121
|
||||||
#define BBP_R122 122
|
#define BBP_R122 122
|
||||||
#define BBP_R123 123
|
#define BBP_R123 123
|
||||||
#ifdef RT30xx
|
|
||||||
#define BBP_R138 138 // add by johnli, RF power sequence setup, ADC dynamic on/off control
|
#define BBP_R138 138 // add by johnli, RF power sequence setup, ADC dynamic on/off control
|
||||||
#endif // RT30xx //
|
|
||||||
|
|
||||||
|
|
||||||
#define BBPR94_DEFAULT 0x06 // Add 1 value will gain 1db
|
#define BBPR94_DEFAULT 0x06 // Add 1 value will gain 1db
|
||||||
|
@ -1608,15 +1594,10 @@ typedef union _EEPROM_NIC_CINFIG2_STRUC {
|
||||||
USHORT EnableWPSPBC:1; // WPS PBC Control bit
|
USHORT EnableWPSPBC:1; // WPS PBC Control bit
|
||||||
USHORT BW40MAvailForG:1; // 0:enable, 1:disable
|
USHORT BW40MAvailForG:1; // 0:enable, 1:disable
|
||||||
USHORT BW40MAvailForA:1; // 0:enable, 1:disable
|
USHORT BW40MAvailForA:1; // 0:enable, 1:disable
|
||||||
#ifndef RT30xx
|
|
||||||
USHORT Rsv2:6; // must be 0
|
|
||||||
#endif
|
|
||||||
#ifdef RT30xx
|
|
||||||
USHORT Rsv1:1; // must be 0
|
USHORT Rsv1:1; // must be 0
|
||||||
USHORT AntDiversity:1; // Antenna diversity
|
USHORT AntDiversity:1; // Antenna diversity
|
||||||
USHORT Rsv2:3; // must be 0
|
USHORT Rsv2:3; // must be 0
|
||||||
USHORT DACTestBit:1; // control if driver should patch the DAC issue
|
USHORT DACTestBit:1; // control if driver should patch the DAC issue
|
||||||
#endif
|
|
||||||
} field;
|
} field;
|
||||||
USHORT word;
|
USHORT word;
|
||||||
} EEPROM_NIC_CONFIG2_STRUC, *PEEPROM_NIC_CONFIG2_STRUC;
|
} EEPROM_NIC_CONFIG2_STRUC, *PEEPROM_NIC_CONFIG2_STRUC;
|
||||||
|
|
|
@ -403,6 +403,8 @@ typedef struct _QUEUE_HEADER {
|
||||||
#ifdef RT30xx
|
#ifdef RT30xx
|
||||||
// We will have a cost down version which mac version is 0x3090xxxx
|
// We will have a cost down version which mac version is 0x3090xxxx
|
||||||
#define IS_RT3090(_pAd) ((((_pAd)->MACVersion & 0xffff0000) == 0x30710000) || (((_pAd)->MACVersion & 0xffff0000) == 0x30900000))
|
#define IS_RT3090(_pAd) ((((_pAd)->MACVersion & 0xffff0000) == 0x30710000) || (((_pAd)->MACVersion & 0xffff0000) == 0x30900000))
|
||||||
|
#else
|
||||||
|
#define IS_RT3090(_pAd) 0
|
||||||
#endif
|
#endif
|
||||||
#define IS_RT3070(_pAd) (((_pAd)->MACVersion & 0xffff0000) == 0x30700000)
|
#define IS_RT3070(_pAd) (((_pAd)->MACVersion & 0xffff0000) == 0x30700000)
|
||||||
#ifdef RT30xx
|
#ifdef RT30xx
|
||||||
|
@ -928,7 +930,6 @@ typedef struct _RTMP_SCATTER_GATHER_LIST {
|
||||||
}
|
}
|
||||||
#endif // RT2870 //
|
#endif // RT2870 //
|
||||||
|
|
||||||
#ifdef RT30xx
|
|
||||||
//Need to collect each ant's rssi concurrently
|
//Need to collect each ant's rssi concurrently
|
||||||
//rssi1 is report to pair2 Ant and rss2 is reprot to pair1 Ant when 4 Ant
|
//rssi1 is report to pair2 Ant and rss2 is reprot to pair1 Ant when 4 Ant
|
||||||
#define COLLECT_RX_ANTENNA_AVERAGE_RSSI(_pAd, _rssi1, _rssi2) \
|
#define COLLECT_RX_ANTENNA_AVERAGE_RSSI(_pAd, _rssi1, _rssi2) \
|
||||||
|
@ -960,8 +961,6 @@ typedef struct _RTMP_SCATTER_GATHER_LIST {
|
||||||
_pAd->RxAnt.RcvPktNumWhenEvaluate++; \
|
_pAd->RxAnt.RcvPktNumWhenEvaluate++; \
|
||||||
} \
|
} \
|
||||||
}
|
}
|
||||||
#endif // RT30xx //
|
|
||||||
|
|
||||||
|
|
||||||
#define NDIS_QUERY_BUFFER(_NdisBuf, _ppVA, _pBufLen) \
|
#define NDIS_QUERY_BUFFER(_NdisBuf, _ppVA, _pBufLen) \
|
||||||
NdisQueryBuffer(_NdisBuf, _ppVA, _pBufLen)
|
NdisQueryBuffer(_NdisBuf, _ppVA, _pBufLen)
|
||||||
|
@ -4885,11 +4884,9 @@ CHAR RTMPMaxRssi(
|
||||||
IN CHAR Rssi1,
|
IN CHAR Rssi1,
|
||||||
IN CHAR Rssi2);
|
IN CHAR Rssi2);
|
||||||
|
|
||||||
#ifdef RT30xx
|
|
||||||
VOID AsicSetRxAnt(
|
VOID AsicSetRxAnt(
|
||||||
IN PRTMP_ADAPTER pAd,
|
IN PRTMP_ADAPTER pAd,
|
||||||
IN UCHAR Ant);
|
IN UCHAR Ant);
|
||||||
#endif
|
|
||||||
|
|
||||||
VOID AsicEvaluateRxAnt(
|
VOID AsicEvaluateRxAnt(
|
||||||
IN PRTMP_ADAPTER pAd);
|
IN PRTMP_ADAPTER pAd);
|
||||||
|
@ -5564,11 +5561,6 @@ VOID RTMPSendTriggerFrame(
|
||||||
IN UCHAR TxRate,
|
IN UCHAR TxRate,
|
||||||
IN BOOLEAN bQosNull);
|
IN BOOLEAN bQosNull);
|
||||||
|
|
||||||
#ifdef RT30xx
|
|
||||||
VOID RTMPFilterCalibration(
|
|
||||||
IN PRTMP_ADAPTER pAd);
|
|
||||||
#endif // RT30xx //
|
|
||||||
|
|
||||||
/* timeout -- ms */
|
/* timeout -- ms */
|
||||||
VOID RTMP_SetPeriodicTimer(
|
VOID RTMP_SetPeriodicTimer(
|
||||||
IN NDIS_MINIPORT_TIMER *pTimer,
|
IN NDIS_MINIPORT_TIMER *pTimer,
|
||||||
|
@ -6538,8 +6530,6 @@ NTSTATUS RT30xxReadRFRegister(
|
||||||
IN UCHAR RegID,
|
IN UCHAR RegID,
|
||||||
IN PUCHAR pValue);
|
IN PUCHAR pValue);
|
||||||
|
|
||||||
#ifdef RT30xx
|
|
||||||
//2008/09/11:KH add to support efuse<--
|
|
||||||
UCHAR eFuseReadRegisters(
|
UCHAR eFuseReadRegisters(
|
||||||
IN PRTMP_ADAPTER pAd,
|
IN PRTMP_ADAPTER pAd,
|
||||||
IN USHORT Offset,
|
IN USHORT Offset,
|
||||||
|
@ -6615,11 +6605,7 @@ NDIS_STATUS NICLoadEEPROM(
|
||||||
|
|
||||||
BOOLEAN bNeedLoadEEPROM(
|
BOOLEAN bNeedLoadEEPROM(
|
||||||
IN PRTMP_ADAPTER pAd);
|
IN PRTMP_ADAPTER pAd);
|
||||||
//2008/09/11:KH add to support efuse-->
|
|
||||||
#endif // RT30xx //
|
|
||||||
|
|
||||||
#ifdef RT30xx
|
|
||||||
// add by johnli, RF power sequence setup
|
|
||||||
VOID RT30xxLoadRFNormalModeSetup(
|
VOID RT30xxLoadRFNormalModeSetup(
|
||||||
IN PRTMP_ADAPTER pAd);
|
IN PRTMP_ADAPTER pAd);
|
||||||
|
|
||||||
|
@ -6628,8 +6614,6 @@ VOID RT30xxLoadRFSleepModeSetup(
|
||||||
|
|
||||||
VOID RT30xxReverseRFSleepModeSetup(
|
VOID RT30xxReverseRFSleepModeSetup(
|
||||||
IN PRTMP_ADAPTER pAd);
|
IN PRTMP_ADAPTER pAd);
|
||||||
// end johnli
|
|
||||||
#endif // RT30xx //
|
|
||||||
|
|
||||||
#ifdef RT2870
|
#ifdef RT2870
|
||||||
//
|
//
|
||||||
|
|
|
@ -148,11 +148,7 @@
|
||||||
#define MAX_PACKETS_IN_PS_QUEUE 128 //32
|
#define MAX_PACKETS_IN_PS_QUEUE 128 //32
|
||||||
#define WMM_NUM_OF_AC 4 /* AC0, AC1, AC2, and AC3 */
|
#define WMM_NUM_OF_AC 4 /* AC0, AC1, AC2, and AC3 */
|
||||||
|
|
||||||
#ifdef RT30xx
|
|
||||||
//2008/09/11:KH add to support efuse<--
|
|
||||||
#define MAX_EEPROM_BIN_FILE_SIZE 1024
|
#define MAX_EEPROM_BIN_FILE_SIZE 1024
|
||||||
//2008/09/11:KH add to support efuse-->
|
|
||||||
#endif
|
|
||||||
|
|
||||||
// RxFilter
|
// RxFilter
|
||||||
#define STANORMAL 0x17f97
|
#define STANORMAL 0x17f97
|
||||||
|
@ -1210,10 +1206,8 @@
|
||||||
#define RFIC_2750 4 // 2.4G/5G 1T2R
|
#define RFIC_2750 4 // 2.4G/5G 1T2R
|
||||||
#define RFIC_3020 5 // 2.4G 1T1R
|
#define RFIC_3020 5 // 2.4G 1T1R
|
||||||
#define RFIC_2020 6 // 2.4G B/G
|
#define RFIC_2020 6 // 2.4G B/G
|
||||||
#ifdef RT30xx
|
|
||||||
#define RFIC_3021 7 // 2.4G 1T2R
|
#define RFIC_3021 7 // 2.4G 1T2R
|
||||||
#define RFIC_3022 8 // 2.4G 2T2R
|
#define RFIC_3022 8 // 2.4G 2T2R
|
||||||
#endif
|
|
||||||
|
|
||||||
// LED Status.
|
// LED Status.
|
||||||
#define LED_LINK_DOWN 0
|
#define LED_LINK_DOWN 0
|
||||||
|
|
|
@ -1711,15 +1711,12 @@ VOID LinkUp(
|
||||||
// Txop can only be modified when RDG is off, WMM is disable and TxBurst is enable
|
// Txop can only be modified when RDG is off, WMM is disable and TxBurst is enable
|
||||||
//
|
//
|
||||||
// if 1. Legacy AP WMM on, or 2. 11n AP, AMPDU disable. Force turn off burst no matter what bEnableTxBurst is.
|
// if 1. Legacy AP WMM on, or 2. 11n AP, AMPDU disable. Force turn off burst no matter what bEnableTxBurst is.
|
||||||
|
if (
|
||||||
#ifdef RT30xx
|
#ifdef RT30xx
|
||||||
if (!((pAd->CommonCfg.RxStream == 1)&&(pAd->CommonCfg.TxStream == 1)) &&
|
!(pAd->CommonCfg.RxStream == 1 && pAd->CommonCfg.TxStream == 1) &&
|
||||||
|
#endif
|
||||||
(((pAd->StaActive.SupportedPhyInfo.bHtEnable == FALSE) && OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_WMM_INUSED))
|
(((pAd->StaActive.SupportedPhyInfo.bHtEnable == FALSE) && OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_WMM_INUSED))
|
||||||
|| ((pAd->StaActive.SupportedPhyInfo.bHtEnable == TRUE) && (pAd->CommonCfg.BACapability.field.Policy == BA_NOTUSE))))
|
|| ((pAd->StaActive.SupportedPhyInfo.bHtEnable == TRUE) && (pAd->CommonCfg.BACapability.field.Policy == BA_NOTUSE))))
|
||||||
#endif
|
|
||||||
#ifndef RT30xx
|
|
||||||
if (((pAd->StaActive.SupportedPhyInfo.bHtEnable == FALSE) && (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_WMM_INUSED)))
|
|
||||||
|| ((pAd->StaActive.SupportedPhyInfo.bHtEnable == TRUE) && (pAd->CommonCfg.BACapability.field.Policy == BA_NOTUSE)))
|
|
||||||
#endif
|
|
||||||
{
|
{
|
||||||
RTMP_IO_READ32(pAd, EDCA_AC0_CFG, &Data);
|
RTMP_IO_READ32(pAd, EDCA_AC0_CFG, &Data);
|
||||||
Data &= 0xFFFFFF00;
|
Data &= 0xFFFFFF00;
|
||||||
|
@ -2101,7 +2098,6 @@ VOID LinkDown(
|
||||||
wireless_send_event(pAd->net_dev, SIOCGIWAP, &wrqu, NULL);
|
wireless_send_event(pAd->net_dev, SIOCGIWAP, &wrqu, NULL);
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef RT30xx
|
|
||||||
if (IS_RT3090(pAd))
|
if (IS_RT3090(pAd))
|
||||||
{
|
{
|
||||||
UINT32 macdata;
|
UINT32 macdata;
|
||||||
|
@ -2115,7 +2111,6 @@ VOID LinkDown(
|
||||||
macdata &= ~(0x09); //bit 0, 3
|
macdata &= ~(0x09); //bit 0, 3
|
||||||
RTMP_IO_WRITE32(pAd, 0x1210, macdata);
|
RTMP_IO_WRITE32(pAd, 0x1210, macdata);
|
||||||
}
|
}
|
||||||
#endif // RT30xx //
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
@ -575,14 +575,12 @@ VOID STAHandleRxMgmtFrame(
|
||||||
{
|
{
|
||||||
|
|
||||||
// We should collect RSSI not only U2M data but also my beacon
|
// We should collect RSSI not only U2M data but also my beacon
|
||||||
|
if (
|
||||||
#ifdef RT30xx
|
#ifdef RT30xx
|
||||||
if ((pHeader->FC.SubType == SUBTYPE_BEACON) && (MAC_ADDR_EQUAL(&pAd->CommonCfg.Bssid, &pHeader->Addr2))
|
pAd->RxAnt.EvaluatePeriod == 0 &&
|
||||||
&& (pAd->RxAnt.EvaluatePeriod == 0))
|
|
||||||
#endif
|
#endif
|
||||||
#ifndef RT30xx
|
pHeader->FC.SubType == SUBTYPE_BEACON &&
|
||||||
if ((pHeader->FC.SubType == SUBTYPE_BEACON) && (MAC_ADDR_EQUAL(&pAd->CommonCfg.Bssid, &pHeader->Addr2)))
|
MAC_ADDR_EQUAL(&pAd->CommonCfg.Bssid, &pHeader->Addr2)) {
|
||||||
#endif
|
|
||||||
{
|
|
||||||
Update_Rssi_Sample(pAd, &pAd->StaCfg.RssiSample, pRxWI);
|
Update_Rssi_Sample(pAd, &pAd->StaCfg.RssiSample, pRxWI);
|
||||||
|
|
||||||
pAd->StaCfg.LastSNR0 = (UCHAR)(pRxWI->SNR0);
|
pAd->StaCfg.LastSNR0 = (UCHAR)(pRxWI->SNR0);
|
||||||
|
|
|
@ -1676,15 +1676,11 @@ int rt_ioctl_siwencode(struct net_device *dev,
|
||||||
pAdapter->StaCfg.OrigWepStatus = pAdapter->StaCfg.WepStatus;
|
pAdapter->StaCfg.OrigWepStatus = pAdapter->StaCfg.WepStatus;
|
||||||
pAdapter->StaCfg.AuthMode = Ndis802_11AuthModeOpen;
|
pAdapter->StaCfg.AuthMode = Ndis802_11AuthModeOpen;
|
||||||
goto done;
|
goto done;
|
||||||
}
|
} else if (
|
||||||
#ifndef RT30xx
|
#ifndef RT30xx
|
||||||
else if ((erq->length == 0) &&
|
erq->length == 0 &&
|
||||||
(erq->flags & IW_ENCODE_RESTRICTED || erq->flags & IW_ENCODE_OPEN))
|
|
||||||
#endif
|
#endif
|
||||||
#ifdef RT30xx
|
(erq->flags & IW_ENCODE_RESTRICTED || erq->flags & IW_ENCODE_OPEN)) {
|
||||||
else if (erq->flags & IW_ENCODE_RESTRICTED || erq->flags & IW_ENCODE_OPEN)
|
|
||||||
#endif
|
|
||||||
{
|
|
||||||
STA_PORT_SECURED(pAdapter);
|
STA_PORT_SECURED(pAdapter);
|
||||||
pAdapter->StaCfg.PairCipher = Ndis802_11WEPEnabled;
|
pAdapter->StaCfg.PairCipher = Ndis802_11WEPEnabled;
|
||||||
pAdapter->StaCfg.GroupCipher = Ndis802_11WEPEnabled;
|
pAdapter->StaCfg.GroupCipher = Ndis802_11WEPEnabled;
|
||||||
|
|
|
@ -90,9 +90,7 @@
|
||||||
#define TKIP_AP_RXMICK_OFFSET (TKIP_AP_TXMICK_OFFSET+LEN_TKIP_TXMICK)
|
#define TKIP_AP_RXMICK_OFFSET (TKIP_AP_TXMICK_OFFSET+LEN_TKIP_TXMICK)
|
||||||
#define TKIP_GTK_LENGTH ((LEN_TKIP_EK)+(LEN_TKIP_RXMICK)+(LEN_TKIP_TXMICK))
|
#define TKIP_GTK_LENGTH ((LEN_TKIP_EK)+(LEN_TKIP_RXMICK)+(LEN_TKIP_TXMICK))
|
||||||
#define LEN_PTK ((LEN_EAP_KEY)+(LEN_TKIP_KEY))
|
#define LEN_PTK ((LEN_EAP_KEY)+(LEN_TKIP_KEY))
|
||||||
#ifndef RT30xx
|
|
||||||
#define MIN_LEN_OF_GTK 5
|
#define MIN_LEN_OF_GTK 5
|
||||||
#endif
|
|
||||||
|
|
||||||
// RSN IE Length definition
|
// RSN IE Length definition
|
||||||
#define MAX_LEN_OF_RSNIE 90
|
#define MAX_LEN_OF_RSNIE 90
|
||||||
|
|
|
@ -1101,12 +1101,7 @@ BOOLEAN RT28XXChipsetCheck(
|
||||||
if (dev_p->descriptor.idVendor == rtusb_usb_id[i].idVendor &&
|
if (dev_p->descriptor.idVendor == rtusb_usb_id[i].idVendor &&
|
||||||
dev_p->descriptor.idProduct == rtusb_usb_id[i].idProduct)
|
dev_p->descriptor.idProduct == rtusb_usb_id[i].idProduct)
|
||||||
{
|
{
|
||||||
#ifndef RT30xx
|
|
||||||
printk("rt2870: idVendor = 0x%x, idProduct = 0x%x\n",
|
printk("rt2870: idVendor = 0x%x, idProduct = 0x%x\n",
|
||||||
#endif
|
|
||||||
#ifdef RT30xx
|
|
||||||
printk("rt2870: idVendor = 0x%x, idProduct = 0x%x\n",
|
|
||||||
#endif
|
|
||||||
dev_p->descriptor.idVendor, dev_p->descriptor.idProduct);
|
dev_p->descriptor.idVendor, dev_p->descriptor.idProduct);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
|
@ -737,12 +737,7 @@ NDIS_STATUS CreateThreads(
|
||||||
{
|
{
|
||||||
PRTMP_ADAPTER pAd = net_dev->ml_priv;
|
PRTMP_ADAPTER pAd = net_dev->ml_priv;
|
||||||
POS_COOKIE pObj = (POS_COOKIE) pAd->OS_Cookie;
|
POS_COOKIE pObj = (POS_COOKIE) pAd->OS_Cookie;
|
||||||
#ifndef RT30xx
|
|
||||||
pid_t pid_number = -1;
|
|
||||||
#endif
|
|
||||||
#ifdef RT30xx
|
|
||||||
pid_t pid_number;
|
pid_t pid_number;
|
||||||
#endif
|
|
||||||
|
|
||||||
//init_MUTEX(&(pAd->usbdev_semaphore));
|
//init_MUTEX(&(pAd->usbdev_semaphore));
|
||||||
|
|
||||||
|
|
|
@ -46,9 +46,7 @@
|
||||||
#define MAX_TXBULK_SIZE (LOCAL_TXBUF_SIZE*BULKAGGRE_ZISE)
|
#define MAX_TXBULK_SIZE (LOCAL_TXBUF_SIZE*BULKAGGRE_ZISE)
|
||||||
#define MAX_RXBULK_SIZE (LOCAL_TXBUF_SIZE*RXBULKAGGRE_ZISE)
|
#define MAX_RXBULK_SIZE (LOCAL_TXBUF_SIZE*RXBULKAGGRE_ZISE)
|
||||||
#define MAX_MLME_HANDLER_MEMORY 20
|
#define MAX_MLME_HANDLER_MEMORY 20
|
||||||
#ifndef RT30xx
|
|
||||||
#define RETRY_LIMIT 10
|
#define RETRY_LIMIT 10
|
||||||
#endif
|
|
||||||
#define BUFFER_SIZE 2400 //2048
|
#define BUFFER_SIZE 2400 //2048
|
||||||
#define TX_RING 0xa
|
#define TX_RING 0xa
|
||||||
#define PRIO_RING 0xc
|
#define PRIO_RING 0xc
|
||||||
|
@ -64,9 +62,7 @@
|
||||||
#define fRTUSB_BULK_OUT_DATA_NORMAL_2 0x00020000
|
#define fRTUSB_BULK_OUT_DATA_NORMAL_2 0x00020000
|
||||||
#define fRTUSB_BULK_OUT_DATA_NORMAL_3 0x00040000
|
#define fRTUSB_BULK_OUT_DATA_NORMAL_3 0x00040000
|
||||||
#define fRTUSB_BULK_OUT_DATA_NORMAL_4 0x00080000
|
#define fRTUSB_BULK_OUT_DATA_NORMAL_4 0x00080000
|
||||||
#ifdef RT30xx
|
|
||||||
#define fRTUSB_BULK_OUT_DATA_NORMAL_5 0x00100000
|
#define fRTUSB_BULK_OUT_DATA_NORMAL_5 0x00100000
|
||||||
#endif
|
|
||||||
|
|
||||||
#define fRTUSB_BULK_OUT_PSPOLL 0x00000020
|
#define fRTUSB_BULK_OUT_PSPOLL 0x00000020
|
||||||
#define fRTUSB_BULK_OUT_DATA_FRAG 0x00000040
|
#define fRTUSB_BULK_OUT_DATA_FRAG 0x00000040
|
||||||
|
@ -284,14 +280,6 @@ extern UCHAR EpToQueue[6];
|
||||||
RTUSBEnqueueInternalCmd(pAd, CMDTHREAD_SET_CLIENT_MAC_ENTRY, \
|
RTUSBEnqueueInternalCmd(pAd, CMDTHREAD_SET_CLIENT_MAC_ENTRY, \
|
||||||
pEntry, sizeof(MAC_TABLE_ENTRY));
|
pEntry, sizeof(MAC_TABLE_ENTRY));
|
||||||
|
|
||||||
#ifdef RT30xx
|
|
||||||
// add by johnli, fix "in_interrupt" error when call "MacTableDeleteEntry" in Rx tasklet
|
|
||||||
// Set MAC register value according operation mode
|
|
||||||
#define RT28XX_UPDATE_PROTECT(pAd) \
|
|
||||||
RTUSBEnqueueInternalCmd(pAd, CMDTHREAD_UPDATE_PROTECT, NULL, 0);
|
|
||||||
// end johnli
|
|
||||||
#endif
|
|
||||||
|
|
||||||
// remove Pair-wise key material from ASIC
|
// remove Pair-wise key material from ASIC
|
||||||
// yet implement
|
// yet implement
|
||||||
#define RT28XX_STA_ENTRY_KEY_DEL(pAd, BssIdx, Wcid)
|
#define RT28XX_STA_ENTRY_KEY_DEL(pAd, BssIdx, Wcid)
|
||||||
|
@ -383,10 +371,8 @@ extern UCHAR EpToQueue[6];
|
||||||
#define RT28xx_CHIP_NAME "RT2870"
|
#define RT28xx_CHIP_NAME "RT2870"
|
||||||
#endif
|
#endif
|
||||||
#define USB_CYC_CFG 0x02a4
|
#define USB_CYC_CFG 0x02a4
|
||||||
#ifndef RT30xx
|
|
||||||
#define STATUS_SUCCESS 0x00
|
#define STATUS_SUCCESS 0x00
|
||||||
#define STATUS_UNSUCCESSFUL 0x01
|
#define STATUS_UNSUCCESSFUL 0x01
|
||||||
#endif
|
|
||||||
#define NT_SUCCESS(status) (((status) > 0) ? (1):(0))
|
#define NT_SUCCESS(status) (((status) > 0) ? (1):(0))
|
||||||
#define InterlockedIncrement atomic_inc
|
#define InterlockedIncrement atomic_inc
|
||||||
#define NdisInterlockedIncrement atomic_inc
|
#define NdisInterlockedIncrement atomic_inc
|
||||||
|
@ -595,12 +581,7 @@ typedef struct _CMDHandler_TLV {
|
||||||
#define CMDTHREAD_802_11_SET_STA_CONFIG 0x0D790111 // cmd
|
#define CMDTHREAD_802_11_SET_STA_CONFIG 0x0D790111 // cmd
|
||||||
#define CMDTHREAD_802_11_SET_PREAMBLE 0x0D790101 // cmd
|
#define CMDTHREAD_802_11_SET_PREAMBLE 0x0D790101 // cmd
|
||||||
#define CMDTHREAD_802_11_COUNTER_MEASURE 0x0D790102 // cmd
|
#define CMDTHREAD_802_11_COUNTER_MEASURE 0x0D790102 // cmd
|
||||||
|
|
||||||
#ifdef RT30xx
|
|
||||||
// add by johnli, fix "in_interrupt" error when call "MacTableDeleteEntry" in Rx tasklet
|
|
||||||
#define CMDTHREAD_UPDATE_PROTECT 0x0D790103 // cmd
|
#define CMDTHREAD_UPDATE_PROTECT 0x0D790103 // cmd
|
||||||
// end johnli
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#define WPA1AKMBIT 0x01
|
#define WPA1AKMBIT 0x01
|
||||||
#define WPA2AKMBIT 0x02
|
#define WPA2AKMBIT 0x02
|
||||||
|
|
Loading…
Reference in a new issue