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pinctrl: pinctrl-imx: improve the code comments of PIN_FUNC_ID

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The current code comments of PIN_FUNC_ID actually is not true for
SHARE_MUX_CONF_REG case which should be a 4 u32 PIN_FUNC_ID.
Fix the comments and re-org it a bit for better extendibility
as we may add a different size for SCU based PIN_FUNC_ID later.

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Stefan Agner <stefan@agner.ch>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Dong Aisheng 2018-04-28 03:01:49 +08:00 committed by Linus Walleij
parent 562088ee27
commit 37c1628fb3
1 changed files with 11 additions and 4 deletions
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15
drivers/pinctrl/freescale/pinctrl-imx.c
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@ -414,11 +414,18 @@ static const struct pinconf_ops imx_pinconf_ops = {
};
/*
* Each pin represented in fsl,pins consists of 5 u32 PIN_FUNC_ID and
* 1 u32 CONFIG, so 24 types in total for each pin.
* Each pin represented in fsl,pins consists of a number of u32 PIN_FUNC_ID
* and 1 u32 CONFIG, the total size is PIN_FUNC_ID + CONFIG for each pin.
* For generic_pinconf case, there's no extra u32 CONFIG.
*
* PIN_FUNC_ID format:
* Default:
* <mux_reg conf_reg input_reg mux_mode input_val>
* SHARE_MUX_CONF_REG:
* <mux_conf_reg input_reg mux_mode input_val>
*/
#define FSL_PIN_SIZE 24
#define SHARE_FSL_PIN_SIZE 20
#define FSL_PIN_SHARE_SIZE 20
static int imx_pinctrl_parse_groups(struct device_node *np,
struct group_desc *grp,
@ -434,7 +441,7 @@ static int imx_pinctrl_parse_groups(struct device_node *np,
dev_dbg(ipctl->dev, "group(%d): %s\n", index, np->name);
if (info->flags & SHARE_MUX_CONF_REG)
pin_size = SHARE_FSL_PIN_SIZE;
pin_size = FSL_PIN_SHARE_SIZE;
else
pin_size = FSL_PIN_SIZE;