disable busfreq completely
parent
cc80be4d56
commit
380f25e455
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@ -128,7 +128,7 @@
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interrupt-parent = <&gpc>;
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ranges;
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busfreq { /* BUSFREQ */
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busfreq: busfreq { /* BUSFREQ */
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compatible = "fsl,imx_busfreq";
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clocks = <&clks IMX6SL_CLK_PLL2_BUS>, <&clks IMX6SL_CLK_PLL2_PFD2>,
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<&clks IMX6SL_CLK_PLL2_198M>, <&clks IMX6SL_CLK_ARM>,
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@ -760,3 +760,8 @@
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/*resets = <&wifi_reset>;*/
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};
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};
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&busfreq {
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status = "disabled";
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};
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@ -10,6 +10,7 @@ CONFIG_HIGH_RES_TIMERS=y
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CONFIG_LOG_BUF_SHIFT=18
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CONFIG_CGROUPS=y
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CONFIG_BLK_DEV_INITRD=y
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CONFIG_KALLSYMS_ALL=y
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CONFIG_EMBEDDED=y
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CONFIG_PERF_EVENTS=y
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# CONFIG_COMPAT_BRK is not set
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@ -25,8 +26,9 @@ CONFIG_CMA=y
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CONFIG_CMDLINE="noinitrd console=ttymxc0,115200"
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CONFIG_CPU_FREQ=y
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CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y
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CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
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CONFIG_CPU_FREQ_GOV_POWERSAVE=y
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CONFIG_CPU_FREQ_GOV_USERSPACE=y
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CONFIG_CPUFREQ_DT=y
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CONFIG_ARM_IMX6Q_CPUFREQ=y
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CONFIG_CPU_IDLE=y
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CONFIG_ARM_CPUIDLE=y
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@ -155,8 +157,6 @@ CONFIG_POWER_RESET_SYSCON_POWEROFF=y
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CONFIG_SENSORS_MAX17135=y
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# CONFIG_MXC_MMA8451 is not set
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CONFIG_THERMAL=y
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CONFIG_CPU_THERMAL=y
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CONFIG_IMX_THERMAL=y
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CONFIG_WATCHDOG=y
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CONFIG_SOFT_WATCHDOG=y
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CONFIG_IMX2_WDT=y
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@ -235,14 +235,13 @@ CONFIG_NLS_ISO8859_1=y
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CONFIG_NLS_ISO8859_15=y
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CONFIG_NLS_UTF8=y
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CONFIG_PRINTK_TIME=y
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CONFIG_MESSAGE_LOGLEVEL_DEFAULT=6
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CONFIG_MESSAGE_LOGLEVEL_DEFAULT=7
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CONFIG_DEBUG_INFO=y
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CONFIG_DEBUG_FS=y
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CONFIG_DEBUG_VM=y
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CONFIG_DEBUG_MEMORY_INIT=y
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CONFIG_LOCKUP_DETECTOR=y
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# CONFIG_SCHED_DEBUG is not set
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CONFIG_PROVE_LOCKING=y
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CONFIG_STACKTRACE=y
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# CONFIG_FTRACE is not set
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CONFIG_KEYS=y
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CONFIG_SECURITYFS=y
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@ -685,6 +685,14 @@ config SOC_LS1021A
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help
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This enables support for Freescale LS1021A processor.
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config IMX_BUSFREQ
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bool "Freescale imx6 busfreq support"
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select PM
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depends on SOC_IMX6
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help
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This enables support for IMX6 ddr frequency scaling.
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endif
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source "arch/arm/mach-imx/devices/Kconfig"
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@ -97,7 +97,7 @@ AFLAGS_headsmp.o :=-Wa,-march=armv7-a
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obj-$(CONFIG_SMP) += headsmp.o platsmp.o
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obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
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endif
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obj-y += busfreq_lpddr2.o busfreq-imx.o busfreq_ddr3.o
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obj-$(CONFIG_IMX_BUSFREQ) += busfreq_lpddr2.o busfreq-imx.o busfreq_ddr3.o
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AFLAGS_ddr3_freq_imx6.o :=-Wa,-march=armv7-a
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AFLAGS_smp_wfe_imx6.o :=-Wa,-march=armv7-a
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AFLAGS_lpddr2_freq_imx6q.o :=-Wa,-march=armv7-a
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@ -990,6 +990,8 @@ static int busfreq_probe(struct platform_device *pdev)
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busfreq_dev = &pdev->dev;
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dev_warn(busfreq_dev, "probing imx_busfreq\n");
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/* Return if no IRAM space is allocated for ddr freq change code. */
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if (!ddr_freq_change_iram_base)
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return -ENOMEM;
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@ -152,7 +152,9 @@ void imx6sl_set_wait_clk(bool enter)
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static unsigned long saved_arm_div;
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u32 val;
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int arm_div_for_wait = imx6sl_get_arm_divider_for_wait();
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#ifdef CONFIG_IMX_BUSFREQ
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int mode = get_bus_freq_mode();
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#endif
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if (enter) {
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/*
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@ -161,22 +163,30 @@ void imx6sl_set_wait_clk(bool enter)
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* from the 24MHz OSC, as there is no way to get
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* 28.8MHz, when ARM is sourced from PLl1.
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*/
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#ifdef CONFIG_IMX_BUSFREQ
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if (mode == BUS_FREQ_LOW) {
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val = readl_relaxed(ccm_base + CCSR);
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val |= BM_CCSR_PLL1_SW_CLK_SEL;
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writel_relaxed(val, ccm_base + CCSR);
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} else {
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#endif
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saved_arm_div = readl_relaxed(ccm_base + CACRR);
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writel_relaxed(arm_div_for_wait, ccm_base + CACRR);
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#ifdef CONFIG_IMX_BUSFREQ
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}
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#endif
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} else {
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#ifdef CONFIG_IMX_BUSFREQ
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if (mode == BUS_FREQ_LOW) {
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val = readl_relaxed(ccm_base + CCSR);
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val &= ~BM_CCSR_PLL1_SW_CLK_SEL;
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writel_relaxed(val, ccm_base + CCSR);
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} else {
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#endif
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writel_relaxed(saved_arm_div, ccm_base + CACRR);
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#ifdef CONFIG_IMX_BUSFREQ
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}
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#endif
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}
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while (__raw_readl(ccm_base + CDHIPR) & BM_CDHIPR_ARM_PODF_BUSY)
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;
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@ -66,6 +66,7 @@ static void (*imx6sl_wfi_in_iram_fn)(void __iomem *iram_vbase,
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static int imx6sl_enter_wait(struct cpuidle_device *dev,
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struct cpuidle_driver *drv, int index)
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{
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#ifdef CONFIG_IMX_BUSFREQ
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int mode = get_bus_freq_mode();
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imx6q_set_lpm(WAIT_UNCLOCKED);
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imx6sl_wfi_in_iram_fn(wfi_iram_base, (mode == BUS_FREQ_AUDIO) ? 1 : 0 ,
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ldo2p5_dummy_enable);
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} else {
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#endif
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/*
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* Software workaround for ERR005311, see function
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* description for details.
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@ -80,7 +82,9 @@ static int imx6sl_enter_wait(struct cpuidle_device *dev,
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imx6sl_set_wait_clk(true);
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cpu_do_idle();
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imx6sl_set_wait_clk(false);
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#ifdef CONFIG_IMX_BUSFREQ
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}
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#endif
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imx6q_set_lpm(WAIT_CLOCKED);
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return index;
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@ -78,7 +78,7 @@ static void __init imx6sl_map_io(void)
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{
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debug_ll_io_init();
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imx6_pm_map_io();
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#ifdef CONFIG_CPU_FREQ
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#ifdef CONFIG_IMX_BUSFREQ
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imx_busfreq_map_io();
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#endif
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}
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@ -207,7 +207,9 @@ static void mu_work_handler(struct work_struct *work)
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m4_in_stop = true;
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break;
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case MU_LPM_M4_REQUEST_HIGH_BUS:
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#ifdef CONFIG_IMX_BUSFREQ
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request_bus_freq(BUS_FREQ_HIGH);
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#endif
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#ifdef CONFIG_SOC_IMX6SX
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if (cpu_is_imx6sx())
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imx6sx_set_m4_highfreq(true);
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@ -217,7 +219,9 @@ static void mu_work_handler(struct work_struct *work)
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m4_freq_low = false;
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break;
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case MU_LPM_M4_RELEASE_HIGH_BUS:
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#ifdef CONFIG_IMX_BUSFREQ
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release_bus_freq(BUS_FREQ_HIGH);
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#endif
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#ifdef CONFIG_SOC_IMX6SX
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if (cpu_is_imx6sx()) {
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imx6sx_set_m4_highfreq(false);
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@ -86,8 +86,10 @@ static int imx6q_set_target(struct cpufreq_policy *policy, unsigned int index)
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* CPU freq is increasing, so need to ensure
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* that bus frequency is increased too.
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*/
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#ifdef CONFIG_IMX_BUSFREQ
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if (old_freq <= FREQ_396_MHZ && new_freq > FREQ_396_MHZ)
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request_bus_freq(BUS_FREQ_HIGH);
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#endif
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/* scaling up? scale voltage before frequency */
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if (new_freq > old_freq) {
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* If CPU is dropped to the lowest level, release the need
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* for a high bus frequency.
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*/
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#ifdef CONFIG_IMX_BUSFREQ
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if (old_freq > FREQ_396_MHZ && new_freq <= FREQ_396_MHZ)
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release_bus_freq(BUS_FREQ_HIGH);
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#endif
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mutex_unlock(&set_cpufreq_lock);
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return 0;
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@ -216,8 +220,10 @@ static int imx6q_cpufreq_init(struct cpufreq_policy *policy)
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dev_err(cpu_dev, "imx6 cpufreq init failed!\n");
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return ret;
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}
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#ifdef CONFIG_IMX_BUSFREQ
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if (policy->cur > FREQ_396_MHZ)
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request_bus_freq(BUS_FREQ_HIGH);
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#endif
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return 0;
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}
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||||
|
|
|
@ -1217,7 +1217,9 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
|
|||
pltfm_host->clk = imx_data->clk_per;
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||||
pltfm_host->clock = clk_get_rate(pltfm_host->clk);
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||||
|
||||
#ifdef CONFIG_IMX_BUSFREQ
|
||||
request_bus_freq(BUS_FREQ_HIGH);
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||||
#endif
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||||
|
||||
clk_prepare_enable(imx_data->clk_per);
|
||||
clk_prepare_enable(imx_data->clk_ipg);
|
||||
|
@ -1309,7 +1311,9 @@ disable_clk:
|
|||
clk_disable_unprepare(imx_data->clk_per);
|
||||
clk_disable_unprepare(imx_data->clk_ipg);
|
||||
clk_disable_unprepare(imx_data->clk_ahb);
|
||||
#ifdef CONFIG_IMX_BUSFREQ
|
||||
release_bus_freq(BUS_FREQ_HIGH);
|
||||
#endif
|
||||
free_sdhci:
|
||||
sdhci_pltfm_free(pdev);
|
||||
return err;
|
||||
|
@ -1353,7 +1357,9 @@ static int sdhci_esdhc_runtime_suspend(struct device *dev)
|
|||
}
|
||||
clk_disable_unprepare(imx_data->clk_ahb);
|
||||
|
||||
#ifdef CONFIG_IMX_BUSFREQ
|
||||
release_bus_freq(BUS_FREQ_HIGH);
|
||||
#endif
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
@ -1364,7 +1370,9 @@ static int sdhci_esdhc_runtime_resume(struct device *dev)
|
|||
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
|
||||
struct pltfm_imx_data *imx_data = pltfm_host->priv;
|
||||
|
||||
#ifdef CONFIG_IMX_BUSFREQ
|
||||
request_bus_freq(BUS_FREQ_HIGH);
|
||||
#endif
|
||||
|
||||
if (!sdhci_sdio_irq_enabled(host)) {
|
||||
clk_prepare_enable(imx_data->clk_per);
|
||||
|
|
|
@ -2452,7 +2452,9 @@ int gpmi_runtime_suspend(struct device *dev)
|
|||
struct gpmi_nand_data *this = dev_get_drvdata(dev);
|
||||
|
||||
gpmi_disable_clk(this);
|
||||
#ifdef CONFIG_IMX_BUSFREQ
|
||||
release_bus_freq(BUS_FREQ_HIGH);
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -2465,7 +2467,9 @@ int gpmi_runtime_resume(struct device *dev)
|
|||
if (ret)
|
||||
return ret;
|
||||
|
||||
#ifdef CONFIG_IMX_BUSFREQ
|
||||
request_bus_freq(BUS_FREQ_HIGH);
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -3767,13 +3767,17 @@ failed_clk:
|
|||
|
||||
static int fec_runtime_suspend(struct device *dev)
|
||||
{
|
||||
#ifdef CONFIG_IMX_BUSFREQ
|
||||
release_bus_freq(BUS_FREQ_HIGH);
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int fec_runtime_resume(struct device *dev)
|
||||
{
|
||||
#ifdef CONFIG_IMX_BUSFREQ
|
||||
request_bus_freq(BUS_FREQ_HIGH);
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -500,7 +500,9 @@ static int ci_hdrc_imx_probe(struct platform_device *pdev)
|
|||
if (ret)
|
||||
return ret;
|
||||
|
||||
#ifdef CONFIG_IMX_BUSFREQ
|
||||
request_bus_freq(BUS_FREQ_HIGH);
|
||||
#endif
|
||||
ret = imx_prepare_enable_clks(&pdev->dev);
|
||||
if (ret)
|
||||
goto err_bus_freq;
|
||||
|
@ -629,7 +631,9 @@ disable_hsic_regulator:
|
|||
err_clk:
|
||||
imx_disable_unprepare_clks(&pdev->dev);
|
||||
err_bus_freq:
|
||||
#ifdef CONFIG_IMX_BUSFREQ
|
||||
release_bus_freq(BUS_FREQ_HIGH);
|
||||
#endif
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -644,7 +648,9 @@ static int ci_hdrc_imx_remove(struct platform_device *pdev)
|
|||
}
|
||||
ci_hdrc_remove_device(data->ci_pdev);
|
||||
imx_disable_unprepare_clks(&pdev->dev);
|
||||
#ifdef CONFIG_IMX_BUSFREQ
|
||||
release_bus_freq(BUS_FREQ_HIGH);
|
||||
#endif
|
||||
if (data->hsic_pad_regulator)
|
||||
regulator_disable(data->hsic_pad_regulator);
|
||||
|
||||
|
@ -669,7 +675,9 @@ static int imx_controller_suspend(struct device *dev)
|
|||
}
|
||||
|
||||
imx_disable_unprepare_clks(dev);
|
||||
#ifdef CONFIG_IMX_BUSFREQ
|
||||
release_bus_freq(BUS_FREQ_HIGH);
|
||||
#endif
|
||||
data->in_lpm = true;
|
||||
|
||||
return 0;
|
||||
|
@ -687,7 +695,9 @@ static int imx_controller_resume(struct device *dev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_IMX_BUSFREQ
|
||||
request_bus_freq(BUS_FREQ_HIGH);
|
||||
#endif
|
||||
ret = imx_prepare_enable_clks(dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
|
|
@ -5180,7 +5180,7 @@ static int mxc_epdc_fb_resume(struct device *dev)
|
|||
#define mxc_epdc_fb_resume NULL
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
#ifdef CONFIG_IMX_BUSFREQ
|
||||
static int mxc_epdc_fb_runtime_suspend(struct device *dev)
|
||||
{
|
||||
release_bus_freq(BUS_FREQ_HIGH);
|
||||
|
|
Loading…
Reference in New Issue