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disable busfreq completely

pull/1/head
Martin T. H. Sandsmark 2017-05-11 12:53:21 +02:00
parent cc80be4d56
commit 380f25e455
16 changed files with 74 additions and 10 deletions

View File

@ -128,7 +128,7 @@
interrupt-parent = <&gpc>;
ranges;
busfreq { /* BUSFREQ */
busfreq: busfreq { /* BUSFREQ */
compatible = "fsl,imx_busfreq";
clocks = <&clks IMX6SL_CLK_PLL2_BUS>, <&clks IMX6SL_CLK_PLL2_PFD2>,
<&clks IMX6SL_CLK_PLL2_198M>, <&clks IMX6SL_CLK_ARM>,

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@ -760,3 +760,8 @@
/*resets = <&wifi_reset>;*/
};
};
&busfreq {
status = "disabled";
};

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@ -10,6 +10,7 @@ CONFIG_HIGH_RES_TIMERS=y
CONFIG_LOG_BUF_SHIFT=18
CONFIG_CGROUPS=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_KALLSYMS_ALL=y
CONFIG_EMBEDDED=y
CONFIG_PERF_EVENTS=y
# CONFIG_COMPAT_BRK is not set
@ -25,8 +26,9 @@ CONFIG_CMA=y
CONFIG_CMDLINE="noinitrd console=ttymxc0,115200"
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_CPUFREQ_DT=y
CONFIG_ARM_IMX6Q_CPUFREQ=y
CONFIG_CPU_IDLE=y
CONFIG_ARM_CPUIDLE=y
@ -155,8 +157,6 @@ CONFIG_POWER_RESET_SYSCON_POWEROFF=y
CONFIG_SENSORS_MAX17135=y
# CONFIG_MXC_MMA8451 is not set
CONFIG_THERMAL=y
CONFIG_CPU_THERMAL=y
CONFIG_IMX_THERMAL=y
CONFIG_WATCHDOG=y
CONFIG_SOFT_WATCHDOG=y
CONFIG_IMX2_WDT=y
@ -235,14 +235,13 @@ CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_ISO8859_15=y
CONFIG_NLS_UTF8=y
CONFIG_PRINTK_TIME=y
CONFIG_MESSAGE_LOGLEVEL_DEFAULT=6
CONFIG_MESSAGE_LOGLEVEL_DEFAULT=7
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_FS=y
CONFIG_DEBUG_VM=y
CONFIG_DEBUG_MEMORY_INIT=y
CONFIG_LOCKUP_DETECTOR=y
# CONFIG_SCHED_DEBUG is not set
CONFIG_PROVE_LOCKING=y
CONFIG_STACKTRACE=y
# CONFIG_FTRACE is not set
CONFIG_KEYS=y
CONFIG_SECURITYFS=y

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@ -685,6 +685,14 @@ config SOC_LS1021A
help
This enables support for Freescale LS1021A processor.
config IMX_BUSFREQ
bool "Freescale imx6 busfreq support"
select PM
depends on SOC_IMX6
help
This enables support for IMX6 ddr frequency scaling.
endif
source "arch/arm/mach-imx/devices/Kconfig"

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@ -97,7 +97,7 @@ AFLAGS_headsmp.o :=-Wa,-march=armv7-a
obj-$(CONFIG_SMP) += headsmp.o platsmp.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
endif
obj-y += busfreq_lpddr2.o busfreq-imx.o busfreq_ddr3.o
obj-$(CONFIG_IMX_BUSFREQ) += busfreq_lpddr2.o busfreq-imx.o busfreq_ddr3.o
AFLAGS_ddr3_freq_imx6.o :=-Wa,-march=armv7-a
AFLAGS_smp_wfe_imx6.o :=-Wa,-march=armv7-a
AFLAGS_lpddr2_freq_imx6q.o :=-Wa,-march=armv7-a

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@ -990,6 +990,8 @@ static int busfreq_probe(struct platform_device *pdev)
busfreq_dev = &pdev->dev;
dev_warn(busfreq_dev, "probing imx_busfreq\n");
/* Return if no IRAM space is allocated for ddr freq change code. */
if (!ddr_freq_change_iram_base)
return -ENOMEM;

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@ -152,7 +152,9 @@ void imx6sl_set_wait_clk(bool enter)
static unsigned long saved_arm_div;
u32 val;
int arm_div_for_wait = imx6sl_get_arm_divider_for_wait();
#ifdef CONFIG_IMX_BUSFREQ
int mode = get_bus_freq_mode();
#endif
if (enter) {
/*
@ -161,22 +163,30 @@ void imx6sl_set_wait_clk(bool enter)
* from the 24MHz OSC, as there is no way to get
* 28.8MHz, when ARM is sourced from PLl1.
*/
#ifdef CONFIG_IMX_BUSFREQ
if (mode == BUS_FREQ_LOW) {
val = readl_relaxed(ccm_base + CCSR);
val |= BM_CCSR_PLL1_SW_CLK_SEL;
writel_relaxed(val, ccm_base + CCSR);
} else {
#endif
saved_arm_div = readl_relaxed(ccm_base + CACRR);
writel_relaxed(arm_div_for_wait, ccm_base + CACRR);
#ifdef CONFIG_IMX_BUSFREQ
}
#endif
} else {
#ifdef CONFIG_IMX_BUSFREQ
if (mode == BUS_FREQ_LOW) {
val = readl_relaxed(ccm_base + CCSR);
val &= ~BM_CCSR_PLL1_SW_CLK_SEL;
writel_relaxed(val, ccm_base + CCSR);
} else {
#endif
writel_relaxed(saved_arm_div, ccm_base + CACRR);
#ifdef CONFIG_IMX_BUSFREQ
}
#endif
}
while (__raw_readl(ccm_base + CDHIPR) & BM_CDHIPR_ARM_PODF_BUSY)
;

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@ -66,6 +66,7 @@ static void (*imx6sl_wfi_in_iram_fn)(void __iomem *iram_vbase,
static int imx6sl_enter_wait(struct cpuidle_device *dev,
struct cpuidle_driver *drv, int index)
{
#ifdef CONFIG_IMX_BUSFREQ
int mode = get_bus_freq_mode();
imx6q_set_lpm(WAIT_UNCLOCKED);
@ -73,6 +74,7 @@ static int imx6sl_enter_wait(struct cpuidle_device *dev,
imx6sl_wfi_in_iram_fn(wfi_iram_base, (mode == BUS_FREQ_AUDIO) ? 1 : 0 ,
ldo2p5_dummy_enable);
} else {
#endif
/*
* Software workaround for ERR005311, see function
* description for details.
@ -80,7 +82,9 @@ static int imx6sl_enter_wait(struct cpuidle_device *dev,
imx6sl_set_wait_clk(true);
cpu_do_idle();
imx6sl_set_wait_clk(false);
#ifdef CONFIG_IMX_BUSFREQ
}
#endif
imx6q_set_lpm(WAIT_CLOCKED);
return index;

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@ -78,7 +78,7 @@ static void __init imx6sl_map_io(void)
{
debug_ll_io_init();
imx6_pm_map_io();
#ifdef CONFIG_CPU_FREQ
#ifdef CONFIG_IMX_BUSFREQ
imx_busfreq_map_io();
#endif
}

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@ -207,7 +207,9 @@ static void mu_work_handler(struct work_struct *work)
m4_in_stop = true;
break;
case MU_LPM_M4_REQUEST_HIGH_BUS:
#ifdef CONFIG_IMX_BUSFREQ
request_bus_freq(BUS_FREQ_HIGH);
#endif
#ifdef CONFIG_SOC_IMX6SX
if (cpu_is_imx6sx())
imx6sx_set_m4_highfreq(true);
@ -217,7 +219,9 @@ static void mu_work_handler(struct work_struct *work)
m4_freq_low = false;
break;
case MU_LPM_M4_RELEASE_HIGH_BUS:
#ifdef CONFIG_IMX_BUSFREQ
release_bus_freq(BUS_FREQ_HIGH);
#endif
#ifdef CONFIG_SOC_IMX6SX
if (cpu_is_imx6sx()) {
imx6sx_set_m4_highfreq(false);

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@ -86,8 +86,10 @@ static int imx6q_set_target(struct cpufreq_policy *policy, unsigned int index)
* CPU freq is increasing, so need to ensure
* that bus frequency is increased too.
*/
#ifdef CONFIG_IMX_BUSFREQ
if (old_freq <= FREQ_396_MHZ && new_freq > FREQ_396_MHZ)
request_bus_freq(BUS_FREQ_HIGH);
#endif
/* scaling up? scale voltage before frequency */
if (new_freq > old_freq) {
@ -197,8 +199,10 @@ static int imx6q_set_target(struct cpufreq_policy *policy, unsigned int index)
* If CPU is dropped to the lowest level, release the need
* for a high bus frequency.
*/
#ifdef CONFIG_IMX_BUSFREQ
if (old_freq > FREQ_396_MHZ && new_freq <= FREQ_396_MHZ)
release_bus_freq(BUS_FREQ_HIGH);
#endif
mutex_unlock(&set_cpufreq_lock);
return 0;
@ -216,8 +220,10 @@ static int imx6q_cpufreq_init(struct cpufreq_policy *policy)
dev_err(cpu_dev, "imx6 cpufreq init failed!\n");
return ret;
}
#ifdef CONFIG_IMX_BUSFREQ
if (policy->cur > FREQ_396_MHZ)
request_bus_freq(BUS_FREQ_HIGH);
#endif
return 0;
}

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@ -1217,7 +1217,9 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
pltfm_host->clk = imx_data->clk_per;
pltfm_host->clock = clk_get_rate(pltfm_host->clk);
#ifdef CONFIG_IMX_BUSFREQ
request_bus_freq(BUS_FREQ_HIGH);
#endif
clk_prepare_enable(imx_data->clk_per);
clk_prepare_enable(imx_data->clk_ipg);
@ -1309,7 +1311,9 @@ disable_clk:
clk_disable_unprepare(imx_data->clk_per);
clk_disable_unprepare(imx_data->clk_ipg);
clk_disable_unprepare(imx_data->clk_ahb);
#ifdef CONFIG_IMX_BUSFREQ
release_bus_freq(BUS_FREQ_HIGH);
#endif
free_sdhci:
sdhci_pltfm_free(pdev);
return err;
@ -1353,7 +1357,9 @@ static int sdhci_esdhc_runtime_suspend(struct device *dev)
}
clk_disable_unprepare(imx_data->clk_ahb);
#ifdef CONFIG_IMX_BUSFREQ
release_bus_freq(BUS_FREQ_HIGH);
#endif
return ret;
}
@ -1364,7 +1370,9 @@ static int sdhci_esdhc_runtime_resume(struct device *dev)
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct pltfm_imx_data *imx_data = pltfm_host->priv;
#ifdef CONFIG_IMX_BUSFREQ
request_bus_freq(BUS_FREQ_HIGH);
#endif
if (!sdhci_sdio_irq_enabled(host)) {
clk_prepare_enable(imx_data->clk_per);

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@ -2452,7 +2452,9 @@ int gpmi_runtime_suspend(struct device *dev)
struct gpmi_nand_data *this = dev_get_drvdata(dev);
gpmi_disable_clk(this);
#ifdef CONFIG_IMX_BUSFREQ
release_bus_freq(BUS_FREQ_HIGH);
#endif
return 0;
}
@ -2465,7 +2467,9 @@ int gpmi_runtime_resume(struct device *dev)
if (ret)
return ret;
#ifdef CONFIG_IMX_BUSFREQ
request_bus_freq(BUS_FREQ_HIGH);
#endif
return 0;
}

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@ -3767,13 +3767,17 @@ failed_clk:
static int fec_runtime_suspend(struct device *dev)
{
#ifdef CONFIG_IMX_BUSFREQ
release_bus_freq(BUS_FREQ_HIGH);
#endif
return 0;
}
static int fec_runtime_resume(struct device *dev)
{
#ifdef CONFIG_IMX_BUSFREQ
request_bus_freq(BUS_FREQ_HIGH);
#endif
return 0;
}

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@ -500,7 +500,9 @@ static int ci_hdrc_imx_probe(struct platform_device *pdev)
if (ret)
return ret;
#ifdef CONFIG_IMX_BUSFREQ
request_bus_freq(BUS_FREQ_HIGH);
#endif
ret = imx_prepare_enable_clks(&pdev->dev);
if (ret)
goto err_bus_freq;
@ -629,7 +631,9 @@ disable_hsic_regulator:
err_clk:
imx_disable_unprepare_clks(&pdev->dev);
err_bus_freq:
#ifdef CONFIG_IMX_BUSFREQ
release_bus_freq(BUS_FREQ_HIGH);
#endif
return ret;
}
@ -644,7 +648,9 @@ static int ci_hdrc_imx_remove(struct platform_device *pdev)
}
ci_hdrc_remove_device(data->ci_pdev);
imx_disable_unprepare_clks(&pdev->dev);
#ifdef CONFIG_IMX_BUSFREQ
release_bus_freq(BUS_FREQ_HIGH);
#endif
if (data->hsic_pad_regulator)
regulator_disable(data->hsic_pad_regulator);
@ -669,7 +675,9 @@ static int imx_controller_suspend(struct device *dev)
}
imx_disable_unprepare_clks(dev);
#ifdef CONFIG_IMX_BUSFREQ
release_bus_freq(BUS_FREQ_HIGH);
#endif
data->in_lpm = true;
return 0;
@ -687,7 +695,9 @@ static int imx_controller_resume(struct device *dev)
return 0;
}
#ifdef CONFIG_IMX_BUSFREQ
request_bus_freq(BUS_FREQ_HIGH);
#endif
ret = imx_prepare_enable_clks(dev);
if (ret)
return ret;

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@ -5180,7 +5180,7 @@ static int mxc_epdc_fb_resume(struct device *dev)
#define mxc_epdc_fb_resume NULL
#endif
#ifdef CONFIG_PM
#ifdef CONFIG_IMX_BUSFREQ
static int mxc_epdc_fb_runtime_suspend(struct device *dev)
{
release_bus_freq(BUS_FREQ_HIGH);