Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: PCI: Ensure we re-enable devices on resume x86/PCI: parse additional host bridge window resource types PCI: revert broken device warning PCI aerdrv: use correct bit defines and add 2ms delay to aer_root_reset x86/PCI: ignore Consumer/Producer bit in ACPI window descriptions
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commit
383bee6b54
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@ -66,14 +66,44 @@ resource_to_addr(struct acpi_resource *resource,
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struct acpi_resource_address64 *addr)
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{
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acpi_status status;
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struct acpi_resource_memory24 *memory24;
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struct acpi_resource_memory32 *memory32;
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struct acpi_resource_fixed_memory32 *fixed_memory32;
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status = acpi_resource_to_address64(resource, addr);
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if (ACPI_SUCCESS(status) &&
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(addr->resource_type == ACPI_MEMORY_RANGE ||
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addr->resource_type == ACPI_IO_RANGE) &&
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addr->address_length > 0 &&
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addr->producer_consumer == ACPI_PRODUCER) {
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memset(addr, 0, sizeof(*addr));
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switch (resource->type) {
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case ACPI_RESOURCE_TYPE_MEMORY24:
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memory24 = &resource->data.memory24;
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addr->resource_type = ACPI_MEMORY_RANGE;
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addr->minimum = memory24->minimum;
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addr->address_length = memory24->address_length;
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addr->maximum = addr->minimum + addr->address_length - 1;
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return AE_OK;
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case ACPI_RESOURCE_TYPE_MEMORY32:
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memory32 = &resource->data.memory32;
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addr->resource_type = ACPI_MEMORY_RANGE;
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addr->minimum = memory32->minimum;
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addr->address_length = memory32->address_length;
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addr->maximum = addr->minimum + addr->address_length - 1;
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return AE_OK;
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case ACPI_RESOURCE_TYPE_FIXED_MEMORY32:
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fixed_memory32 = &resource->data.fixed_memory32;
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addr->resource_type = ACPI_MEMORY_RANGE;
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addr->minimum = fixed_memory32->address;
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addr->address_length = fixed_memory32->address_length;
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addr->maximum = addr->minimum + addr->address_length - 1;
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return AE_OK;
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case ACPI_RESOURCE_TYPE_ADDRESS16:
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case ACPI_RESOURCE_TYPE_ADDRESS32:
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case ACPI_RESOURCE_TYPE_ADDRESS64:
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status = acpi_resource_to_address64(resource, addr);
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if (ACPI_SUCCESS(status) &&
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(addr->resource_type == ACPI_MEMORY_RANGE ||
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addr->resource_type == ACPI_IO_RANGE) &&
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addr->address_length > 0) {
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return AE_OK;
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}
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break;
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}
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return AE_ERROR;
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}
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@ -679,7 +679,7 @@ static void __pci_start_power_transition(struct pci_dev *dev, pci_power_t state)
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*/
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int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state)
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{
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return state > PCI_D0 ?
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return state >= PCI_D0 ?
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pci_platform_power_transition(dev, state) : -EINVAL;
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}
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EXPORT_SYMBOL_GPL(__pci_complete_power_transition);
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@ -716,10 +716,6 @@ int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
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*/
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return 0;
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/* Check if we're already there */
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if (dev->current_state == state)
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return 0;
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__pci_start_power_transition(dev, state);
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/* This device is quirked not to be put into D3, so
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@ -244,11 +244,17 @@ static pci_ers_result_t aer_root_reset(struct pci_dev *dev)
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/* Assert Secondary Bus Reset */
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pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &p2p_ctrl);
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p2p_ctrl |= PCI_CB_BRIDGE_CTL_CB_RESET;
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p2p_ctrl |= PCI_BRIDGE_CTL_BUS_RESET;
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pci_write_config_word(dev, PCI_BRIDGE_CONTROL, p2p_ctrl);
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/*
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* we should send hot reset message for 2ms to allow it time to
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* propogate to all downstream ports
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*/
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msleep(2);
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/* De-assert Secondary Bus Reset */
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p2p_ctrl &= ~PCI_CB_BRIDGE_CTL_CB_RESET;
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p2p_ctrl &= ~PCI_BRIDGE_CTL_BUS_RESET;
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pci_write_config_word(dev, PCI_BRIDGE_CONTROL, p2p_ctrl);
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/*
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@ -174,19 +174,14 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
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pci_read_config_dword(dev, pos, &sz);
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pci_write_config_dword(dev, pos, l);
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if (!sz)
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goto fail; /* BAR not implemented */
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/*
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* All bits set in sz means the device isn't working properly.
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* If it's a memory BAR or a ROM, bit 0 must be clear; if it's
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* an io BAR, bit 1 must be clear.
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* If the BAR isn't implemented, all bits must be 0. If it's a
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* memory BAR or a ROM, bit 0 must be clear; if it's an io BAR, bit
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* 1 must be clear.
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*/
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if (sz == 0xffffffff) {
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dev_err(&dev->dev, "reg %x: invalid size %#x; broken device?\n",
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pos, sz);
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if (!sz || sz == 0xffffffff)
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goto fail;
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}
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/*
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* I don't know how l can have all bits set. Copied from old code.
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@ -249,17 +244,13 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
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pos, res);
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}
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} else {
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u32 size = pci_size(l, sz, mask);
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sz = pci_size(l, sz, mask);
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if (!size) {
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dev_err(&dev->dev, "reg %x: invalid size "
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"(l %#x sz %#x mask %#x); broken device?",
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pos, l, sz, mask);
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if (!sz)
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goto fail;
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}
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res->start = l;
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res->end = l + size;
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res->end = l + sz;
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dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n", pos, res);
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}
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