viafb: remove temporary start address setting
Currently the start address is set to an initial value every time viafb_setmode is called. This is not done consistently along graphic cores and not even the whole address but often only parts of it. On top of that it seems useless as the real/final address will be set by viafb_set_start_addr a few lines later. Remove this superfluous initalization to shrink register initalization and as a start to decouple primary and secondary display. Code cleanup, no notable runtime change expected. Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de> Cc: Scott Fang <ScottFang@viatech.com.cn> Cc: Joseph Chan <JosephChan@via.com.tw> Cc: Harald Welte <laforge@gnumonks.org> Cc: Jonathan Corbet <corbet@lwn.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -100,12 +100,8 @@ struct io_reg CN400_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01},
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{VIACR, CR0F, 0xFF, 0x00}, /* Cursor Localtion Low */
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{VIACR, CR32, 0xFF, 0x00},
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{VIACR, CR33, 0xFF, 0x00},
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{VIACR, CR34, 0xFF, 0x00},
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{VIACR, CR35, 0xFF, 0x00},
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{VIACR, CR36, 0x08, 0x00},
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{VIACR, CR62, 0xFF, 0x00}, /* Secondary Display Starting Address */
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{VIACR, CR63, 0xFF, 0x00}, /* Secondary Display Starting Address */
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{VIACR, CR64, 0xFF, 0x00}, /* Secondary Display Starting Address */
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{VIACR, CR69, 0xFF, 0x00},
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{VIACR, CR6A, 0xFF, 0x40},
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{VIACR, CR6B, 0xFF, 0x00},
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@ -159,16 +155,12 @@ struct io_reg CN700_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01},
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{VIASR, CR30, 0xFF, 0x04},
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{VIACR, CR32, 0xFF, 0x00},
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{VIACR, CR33, 0x7F, 0x00},
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{VIACR, CR34, 0xFF, 0x00},
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{VIACR, CR35, 0xFF, 0x00},
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{VIACR, CR36, 0xFF, 0x31},
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{VIACR, CR41, 0xFF, 0x80},
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{VIACR, CR42, 0xFF, 0x00},
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{VIACR, CR55, 0x80, 0x00},
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{VIACR, CR5D, 0x80, 0x00}, /*Horizontal Retrace Start bit[11] should be 0*/
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{VIACR, CR62, 0xFF, 0x00}, /* Secondary Display Starting Address */
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{VIACR, CR63, 0xFF, 0x00}, /* Secondary Display Starting Address */
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{VIACR, CR64, 0xFF, 0x00}, /* Secondary Display Starting Address */
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{VIACR, CR68, 0xFF, 0x67}, /* Default FIFO For IGA2 */
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{VIACR, CR69, 0xFF, 0x00},
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{VIACR, CR6A, 0xFD, 0x40},
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@ -233,9 +225,6 @@ struct io_reg KM400_ModeXregs[] = {
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{VIACR, CR55, 0x80, 0x00},
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{VIACR, CR5D, 0x80, 0x00},
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{VIACR, CR36, 0xFF, 0x01}, /* Power Mangement 3 */
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{VIACR, CR62, 0xFF, 0x00}, /* Secondary Display Starting Address */
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{VIACR, CR63, 0xFF, 0x00}, /* Secondary Display Starting Address */
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{VIACR, CR64, 0xFF, 0x00}, /* Secondary Display Starting Address */
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{VIACR, CR68, 0xFF, 0x67}, /* Default FIFO For IGA2 */
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{VIACR, CR6A, 0x20, 0x20}, /* Extended FIFO On */
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{VIACR, CR7A, 0xFF, 0x01}, /* LCD Scaling Parameter 1 */
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@ -285,14 +274,9 @@ struct io_reg CX700_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01},
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{VIACR, CR0F, 0xFF, 0x00}, /* Cursor Localtion Low */
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{VIACR, CR32, 0xFF, 0x00},
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{VIACR, CR33, 0xFF, 0x00},
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{VIACR, CR34, 0xFF, 0x00},
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{VIACR, CR35, 0xFF, 0x00},
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{VIACR, CR36, 0x08, 0x00},
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{VIACR, CR47, 0xC8, 0x00}, /* Clear VCK Plus. */
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{VIACR, CR62, 0xFF, 0x00}, /* Secondary Display Starting Address */
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{VIACR, CR63, 0xFF, 0x00}, /* Secondary Display Starting Address */
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{VIACR, CR64, 0xFF, 0x00}, /* Secondary Display Starting Address */
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{VIACR, CRA3, 0xFF, 0x00}, /* Secondary Display Starting Address */
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{VIACR, CR69, 0xFF, 0x00},
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{VIACR, CR6A, 0xFF, 0x40},
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{VIACR, CR6B, 0xFF, 0x00},
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@ -340,7 +324,6 @@ struct io_reg CLE266_ModeXregs[] = { {VIASR, SR1E, 0xF0, 0x00},
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{VIASR, SR1A, 0xFB, 0x08},
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{VIACR, CR32, 0xFF, 0x00},
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{VIACR, CR34, 0xFF, 0x00},
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{VIACR, CR35, 0xFF, 0x00},
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{VIACR, CR36, 0x08, 0x00},
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{VIACR, CR6A, 0xFF, 0x80},
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