Merge master.kernel.org:/home/rmk/linux-2.6-arm
This commit is contained in:
commit
3995f4c532
|
@ -99,13 +99,6 @@ config ARCH_EBSA110
|
|||
Ethernet interface, two PCMCIA sockets, two serial ports and a
|
||||
parallel port.
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||||
|
||||
config ARCH_CAMELOT
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bool "Epxa10db"
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||||
help
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||||
This enables support for Altera's Excalibur XA10 development board.
|
||||
If you would like to build your kernel to run on one of these boards
|
||||
then you must say 'Y' here. Otherwise say 'N'
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||||
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||||
config ARCH_FOOTBRIDGE
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||||
bool "FootBridge"
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||||
select FOOTBRIDGE
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||||
|
@ -213,12 +206,16 @@ config ARCH_AAEC2000
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|||
help
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||||
This enables support for systems based on the Agilent AAEC-2000
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||||
|
||||
config ARCH_AT91RM9200
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||||
bool "AT91RM9200"
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||||
help
|
||||
Say Y here if you intend to run this kernel on an AT91RM9200-based
|
||||
board.
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||||
|
||||
endchoice
|
||||
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||||
source "arch/arm/mach-clps711x/Kconfig"
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||||
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source "arch/arm/mach-epxa10db/Kconfig"
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source "arch/arm/mach-footbridge/Kconfig"
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||||
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||||
source "arch/arm/mach-integrator/Kconfig"
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||||
|
@ -253,6 +250,8 @@ source "arch/arm/mach-aaec2000/Kconfig"
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|||
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||||
source "arch/arm/mach-realview/Kconfig"
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||||
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||||
source "arch/arm/mach-at91rm9200/Kconfig"
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||||
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||||
# Definitions to make life easier
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||||
config ARCH_ACORN
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||||
bool
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||||
|
@ -418,7 +417,8 @@ config LEDS
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|||
ARCH_EBSA285 || ARCH_IMX || ARCH_INTEGRATOR || \
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||||
ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
|
||||
ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
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||||
ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE
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||||
ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
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||||
ARCH_AT91RM9200
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||||
help
|
||||
If you say Y here, the LEDs on your machine will be used
|
||||
to provide useful information about your current system status.
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||||
|
|
|
@ -84,7 +84,6 @@ endif
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|||
machine-$(CONFIG_ARCH_PXA) := pxa
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||||
machine-$(CONFIG_ARCH_L7200) := l7200
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||||
machine-$(CONFIG_ARCH_INTEGRATOR) := integrator
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||||
machine-$(CONFIG_ARCH_CAMELOT) := epxa10db
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textofs-$(CONFIG_ARCH_CLPS711X) := 0x00028000
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||||
machine-$(CONFIG_ARCH_CLPS711X) := clps711x
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||||
machine-$(CONFIG_ARCH_IOP3XX) := iop3xx
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||||
|
@ -100,6 +99,7 @@ endif
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|||
machine-$(CONFIG_ARCH_H720X) := h720x
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||||
machine-$(CONFIG_ARCH_AAEC2000) := aaec2000
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||||
machine-$(CONFIG_ARCH_REALVIEW) := realview
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machine-$(CONFIG_ARCH_AT91RM9200) := at91rm9200
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||||
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||||
ifeq ($(CONFIG_ARCH_EBSA110),y)
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||||
# This is what happens if you forget the IOCS16 line.
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||||
|
|
|
@ -21,10 +21,6 @@ ifeq ($(CONFIG_ARCH_SHARK),y)
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|||
OBJS += head-shark.o ofw-shark.o
|
||||
endif
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||||
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ifeq ($(CONFIG_ARCH_CAMELOT),y)
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||||
OBJS += head-epxa10db.o
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||||
endif
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||||
ifeq ($(CONFIG_ARCH_L7200),y)
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OBJS += head-l7200.o
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||||
endif
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||||
|
@ -50,6 +46,10 @@ ifeq ($(CONFIG_PXA_SHARPSL),y)
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|||
OBJS += head-sharpsl.o
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||||
endif
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||||
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||||
ifeq ($(CONFIG_ARCH_AT91RM9200),y)
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||||
OBJS += head-at91rm9200.o
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_DEBUG_ICEDCC),y)
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||||
OBJS += ice-dcc.o
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||||
endif
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||||
|
|
57
arch/arm/boot/compressed/head-at91rm9200.S
Normal file
57
arch/arm/boot/compressed/head-at91rm9200.S
Normal file
|
@ -0,0 +1,57 @@
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|||
/*
|
||||
* linux/arch/arm/boot/compressed/head-at91rm9200.S
|
||||
*
|
||||
* Copyright (C) 2003 SAN People
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
*/
|
||||
#include <asm/mach-types.h>
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||||
|
||||
.section ".start", "ax"
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||||
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||||
@ Atmel AT91RM9200-DK : 262
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||||
mov r3, #(MACH_TYPE_AT91RM9200DK & 0xff)
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||||
orr r3, r3, #(MACH_TYPE_AT91RM9200DK & 0xff00)
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cmp r7, r3
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beq 99f
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||||
@ Cogent CSB337 : 399
|
||||
mov r3, #(MACH_TYPE_CSB337 & 0xff)
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||||
orr r3, r3, #(MACH_TYPE_CSB337 & 0xff00)
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cmp r7, r3
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||||
beq 99f
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||||
|
||||
@ Cogent CSB637 : 648
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||||
mov r3, #(MACH_TYPE_CSB637 & 0xff)
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orr r3, r3, #(MACH_TYPE_CSB637 & 0xff00)
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||||
cmp r7, r3
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||||
beq 99f
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||||
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||||
@ Atmel AT91RM9200-EK : 705
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||||
mov r3, #(MACH_TYPE_AT91RM9200EK & 0xff)
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||||
orr r3, r3, #(MACH_TYPE_AT91RM9200EK & 0xff00)
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cmp r7, r3
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beq 99f
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||||
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||||
@ Conitec Carmeva : 769
|
||||
mov r3, #(MACH_TYPE_CARMEVA & 0xff)
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||||
orr r3, r3, #(MACH_TYPE_CARMEVA & 0xff00)
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cmp r7, r3
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||||
beq 99f
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||||
|
||||
@ KwikByte KB920x : 612
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||||
mov r3, #(MACH_TYPE_KB9200 & 0xff)
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||||
orr r3, r3, #(MACH_TYPE_KB9200 & 0xff00)
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||||
cmp r7, r3
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||||
beq 99f
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||||
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||||
@ Unknown board, use the AT91RM9200DK board
|
||||
@ mov r7, #MACH_TYPE_AT91RM9200
|
||||
mov r7, #(MACH_TYPE_AT91RM9200DK & 0xff)
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||||
orr r7, r7, #(MACH_TYPE_AT91RM9200DK & 0xff00)
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||||
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||||
99:
|
|
@ -1,5 +0,0 @@
|
|||
#include <asm/mach-types.h>
|
||||
#include <asm/arch/excalibur.h>
|
||||
|
||||
.section ".start", "ax"
|
||||
mov r7, #MACH_TYPE_CAMELOT
|
|
@ -63,7 +63,6 @@ CONFIG_OBSOLETE_MODPARM=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -66,7 +66,6 @@ CONFIG_KMOD=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -64,7 +64,6 @@ CONFIG_KMOD=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -65,7 +65,6 @@ CONFIG_KMOD=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -57,7 +57,6 @@ CONFIG_ARCH_CLPS7500=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -71,7 +71,6 @@ CONFIG_KMOD=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -87,7 +87,6 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -63,7 +63,6 @@ CONFIG_KMOD=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
CONFIG_ARCH_EBSA110=y
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -57,7 +57,6 @@ CONFIG_BASE_SMALL=0
|
|||
CONFIG_ARCH_CLPS711X=y
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -86,7 +86,6 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -64,7 +64,6 @@ CONFIG_KMOD=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
CONFIG_ARCH_IOP3XX=y
|
||||
|
|
|
@ -1,644 +0,0 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.12-rc1-bk2
|
||||
# Sun Mar 27 22:46:51 2005
|
||||
#
|
||||
CONFIG_ARM=y
|
||||
CONFIG_MMU=y
|
||||
CONFIG_UID16=y
|
||||
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
||||
CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
CONFIG_GENERIC_IOMAP=y
|
||||
|
||||
#
|
||||
# Code maturity level options
|
||||
#
|
||||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_CLEAN_COMPILE=y
|
||||
CONFIG_BROKEN_ON_SMP=y
|
||||
|
||||
#
|
||||
# General setup
|
||||
#
|
||||
CONFIG_LOCALVERSION=""
|
||||
CONFIG_SWAP=y
|
||||
CONFIG_SYSVIPC=y
|
||||
# CONFIG_POSIX_MQUEUE is not set
|
||||
# CONFIG_BSD_PROCESS_ACCT is not set
|
||||
CONFIG_SYSCTL=y
|
||||
# CONFIG_AUDIT is not set
|
||||
# CONFIG_HOTPLUG is not set
|
||||
CONFIG_KOBJECT_UEVENT=y
|
||||
# CONFIG_IKCONFIG is not set
|
||||
# CONFIG_EMBEDDED is not set
|
||||
CONFIG_KALLSYMS=y
|
||||
# CONFIG_KALLSYMS_EXTRA_PASS is not set
|
||||
CONFIG_BASE_FULL=y
|
||||
CONFIG_FUTEX=y
|
||||
CONFIG_EPOLL=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
CONFIG_SHMEM=y
|
||||
CONFIG_CC_ALIGN_FUNCTIONS=0
|
||||
CONFIG_CC_ALIGN_LABELS=0
|
||||
CONFIG_CC_ALIGN_LOOPS=0
|
||||
CONFIG_CC_ALIGN_JUMPS=0
|
||||
# CONFIG_TINY_SHMEM is not set
|
||||
CONFIG_BASE_SMALL=0
|
||||
|
||||
#
|
||||
# Loadable module support
|
||||
#
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_MODULE_FORCE_UNLOAD is not set
|
||||
CONFIG_OBSOLETE_MODPARM=y
|
||||
# CONFIG_MODVERSIONS is not set
|
||||
# CONFIG_MODULE_SRCVERSION_ALL is not set
|
||||
# CONFIG_KMOD is not set
|
||||
|
||||
#
|
||||
# System Type
|
||||
#
|
||||
# CONFIG_ARCH_CLPS7500 is not set
|
||||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
CONFIG_ARCH_CAMELOT=y
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
# CONFIG_ARCH_IXP4XX is not set
|
||||
# CONFIG_ARCH_IXP2000 is not set
|
||||
# CONFIG_ARCH_L7200 is not set
|
||||
# CONFIG_ARCH_PXA is not set
|
||||
# CONFIG_ARCH_RPC is not set
|
||||
# CONFIG_ARCH_SA1100 is not set
|
||||
# CONFIG_ARCH_S3C2410 is not set
|
||||
# CONFIG_ARCH_SHARK is not set
|
||||
# CONFIG_ARCH_LH7A40X is not set
|
||||
# CONFIG_ARCH_OMAP is not set
|
||||
# CONFIG_ARCH_VERSATILE is not set
|
||||
# CONFIG_ARCH_IMX is not set
|
||||
# CONFIG_ARCH_H720X is not set
|
||||
|
||||
#
|
||||
# Epxa10db
|
||||
#
|
||||
|
||||
#
|
||||
# PLD hotswap support
|
||||
#
|
||||
CONFIG_PLD=y
|
||||
# CONFIG_PLD_HOTSWAP is not set
|
||||
|
||||
#
|
||||
# Processor Type
|
||||
#
|
||||
CONFIG_CPU_32=y
|
||||
CONFIG_CPU_ARM922T=y
|
||||
CONFIG_CPU_32v4=y
|
||||
CONFIG_CPU_ABRT_EV4T=y
|
||||
CONFIG_CPU_CACHE_V4WT=y
|
||||
CONFIG_CPU_CACHE_VIVT=y
|
||||
CONFIG_CPU_COPY_V4WB=y
|
||||
CONFIG_CPU_TLB_V4WBI=y
|
||||
|
||||
#
|
||||
# Processor Features
|
||||
#
|
||||
# CONFIG_ARM_THUMB is not set
|
||||
# CONFIG_CPU_ICACHE_DISABLE is not set
|
||||
# CONFIG_CPU_DCACHE_DISABLE is not set
|
||||
# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
|
||||
|
||||
#
|
||||
# Bus support
|
||||
#
|
||||
|
||||
#
|
||||
# PCCARD (PCMCIA/CardBus) support
|
||||
#
|
||||
# CONFIG_PCCARD is not set
|
||||
|
||||
#
|
||||
# Kernel Features
|
||||
#
|
||||
# CONFIG_PREEMPT is not set
|
||||
CONFIG_ALIGNMENT_TRAP=y
|
||||
|
||||
#
|
||||
# Boot options
|
||||
#
|
||||
CONFIG_ZBOOT_ROM_TEXT=0x0
|
||||
CONFIG_ZBOOT_ROM_BSS=0x0
|
||||
CONFIG_CMDLINE="mem=32M console=ttyUA0,115200 initrd=0x00200000,8M root=/dev/ram0 rw"
|
||||
# CONFIG_XIP_KERNEL is not set
|
||||
|
||||
#
|
||||
# Floating point emulation
|
||||
#
|
||||
|
||||
#
|
||||
# At least one emulation must be selected
|
||||
#
|
||||
CONFIG_FPE_NWFPE=y
|
||||
# CONFIG_FPE_NWFPE_XP is not set
|
||||
# CONFIG_FPE_FASTFPE is not set
|
||||
|
||||
#
|
||||
# Userspace binary formats
|
||||
#
|
||||
CONFIG_BINFMT_ELF=y
|
||||
# CONFIG_BINFMT_AOUT is not set
|
||||
# CONFIG_BINFMT_MISC is not set
|
||||
# CONFIG_ARTHUR is not set
|
||||
|
||||
#
|
||||
# Power management options
|
||||
#
|
||||
# CONFIG_PM is not set
|
||||
|
||||
#
|
||||
# Device Drivers
|
||||
#
|
||||
|
||||
#
|
||||
# Generic Driver Options
|
||||
#
|
||||
CONFIG_STANDALONE=y
|
||||
CONFIG_PREVENT_FIRMWARE_BUILD=y
|
||||
# CONFIG_FW_LOADER is not set
|
||||
|
||||
#
|
||||
# Memory Technology Devices (MTD)
|
||||
#
|
||||
# CONFIG_MTD is not set
|
||||
|
||||
#
|
||||
# Parallel port support
|
||||
#
|
||||
# CONFIG_PARPORT is not set
|
||||
|
||||
#
|
||||
# Plug and Play support
|
||||
#
|
||||
|
||||
#
|
||||
# Block devices
|
||||
#
|
||||
# CONFIG_BLK_DEV_FD is not set
|
||||
# CONFIG_BLK_DEV_COW_COMMON is not set
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
|
||||
# CONFIG_BLK_DEV_NBD is not set
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_COUNT=16
|
||||
CONFIG_BLK_DEV_RAM_SIZE=8192
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
# CONFIG_CDROM_PKTCDVD is not set
|
||||
|
||||
#
|
||||
# IO Schedulers
|
||||
#
|
||||
CONFIG_IOSCHED_NOOP=y
|
||||
CONFIG_IOSCHED_AS=y
|
||||
CONFIG_IOSCHED_DEADLINE=y
|
||||
CONFIG_IOSCHED_CFQ=y
|
||||
# CONFIG_ATA_OVER_ETH is not set
|
||||
|
||||
#
|
||||
# SCSI device support
|
||||
#
|
||||
# CONFIG_SCSI is not set
|
||||
|
||||
#
|
||||
# Multi-device support (RAID and LVM)
|
||||
#
|
||||
# CONFIG_MD is not set
|
||||
|
||||
#
|
||||
# Fusion MPT device support
|
||||
#
|
||||
|
||||
#
|
||||
# IEEE 1394 (FireWire) support
|
||||
#
|
||||
|
||||
#
|
||||
# I2O device support
|
||||
#
|
||||
|
||||
#
|
||||
# Networking support
|
||||
#
|
||||
CONFIG_NET=y
|
||||
|
||||
#
|
||||
# Networking options
|
||||
#
|
||||
CONFIG_PACKET=y
|
||||
# CONFIG_PACKET_MMAP is not set
|
||||
# CONFIG_NETLINK_DEV is not set
|
||||
CONFIG_UNIX=y
|
||||
# CONFIG_NET_KEY is not set
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_MULTICAST=y
|
||||
# CONFIG_IP_ADVANCED_ROUTER is not set
|
||||
CONFIG_IP_PNP=y
|
||||
# CONFIG_IP_PNP_DHCP is not set
|
||||
# CONFIG_IP_PNP_BOOTP is not set
|
||||
# CONFIG_IP_PNP_RARP is not set
|
||||
# CONFIG_NET_IPIP is not set
|
||||
# CONFIG_NET_IPGRE is not set
|
||||
# CONFIG_IP_MROUTE is not set
|
||||
# CONFIG_ARPD is not set
|
||||
# CONFIG_SYN_COOKIES is not set
|
||||
# CONFIG_INET_AH is not set
|
||||
# CONFIG_INET_ESP is not set
|
||||
# CONFIG_INET_IPCOMP is not set
|
||||
# CONFIG_INET_TUNNEL is not set
|
||||
# CONFIG_IP_TCPDIAG is not set
|
||||
# CONFIG_IP_TCPDIAG_IPV6 is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_NETFILTER is not set
|
||||
|
||||
#
|
||||
# SCTP Configuration (EXPERIMENTAL)
|
||||
#
|
||||
# CONFIG_IP_SCTP is not set
|
||||
# CONFIG_ATM is not set
|
||||
# CONFIG_BRIDGE is not set
|
||||
# CONFIG_VLAN_8021Q is not set
|
||||
# CONFIG_DECNET is not set
|
||||
# CONFIG_LLC2 is not set
|
||||
# CONFIG_IPX is not set
|
||||
# CONFIG_ATALK is not set
|
||||
# CONFIG_X25 is not set
|
||||
# CONFIG_LAPB is not set
|
||||
# CONFIG_NET_DIVERT is not set
|
||||
# CONFIG_ECONET is not set
|
||||
# CONFIG_WAN_ROUTER is not set
|
||||
|
||||
#
|
||||
# QoS and/or fair queueing
|
||||
#
|
||||
# CONFIG_NET_SCHED is not set
|
||||
# CONFIG_NET_CLS_ROUTE is not set
|
||||
|
||||
#
|
||||
# Network testing
|
||||
#
|
||||
# CONFIG_NET_PKTGEN is not set
|
||||
# CONFIG_NETPOLL is not set
|
||||
# CONFIG_NET_POLL_CONTROLLER is not set
|
||||
# CONFIG_HAMRADIO is not set
|
||||
# CONFIG_IRDA is not set
|
||||
# CONFIG_BT is not set
|
||||
CONFIG_NETDEVICES=y
|
||||
# CONFIG_DUMMY is not set
|
||||
# CONFIG_BONDING is not set
|
||||
# CONFIG_EQUALIZER is not set
|
||||
# CONFIG_TUN is not set
|
||||
|
||||
#
|
||||
# Ethernet (10 or 100Mbit)
|
||||
#
|
||||
# CONFIG_NET_ETHERNET is not set
|
||||
|
||||
#
|
||||
# Ethernet (1000 Mbit)
|
||||
#
|
||||
|
||||
#
|
||||
# Ethernet (10000 Mbit)
|
||||
#
|
||||
|
||||
#
|
||||
# Token Ring devices
|
||||
#
|
||||
|
||||
#
|
||||
# Wireless LAN (non-hamradio)
|
||||
#
|
||||
# CONFIG_NET_RADIO is not set
|
||||
|
||||
#
|
||||
# Wan interfaces
|
||||
#
|
||||
# CONFIG_WAN is not set
|
||||
CONFIG_PPP=y
|
||||
CONFIG_PPP_MULTILINK=y
|
||||
# CONFIG_PPP_FILTER is not set
|
||||
CONFIG_PPP_ASYNC=y
|
||||
CONFIG_PPP_SYNC_TTY=y
|
||||
CONFIG_PPP_DEFLATE=y
|
||||
# CONFIG_PPP_BSDCOMP is not set
|
||||
# CONFIG_PPPOE is not set
|
||||
# CONFIG_SLIP is not set
|
||||
# CONFIG_SHAPER is not set
|
||||
# CONFIG_NETCONSOLE is not set
|
||||
|
||||
#
|
||||
# ISDN subsystem
|
||||
#
|
||||
# CONFIG_ISDN is not set
|
||||
|
||||
#
|
||||
# Input device support
|
||||
#
|
||||
CONFIG_INPUT=y
|
||||
|
||||
#
|
||||
# Userland interfaces
|
||||
#
|
||||
CONFIG_INPUT_MOUSEDEV=y
|
||||
CONFIG_INPUT_MOUSEDEV_PSAUX=y
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
|
||||
# CONFIG_INPUT_JOYDEV is not set
|
||||
# CONFIG_INPUT_TSDEV is not set
|
||||
# CONFIG_INPUT_EVDEV is not set
|
||||
# CONFIG_INPUT_EVBUG is not set
|
||||
|
||||
#
|
||||
# Input Device Drivers
|
||||
#
|
||||
# CONFIG_INPUT_KEYBOARD is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
# CONFIG_INPUT_JOYSTICK is not set
|
||||
# CONFIG_INPUT_TOUCHSCREEN is not set
|
||||
# CONFIG_INPUT_MISC is not set
|
||||
|
||||
#
|
||||
# Hardware I/O ports
|
||||
#
|
||||
CONFIG_SERIO=y
|
||||
CONFIG_SERIO_SERPORT=y
|
||||
# CONFIG_SERIO_RAW is not set
|
||||
# CONFIG_GAMEPORT is not set
|
||||
CONFIG_SOUND_GAMEPORT=y
|
||||
|
||||
#
|
||||
# Character devices
|
||||
#
|
||||
CONFIG_VT=y
|
||||
CONFIG_VT_CONSOLE=y
|
||||
CONFIG_HW_CONSOLE=y
|
||||
# CONFIG_SERIAL_NONSTANDARD is not set
|
||||
|
||||
#
|
||||
# Serial drivers
|
||||
#
|
||||
# CONFIG_SERIAL_8250 is not set
|
||||
|
||||
#
|
||||
# Non-8250 serial port support
|
||||
#
|
||||
CONFIG_SERIAL_UART00=y
|
||||
CONFIG_SERIAL_UART00_CONSOLE=y
|
||||
CONFIG_SERIAL_CORE=y
|
||||
CONFIG_SERIAL_CORE_CONSOLE=y
|
||||
CONFIG_UNIX98_PTYS=y
|
||||
CONFIG_LEGACY_PTYS=y
|
||||
CONFIG_LEGACY_PTY_COUNT=256
|
||||
|
||||
#
|
||||
# IPMI
|
||||
#
|
||||
# CONFIG_IPMI_HANDLER is not set
|
||||
|
||||
#
|
||||
# Watchdog Cards
|
||||
#
|
||||
# CONFIG_WATCHDOG is not set
|
||||
# CONFIG_NVRAM is not set
|
||||
# CONFIG_RTC is not set
|
||||
# CONFIG_DTLK is not set
|
||||
# CONFIG_R3964 is not set
|
||||
|
||||
#
|
||||
# Ftape, the floppy tape device driver
|
||||
#
|
||||
# CONFIG_DRM is not set
|
||||
# CONFIG_RAW_DRIVER is not set
|
||||
|
||||
#
|
||||
# TPM devices
|
||||
#
|
||||
# CONFIG_TCG_TPM is not set
|
||||
|
||||
#
|
||||
# I2C support
|
||||
#
|
||||
# CONFIG_I2C is not set
|
||||
|
||||
#
|
||||
# Misc devices
|
||||
#
|
||||
|
||||
#
|
||||
# Multimedia devices
|
||||
#
|
||||
# CONFIG_VIDEO_DEV is not set
|
||||
|
||||
#
|
||||
# Digital Video Broadcasting Devices
|
||||
#
|
||||
# CONFIG_DVB is not set
|
||||
|
||||
#
|
||||
# Graphics support
|
||||
#
|
||||
# CONFIG_FB is not set
|
||||
|
||||
#
|
||||
# Console display driver support
|
||||
#
|
||||
# CONFIG_VGA_CONSOLE is not set
|
||||
CONFIG_DUMMY_CONSOLE=y
|
||||
|
||||
#
|
||||
# Sound
|
||||
#
|
||||
# CONFIG_SOUND is not set
|
||||
|
||||
#
|
||||
# USB support
|
||||
#
|
||||
CONFIG_USB_ARCH_HAS_HCD=y
|
||||
# CONFIG_USB_ARCH_HAS_OHCI is not set
|
||||
# CONFIG_USB is not set
|
||||
|
||||
#
|
||||
# USB Gadget Support
|
||||
#
|
||||
# CONFIG_USB_GADGET is not set
|
||||
|
||||
#
|
||||
# MMC/SD Card support
|
||||
#
|
||||
# CONFIG_MMC is not set
|
||||
|
||||
#
|
||||
# File systems
|
||||
#
|
||||
CONFIG_EXT2_FS=y
|
||||
# CONFIG_EXT2_FS_XATTR is not set
|
||||
# CONFIG_EXT3_FS is not set
|
||||
# CONFIG_JBD is not set
|
||||
# CONFIG_REISERFS_FS is not set
|
||||
# CONFIG_JFS_FS is not set
|
||||
|
||||
#
|
||||
# XFS support
|
||||
#
|
||||
# CONFIG_XFS_FS is not set
|
||||
# CONFIG_MINIX_FS is not set
|
||||
# CONFIG_ROMFS_FS is not set
|
||||
# CONFIG_QUOTA is not set
|
||||
CONFIG_DNOTIFY=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
|
||||
#
|
||||
# CD-ROM/DVD Filesystems
|
||||
#
|
||||
# CONFIG_ISO9660_FS is not set
|
||||
# CONFIG_UDF_FS is not set
|
||||
|
||||
#
|
||||
# DOS/FAT/NT Filesystems
|
||||
#
|
||||
# CONFIG_MSDOS_FS is not set
|
||||
# CONFIG_VFAT_FS is not set
|
||||
# CONFIG_NTFS_FS is not set
|
||||
|
||||
#
|
||||
# Pseudo filesystems
|
||||
#
|
||||
CONFIG_PROC_FS=y
|
||||
CONFIG_SYSFS=y
|
||||
# CONFIG_DEVFS_FS is not set
|
||||
# CONFIG_DEVPTS_FS_XATTR is not set
|
||||
# CONFIG_TMPFS is not set
|
||||
# CONFIG_HUGETLB_PAGE is not set
|
||||
CONFIG_RAMFS=y
|
||||
|
||||
#
|
||||
# Miscellaneous filesystems
|
||||
#
|
||||
# CONFIG_ADFS_FS is not set
|
||||
# CONFIG_AFFS_FS is not set
|
||||
# CONFIG_HFS_FS is not set
|
||||
# CONFIG_HFSPLUS_FS is not set
|
||||
# CONFIG_BEFS_FS is not set
|
||||
# CONFIG_BFS_FS is not set
|
||||
# CONFIG_EFS_FS is not set
|
||||
# CONFIG_CRAMFS is not set
|
||||
# CONFIG_VXFS_FS is not set
|
||||
# CONFIG_HPFS_FS is not set
|
||||
# CONFIG_QNX4FS_FS is not set
|
||||
# CONFIG_SYSV_FS is not set
|
||||
# CONFIG_UFS_FS is not set
|
||||
|
||||
#
|
||||
# Network File Systems
|
||||
#
|
||||
# CONFIG_NFS_FS is not set
|
||||
# CONFIG_NFSD is not set
|
||||
CONFIG_SMB_FS=y
|
||||
# CONFIG_SMB_NLS_DEFAULT is not set
|
||||
# CONFIG_CIFS is not set
|
||||
# CONFIG_NCP_FS is not set
|
||||
# CONFIG_CODA_FS is not set
|
||||
# CONFIG_AFS_FS is not set
|
||||
|
||||
#
|
||||
# Partition Types
|
||||
#
|
||||
# CONFIG_PARTITION_ADVANCED is not set
|
||||
CONFIG_MSDOS_PARTITION=y
|
||||
|
||||
#
|
||||
# Native Language Support
|
||||
#
|
||||
CONFIG_NLS=y
|
||||
CONFIG_NLS_DEFAULT="iso8859-1"
|
||||
# CONFIG_NLS_CODEPAGE_437 is not set
|
||||
# CONFIG_NLS_CODEPAGE_737 is not set
|
||||
# CONFIG_NLS_CODEPAGE_775 is not set
|
||||
# CONFIG_NLS_CODEPAGE_850 is not set
|
||||
# CONFIG_NLS_CODEPAGE_852 is not set
|
||||
# CONFIG_NLS_CODEPAGE_855 is not set
|
||||
# CONFIG_NLS_CODEPAGE_857 is not set
|
||||
# CONFIG_NLS_CODEPAGE_860 is not set
|
||||
# CONFIG_NLS_CODEPAGE_861 is not set
|
||||
# CONFIG_NLS_CODEPAGE_862 is not set
|
||||
# CONFIG_NLS_CODEPAGE_863 is not set
|
||||
# CONFIG_NLS_CODEPAGE_864 is not set
|
||||
# CONFIG_NLS_CODEPAGE_865 is not set
|
||||
# CONFIG_NLS_CODEPAGE_866 is not set
|
||||
# CONFIG_NLS_CODEPAGE_869 is not set
|
||||
# CONFIG_NLS_CODEPAGE_936 is not set
|
||||
# CONFIG_NLS_CODEPAGE_950 is not set
|
||||
# CONFIG_NLS_CODEPAGE_932 is not set
|
||||
# CONFIG_NLS_CODEPAGE_949 is not set
|
||||
# CONFIG_NLS_CODEPAGE_874 is not set
|
||||
# CONFIG_NLS_ISO8859_8 is not set
|
||||
# CONFIG_NLS_CODEPAGE_1250 is not set
|
||||
# CONFIG_NLS_CODEPAGE_1251 is not set
|
||||
# CONFIG_NLS_ASCII is not set
|
||||
# CONFIG_NLS_ISO8859_1 is not set
|
||||
# CONFIG_NLS_ISO8859_2 is not set
|
||||
# CONFIG_NLS_ISO8859_3 is not set
|
||||
# CONFIG_NLS_ISO8859_4 is not set
|
||||
# CONFIG_NLS_ISO8859_5 is not set
|
||||
# CONFIG_NLS_ISO8859_6 is not set
|
||||
# CONFIG_NLS_ISO8859_7 is not set
|
||||
# CONFIG_NLS_ISO8859_9 is not set
|
||||
# CONFIG_NLS_ISO8859_13 is not set
|
||||
# CONFIG_NLS_ISO8859_14 is not set
|
||||
# CONFIG_NLS_ISO8859_15 is not set
|
||||
# CONFIG_NLS_KOI8_R is not set
|
||||
# CONFIG_NLS_KOI8_U is not set
|
||||
# CONFIG_NLS_UTF8 is not set
|
||||
|
||||
#
|
||||
# Profiling support
|
||||
#
|
||||
# CONFIG_PROFILING is not set
|
||||
|
||||
#
|
||||
# Kernel hacking
|
||||
#
|
||||
# CONFIG_PRINTK_TIME is not set
|
||||
# CONFIG_DEBUG_KERNEL is not set
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_DEBUG_BUGVERBOSE=y
|
||||
CONFIG_FRAME_POINTER=y
|
||||
# CONFIG_DEBUG_USER is not set
|
||||
|
||||
#
|
||||
# Security options
|
||||
#
|
||||
# CONFIG_KEYS is not set
|
||||
# CONFIG_SECURITY is not set
|
||||
|
||||
#
|
||||
# Cryptographic options
|
||||
#
|
||||
# CONFIG_CRYPTO is not set
|
||||
|
||||
#
|
||||
# Hardware crypto devices
|
||||
#
|
||||
|
||||
#
|
||||
# Library routines
|
||||
#
|
||||
CONFIG_CRC_CCITT=y
|
||||
CONFIG_CRC32=y
|
||||
# CONFIG_LIBCRC32C is not set
|
||||
CONFIG_ZLIB_INFLATE=y
|
||||
CONFIG_ZLIB_DEFLATE=y
|
|
@ -63,7 +63,6 @@ CONFIG_KMOD=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
CONFIG_ARCH_FOOTBRIDGE=y
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -57,7 +57,6 @@ CONFIG_BASE_SMALL=0
|
|||
CONFIG_ARCH_CLPS711X=y
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -65,7 +65,6 @@ CONFIG_OBSOLETE_MODPARM=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -60,7 +60,6 @@ CONFIG_KMOD=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -63,7 +63,6 @@ CONFIG_KMOD=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -66,7 +66,6 @@ CONFIG_KMOD=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -65,7 +65,6 @@ CONFIG_KMOD=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
CONFIG_ARCH_INTEGRATOR=y
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -65,7 +65,6 @@ CONFIG_KMOD=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
CONFIG_ARCH_IOP3XX=y
|
||||
|
|
|
@ -64,7 +64,6 @@ CONFIG_KMOD=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
CONFIG_ARCH_IOP3XX=y
|
||||
|
|
|
@ -64,7 +64,6 @@ CONFIG_KMOD=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
CONFIG_ARCH_IOP3XX=y
|
||||
|
|
|
@ -64,7 +64,6 @@ CONFIG_KMOD=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
CONFIG_ARCH_IOP3XX=y
|
||||
|
|
|
@ -86,7 +86,6 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -86,7 +86,6 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -86,7 +86,6 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -86,7 +86,6 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -85,7 +85,6 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -63,7 +63,6 @@ CONFIG_KMOD=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -62,7 +62,6 @@ CONFIG_KMOD=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -60,7 +60,6 @@ CONFIG_BASE_SMALL=0
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -60,7 +60,6 @@ CONFIG_BASE_SMALL=0
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -63,7 +63,6 @@ CONFIG_OBSOLETE_MODPARM=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -62,7 +62,6 @@ CONFIG_KMOD=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -63,7 +63,6 @@ CONFIG_OBSOLETE_MODPARM=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -63,7 +63,6 @@ CONFIG_KMOD=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -65,7 +65,6 @@ CONFIG_OBSOLETE_MODPARM=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -58,7 +58,6 @@ CONFIG_BASE_SMALL=0
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
CONFIG_ARCH_FOOTBRIDGE=y
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -85,7 +85,6 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -63,7 +63,6 @@ CONFIG_KMOD=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -63,7 +63,6 @@ CONFIG_OBSOLETE_MODPARM=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -65,7 +65,6 @@ CONFIG_OBSOLETE_MODPARM=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -66,7 +66,6 @@ CONFIG_KMOD=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -85,7 +85,6 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -62,7 +62,6 @@ CONFIG_OBSOLETE_MODPARM=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -66,7 +66,6 @@ CONFIG_KMOD=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -64,7 +64,6 @@ CONFIG_KMOD=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -58,7 +58,6 @@ CONFIG_BASE_SMALL=0
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -87,7 +87,6 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -64,7 +64,6 @@ CONFIG_KMOD=y
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_CAMELOT is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
|
|
|
@ -710,7 +710,8 @@ int setup_irq(unsigned int irq, struct irqaction *new)
|
|||
desc->pending = 0;
|
||||
desc->disable_depth = 1;
|
||||
|
||||
if (new->flags & SA_TRIGGER_MASK) {
|
||||
if (new->flags & SA_TRIGGER_MASK &&
|
||||
desc->chip->set_type) {
|
||||
unsigned int type = new->flags & SA_TRIGGER_MASK;
|
||||
desc->chip->set_type(irq, type);
|
||||
}
|
||||
|
|
54
arch/arm/mach-at91rm9200/Kconfig
Normal file
54
arch/arm/mach-at91rm9200/Kconfig
Normal file
|
@ -0,0 +1,54 @@
|
|||
if ARCH_AT91RM9200
|
||||
|
||||
menu "AT91RM9200 Implementations"
|
||||
|
||||
comment "AT91RM9200 Board Type"
|
||||
|
||||
config ARCH_AT91RM9200DK
|
||||
bool "Atmel AT91RM9200-DK Development board"
|
||||
depends on ARCH_AT91RM9200
|
||||
help
|
||||
Select this if you are using Atmel's AT91RM9200-DK Development board
|
||||
|
||||
config MACH_AT91RM9200EK
|
||||
bool "Atmel AT91RM9200-EK Evaluation Kit"
|
||||
depends on ARCH_AT91RM9200
|
||||
help
|
||||
Select this if you are using Atmel's AT91RM9200-EK Evaluation Kit
|
||||
|
||||
config MACH_CSB337
|
||||
bool "Cogent CSB337 board"
|
||||
depends on ARCH_AT91RM9200
|
||||
help
|
||||
Select this if you are using Cogent's CSB337 board
|
||||
|
||||
config MACH_CSB637
|
||||
bool "Cogent CSB637 board"
|
||||
depends on ARCH_AT91RM9200
|
||||
help
|
||||
Select this if you are using Cogent's CSB637 board
|
||||
|
||||
config MACH_CARMEVA
|
||||
bool "Conitec's ARM&EVA"
|
||||
depends on ARCH_AT91RM9200
|
||||
help
|
||||
Select this if you are using Conitec's AT91RM9200-MCU-Module
|
||||
|
||||
config MACH_KB9200
|
||||
bool "KwikByte's KB920x"
|
||||
depends on ARCH_AT91RM9200
|
||||
help
|
||||
Select this if you are using KwikByte's KB920x board
|
||||
|
||||
|
||||
comment "AT91RM9200 Feature Selections"
|
||||
|
||||
config AT91_PROGRAMMABLE_CLOCKS
|
||||
bool "Programmable Clocks"
|
||||
help
|
||||
Select this if you need to program one or more of the PCK0..PCK3
|
||||
programmable clock outputs.
|
||||
|
||||
endmenu
|
||||
|
||||
endif
|
27
arch/arm/mach-at91rm9200/Makefile
Normal file
27
arch/arm/mach-at91rm9200/Makefile
Normal file
|
@ -0,0 +1,27 @@
|
|||
#
|
||||
# Makefile for the linux kernel.
|
||||
#
|
||||
|
||||
obj-y := clock.o irq.o time.o gpio.o common.o devices.o
|
||||
obj-m :=
|
||||
obj-n :=
|
||||
obj- :=
|
||||
|
||||
# Board-specific support
|
||||
#obj-$(CONFIG_ARCH_AT91RM9200DK) += board-dk.o
|
||||
#obj-$(CONFIG_MACH_AT91RM9200EK) += board-ek.o
|
||||
#obj-$(CONFIG_MACH_CSB337) += board-csb337.o
|
||||
#obj-$(CONFIG_MACH_CSB637) += board-csb637.o
|
||||
#obj-$(CONFIG_MACH_CARMEVA) += board-carmeva.o
|
||||
#obj-$(CONFIG_MACH_KB9200) += board-kb9202.o
|
||||
|
||||
# LEDs support
|
||||
#led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o
|
||||
#led-$(CONFIG_MACH_AT91RM9200EK) += leds.o
|
||||
#led-$(CONFIG_MACH_CSB337) += leds.o
|
||||
#led-$(CONFIG_MACH_CSB637) += leds.o
|
||||
#led-$(CONFIG_MACH_KB9200) += leds.o
|
||||
obj-$(CONFIG_LEDS) += $(led-y)
|
||||
|
||||
# VGA support
|
||||
#obj-$(CONFIG_FB_S1D13XXX) += ics1523.o
|
9
arch/arm/mach-at91rm9200/Makefile.boot
Normal file
9
arch/arm/mach-at91rm9200/Makefile.boot
Normal file
|
@ -0,0 +1,9 @@
|
|||
# Note: the following conditions must always be true:
|
||||
# ZRELADDR == virt_to_phys(TEXTADDR)
|
||||
# PARAMS_PHYS must be within 4MB of ZRELADDR
|
||||
# INITRD_PHYS must be in RAM
|
||||
|
||||
zreladdr-y := 0x20008000
|
||||
params_phys-y := 0x20000100
|
||||
initrd_phys-y := 0x20410000
|
||||
|
620
arch/arm/mach-at91rm9200/clock.c
Normal file
620
arch/arm/mach-at91rm9200/clock.c
Normal file
|
@ -0,0 +1,620 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91rm9200/clock.c
|
||||
*
|
||||
* Copyright (C) 2005 David Brownell
|
||||
* Copyright (C) 2005 Ivan Kokshaysky
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/fs.h>
|
||||
#include <linux/debugfs.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/list.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/clk.h>
|
||||
|
||||
#include <asm/semaphore.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <asm/arch/board.h> /* for master clock global */
|
||||
|
||||
#include "generic.h"
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
/*
|
||||
* There's a lot more which can be done with clocks, including cpufreq
|
||||
* integration, slow clock mode support (for system suspend), letting
|
||||
* PLLB be used at other rates (on boards that don't need USB), etc.
|
||||
*/
|
||||
|
||||
struct clk {
|
||||
const char *name;
|
||||
unsigned long rate_hz;
|
||||
struct clk *parent;
|
||||
u32 pmc_mask;
|
||||
void (*mode)(struct clk *, int);
|
||||
unsigned id:2; /* PCK0..3, or 32k/main/a/b */
|
||||
unsigned primary:1;
|
||||
unsigned pll:1;
|
||||
unsigned programmable:1;
|
||||
u16 users;
|
||||
};
|
||||
|
||||
static spinlock_t clk_lock;
|
||||
static u32 at91_pllb_usb_init;
|
||||
|
||||
/*
|
||||
* Four primary clock sources: two crystal oscillators (32K, main), and
|
||||
* two PLLs. PLLA usually runs the master clock; and PLLB must run at
|
||||
* 48 MHz (unless no USB function clocks are needed). The main clock and
|
||||
* both PLLs are turned off to run in "slow clock mode" (system suspend).
|
||||
*/
|
||||
static struct clk clk32k = {
|
||||
.name = "clk32k",
|
||||
.rate_hz = AT91_SLOW_CLOCK,
|
||||
.users = 1, /* always on */
|
||||
.id = 0,
|
||||
.primary = 1,
|
||||
};
|
||||
static struct clk main_clk = {
|
||||
.name = "main",
|
||||
.pmc_mask = 1 << 0, /* in PMC_SR */
|
||||
.users = 1,
|
||||
.id = 1,
|
||||
.primary = 1,
|
||||
};
|
||||
static struct clk plla = {
|
||||
.name = "plla",
|
||||
.parent = &main_clk,
|
||||
.pmc_mask = 1 << 1, /* in PMC_SR */
|
||||
.id = 2,
|
||||
.primary = 1,
|
||||
.pll = 1,
|
||||
};
|
||||
|
||||
static void pllb_mode(struct clk *clk, int is_on)
|
||||
{
|
||||
u32 value;
|
||||
|
||||
if (is_on) {
|
||||
is_on = AT91_PMC_LOCKB;
|
||||
value = at91_pllb_usb_init;
|
||||
} else
|
||||
value = 0;
|
||||
|
||||
at91_sys_write(AT91_CKGR_PLLBR, value);
|
||||
|
||||
do {
|
||||
cpu_relax();
|
||||
} while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != is_on);
|
||||
}
|
||||
|
||||
static struct clk pllb = {
|
||||
.name = "pllb",
|
||||
.parent = &main_clk,
|
||||
.pmc_mask = 1 << 2, /* in PMC_SR */
|
||||
.mode = pllb_mode,
|
||||
.id = 3,
|
||||
.primary = 1,
|
||||
.pll = 1,
|
||||
};
|
||||
|
||||
static void pmc_sys_mode(struct clk *clk, int is_on)
|
||||
{
|
||||
if (is_on)
|
||||
at91_sys_write(AT91_PMC_SCER, clk->pmc_mask);
|
||||
else
|
||||
at91_sys_write(AT91_PMC_SCDR, clk->pmc_mask);
|
||||
}
|
||||
|
||||
/* USB function clocks (PLLB must be 48 MHz) */
|
||||
static struct clk udpck = {
|
||||
.name = "udpck",
|
||||
.parent = &pllb,
|
||||
.pmc_mask = AT91_PMC_UDP,
|
||||
.mode = pmc_sys_mode,
|
||||
};
|
||||
static struct clk uhpck = {
|
||||
.name = "uhpck",
|
||||
.parent = &pllb,
|
||||
.pmc_mask = AT91_PMC_UHP,
|
||||
.mode = pmc_sys_mode,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
|
||||
/*
|
||||
* The four programmable clocks can be parented by any primary clock.
|
||||
* You must configure pin multiplexing to bring these signals out.
|
||||
*/
|
||||
static struct clk pck0 = {
|
||||
.name = "pck0",
|
||||
.pmc_mask = AT91_PMC_PCK0,
|
||||
.mode = pmc_sys_mode,
|
||||
.programmable = 1,
|
||||
.id = 0,
|
||||
};
|
||||
static struct clk pck1 = {
|
||||
.name = "pck1",
|
||||
.pmc_mask = AT91_PMC_PCK1,
|
||||
.mode = pmc_sys_mode,
|
||||
.programmable = 1,
|
||||
.id = 1,
|
||||
};
|
||||
static struct clk pck2 = {
|
||||
.name = "pck2",
|
||||
.pmc_mask = AT91_PMC_PCK2,
|
||||
.mode = pmc_sys_mode,
|
||||
.programmable = 1,
|
||||
.id = 2,
|
||||
};
|
||||
static struct clk pck3 = {
|
||||
.name = "pck3",
|
||||
.pmc_mask = AT91_PMC_PCK3,
|
||||
.mode = pmc_sys_mode,
|
||||
.programmable = 1,
|
||||
.id = 3,
|
||||
};
|
||||
#endif /* CONFIG_AT91_PROGRAMMABLE_CLOCKS */
|
||||
|
||||
|
||||
/*
|
||||
* The master clock is divided from the CPU clock (by 1-4). It's used for
|
||||
* memory, interfaces to on-chip peripherals, the AIC, and sometimes more
|
||||
* (e.g baud rate generation). It's sourced from one of the primary clocks.
|
||||
*/
|
||||
static struct clk mck = {
|
||||
.name = "mck",
|
||||
.pmc_mask = 1 << 3, /* in PMC_SR */
|
||||
.users = 1, /* (must be) always on */
|
||||
};
|
||||
|
||||
static void pmc_periph_mode(struct clk *clk, int is_on)
|
||||
{
|
||||
if (is_on)
|
||||
at91_sys_write(AT91_PMC_PCER, clk->pmc_mask);
|
||||
else
|
||||
at91_sys_write(AT91_PMC_PCDR, clk->pmc_mask);
|
||||
}
|
||||
|
||||
static struct clk udc_clk = {
|
||||
.name = "udc_clk",
|
||||
.parent = &mck,
|
||||
.pmc_mask = 1 << AT91_ID_UDP,
|
||||
.mode = pmc_periph_mode,
|
||||
};
|
||||
static struct clk ohci_clk = {
|
||||
.name = "ohci_clk",
|
||||
.parent = &mck,
|
||||
.pmc_mask = 1 << AT91_ID_UHP,
|
||||
.mode = pmc_periph_mode,
|
||||
};
|
||||
|
||||
static struct clk *const clock_list[] = {
|
||||
/* four primary clocks -- MUST BE FIRST! */
|
||||
&clk32k,
|
||||
&main_clk,
|
||||
&plla,
|
||||
&pllb,
|
||||
|
||||
/* PLLB children (USB) */
|
||||
&udpck,
|
||||
&uhpck,
|
||||
|
||||
#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
|
||||
/* programmable clocks */
|
||||
&pck0,
|
||||
&pck1,
|
||||
&pck2,
|
||||
&pck3,
|
||||
#endif /* CONFIG_AT91_PROGRAMMABLE_CLOCKS */
|
||||
|
||||
/* MCK and peripherals */
|
||||
&mck,
|
||||
// usart0..usart3
|
||||
// mmc
|
||||
&udc_clk,
|
||||
// i2c
|
||||
// spi
|
||||
// ssc0..ssc2
|
||||
// tc0..tc5
|
||||
&ohci_clk,
|
||||
// ether
|
||||
};
|
||||
|
||||
|
||||
/* clocks are all static for now; no refcounting necessary */
|
||||
struct clk *clk_get(struct device *dev, const char *id)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(clock_list); i++) {
|
||||
if (strcmp(id, clock_list[i]->name) == 0)
|
||||
return clock_list[i];
|
||||
}
|
||||
|
||||
return ERR_PTR(-ENOENT);
|
||||
}
|
||||
EXPORT_SYMBOL(clk_get);
|
||||
|
||||
void clk_put(struct clk *clk)
|
||||
{
|
||||
}
|
||||
EXPORT_SYMBOL(clk_put);
|
||||
|
||||
static void __clk_enable(struct clk *clk)
|
||||
{
|
||||
if (clk->parent)
|
||||
__clk_enable(clk->parent);
|
||||
if (clk->users++ == 0 && clk->mode)
|
||||
clk->mode(clk, 1);
|
||||
}
|
||||
|
||||
int clk_enable(struct clk *clk)
|
||||
{
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&clk_lock, flags);
|
||||
__clk_enable(clk);
|
||||
spin_unlock_irqrestore(&clk_lock, flags);
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(clk_enable);
|
||||
|
||||
static void __clk_disable(struct clk *clk)
|
||||
{
|
||||
BUG_ON(clk->users == 0);
|
||||
if (--clk->users == 0 && clk->mode)
|
||||
clk->mode(clk, 0);
|
||||
if (clk->parent)
|
||||
__clk_disable(clk->parent);
|
||||
}
|
||||
|
||||
void clk_disable(struct clk *clk)
|
||||
{
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&clk_lock, flags);
|
||||
__clk_disable(clk);
|
||||
spin_unlock_irqrestore(&clk_lock, flags);
|
||||
}
|
||||
EXPORT_SYMBOL(clk_disable);
|
||||
|
||||
unsigned long clk_get_rate(struct clk *clk)
|
||||
{
|
||||
unsigned long flags;
|
||||
unsigned long rate;
|
||||
|
||||
spin_lock_irqsave(&clk_lock, flags);
|
||||
for (;;) {
|
||||
rate = clk->rate_hz;
|
||||
if (rate || !clk->parent)
|
||||
break;
|
||||
clk = clk->parent;
|
||||
}
|
||||
spin_unlock_irqrestore(&clk_lock, flags);
|
||||
return rate;
|
||||
}
|
||||
EXPORT_SYMBOL(clk_get_rate);
|
||||
|
||||
/*------------------------------------------------------------------------*/
|
||||
|
||||
#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
|
||||
|
||||
/*
|
||||
* For now, only the programmable clocks support reparenting (MCK could
|
||||
* do this too, with care) or rate changing (the PLLs could do this too,
|
||||
* ditto MCK but that's more for cpufreq). Drivers may reparent to get
|
||||
* a better rate match; we don't.
|
||||
*/
|
||||
|
||||
long clk_round_rate(struct clk *clk, unsigned long rate)
|
||||
{
|
||||
unsigned long flags;
|
||||
unsigned prescale;
|
||||
unsigned long actual;
|
||||
|
||||
if (!clk->programmable)
|
||||
return -EINVAL;
|
||||
spin_lock_irqsave(&clk_lock, flags);
|
||||
|
||||
actual = clk->parent->rate_hz;
|
||||
for (prescale = 0; prescale < 7; prescale++) {
|
||||
if (actual && actual <= rate)
|
||||
break;
|
||||
actual >>= 1;
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&clk_lock, flags);
|
||||
return (prescale < 7) ? actual : -ENOENT;
|
||||
}
|
||||
EXPORT_SYMBOL(clk_round_rate);
|
||||
|
||||
int clk_set_rate(struct clk *clk, unsigned long rate)
|
||||
{
|
||||
unsigned long flags;
|
||||
unsigned prescale;
|
||||
unsigned long actual;
|
||||
|
||||
if (!clk->programmable)
|
||||
return -EINVAL;
|
||||
if (clk->users)
|
||||
return -EBUSY;
|
||||
spin_lock_irqsave(&clk_lock, flags);
|
||||
|
||||
actual = clk->parent->rate_hz;
|
||||
for (prescale = 0; prescale < 7; prescale++) {
|
||||
if (actual && actual <= rate) {
|
||||
u32 pckr;
|
||||
|
||||
pckr = at91_sys_read(AT91_PMC_PCKR(clk->id));
|
||||
pckr &= 0x03;
|
||||
pckr |= prescale << 2;
|
||||
at91_sys_write(AT91_PMC_PCKR(clk->id), pckr);
|
||||
clk->rate_hz = actual;
|
||||
break;
|
||||
}
|
||||
actual >>= 1;
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&clk_lock, flags);
|
||||
return (prescale < 7) ? actual : -ENOENT;
|
||||
}
|
||||
EXPORT_SYMBOL(clk_set_rate);
|
||||
|
||||
struct clk *clk_get_parent(struct clk *clk)
|
||||
{
|
||||
return clk->parent;
|
||||
}
|
||||
EXPORT_SYMBOL(clk_get_parent);
|
||||
|
||||
int clk_set_parent(struct clk *clk, struct clk *parent)
|
||||
{
|
||||
unsigned long flags;
|
||||
|
||||
if (clk->users)
|
||||
return -EBUSY;
|
||||
if (!parent->primary || !clk->programmable)
|
||||
return -EINVAL;
|
||||
spin_lock_irqsave(&clk_lock, flags);
|
||||
|
||||
clk->rate_hz = parent->rate_hz;
|
||||
clk->parent = parent;
|
||||
at91_sys_write(AT91_PMC_PCKR(clk->id), parent->id);
|
||||
|
||||
spin_unlock_irqrestore(&clk_lock, flags);
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(clk_set_parent);
|
||||
|
||||
#endif /* CONFIG_AT91_PROGRAMMABLE_CLOCKS */
|
||||
|
||||
/*------------------------------------------------------------------------*/
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
|
||||
static int at91_clk_show(struct seq_file *s, void *unused)
|
||||
{
|
||||
u32 scsr, pcsr, sr;
|
||||
unsigned i;
|
||||
|
||||
seq_printf(s, "SCSR = %8x\n", scsr = at91_sys_read(AT91_PMC_SCSR));
|
||||
seq_printf(s, "PCSR = %8x\n", pcsr = at91_sys_read(AT91_PMC_PCSR));
|
||||
|
||||
seq_printf(s, "MOR = %8x\n", at91_sys_read(AT91_CKGR_MOR));
|
||||
seq_printf(s, "MCFR = %8x\n", at91_sys_read(AT91_CKGR_MCFR));
|
||||
seq_printf(s, "PLLA = %8x\n", at91_sys_read(AT91_CKGR_PLLAR));
|
||||
seq_printf(s, "PLLB = %8x\n", at91_sys_read(AT91_CKGR_PLLBR));
|
||||
|
||||
seq_printf(s, "MCKR = %8x\n", at91_sys_read(AT91_PMC_MCKR));
|
||||
for (i = 0; i < 4; i++)
|
||||
seq_printf(s, "PCK%d = %8x\n", i, at91_sys_read(AT91_PMC_PCKR(i)));
|
||||
seq_printf(s, "SR = %8x\n", sr = at91_sys_read(AT91_PMC_SR));
|
||||
|
||||
seq_printf(s, "\n");
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(clock_list); i++) {
|
||||
char *state;
|
||||
struct clk *clk = clock_list[i];
|
||||
|
||||
if (clk->mode == pmc_sys_mode)
|
||||
state = (scsr & clk->pmc_mask) ? "on" : "off";
|
||||
else if (clk->mode == pmc_periph_mode)
|
||||
state = (pcsr & clk->pmc_mask) ? "on" : "off";
|
||||
else if (clk->pmc_mask)
|
||||
state = (sr & clk->pmc_mask) ? "on" : "off";
|
||||
else if (clk == &clk32k || clk == &main_clk)
|
||||
state = "on";
|
||||
else
|
||||
state = "";
|
||||
|
||||
seq_printf(s, "%-10s users=%d %-3s %9ld Hz %s\n",
|
||||
clk->name, clk->users, state, clk_get_rate(clk),
|
||||
clk->parent ? clk->parent->name : "");
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int at91_clk_open(struct inode *inode, struct file *file)
|
||||
{
|
||||
return single_open(file, at91_clk_show, NULL);
|
||||
}
|
||||
|
||||
static struct file_operations at91_clk_operations = {
|
||||
.open = at91_clk_open,
|
||||
.read = seq_read,
|
||||
.llseek = seq_lseek,
|
||||
.release = single_release,
|
||||
};
|
||||
|
||||
static int __init at91_clk_debugfs_init(void)
|
||||
{
|
||||
/* /sys/kernel/debug/at91_clk */
|
||||
(void) debugfs_create_file("at91_clk", S_IFREG | S_IRUGO, NULL, NULL, &at91_clk_operations);
|
||||
|
||||
return 0;
|
||||
}
|
||||
postcore_initcall(at91_clk_debugfs_init);
|
||||
|
||||
#endif
|
||||
|
||||
/*------------------------------------------------------------------------*/
|
||||
|
||||
static u32 __init at91_pll_rate(struct clk *pll, u32 freq, u32 reg)
|
||||
{
|
||||
unsigned mul, div;
|
||||
|
||||
div = reg & 0xff;
|
||||
mul = (reg >> 16) & 0x7ff;
|
||||
if (div && mul) {
|
||||
freq /= div;
|
||||
freq *= mul + 1;
|
||||
} else
|
||||
freq = 0;
|
||||
if (pll == &pllb && (reg & (1 << 28)))
|
||||
freq /= 2;
|
||||
return freq;
|
||||
}
|
||||
|
||||
static unsigned __init at91_pll_calc(unsigned main_freq, unsigned out_freq)
|
||||
{
|
||||
unsigned i, div = 0, mul = 0, diff = 1 << 30;
|
||||
unsigned ret = (out_freq > 155000000) ? 0xbe00 : 0x3e00;
|
||||
|
||||
/* PLL output max 240 MHz (or 180 MHz per errata) */
|
||||
if (out_freq > 240000000)
|
||||
goto fail;
|
||||
|
||||
for (i = 1; i < 256; i++) {
|
||||
int diff1;
|
||||
unsigned input, mul1;
|
||||
|
||||
/*
|
||||
* PLL input between 1MHz and 32MHz per spec, but lower
|
||||
* frequences seem necessary in some cases so allow 100K.
|
||||
*/
|
||||
input = main_freq / i;
|
||||
if (input < 100000)
|
||||
continue;
|
||||
if (input > 32000000)
|
||||
continue;
|
||||
|
||||
mul1 = out_freq / input;
|
||||
if (mul1 > 2048)
|
||||
continue;
|
||||
if (mul1 < 2)
|
||||
goto fail;
|
||||
|
||||
diff1 = out_freq - input * mul1;
|
||||
if (diff1 < 0)
|
||||
diff1 = -diff1;
|
||||
if (diff > diff1) {
|
||||
diff = diff1;
|
||||
div = i;
|
||||
mul = mul1;
|
||||
if (diff == 0)
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (i == 256 && diff > (out_freq >> 5))
|
||||
goto fail;
|
||||
return ret | ((mul - 1) << 16) | div;
|
||||
fail:
|
||||
return 0;
|
||||
}
|
||||
|
||||
int __init at91_clock_init(unsigned long main_clock)
|
||||
{
|
||||
unsigned tmp, freq, mckr;
|
||||
|
||||
spin_lock_init(&clk_lock);
|
||||
|
||||
/*
|
||||
* When the bootloader initialized the main oscillator correctly,
|
||||
* there's no problem using the cycle counter. But if it didn't,
|
||||
* or when using oscillator bypass mode, we must be told the speed
|
||||
* of the main clock.
|
||||
*/
|
||||
if (!main_clock) {
|
||||
do {
|
||||
tmp = at91_sys_read(AT91_CKGR_MCFR);
|
||||
} while (!(tmp & 0x10000));
|
||||
main_clock = (tmp & 0xffff) * (AT91_SLOW_CLOCK / 16);
|
||||
}
|
||||
main_clk.rate_hz = main_clock;
|
||||
|
||||
/* report if PLLA is more than mildly overclocked */
|
||||
plla.rate_hz = at91_pll_rate(&plla, main_clock, at91_sys_read(AT91_CKGR_PLLAR));
|
||||
if (plla.rate_hz > 209000000)
|
||||
pr_info("Clocks: PLLA overclocked, %ld MHz\n", plla.rate_hz / 1000000);
|
||||
|
||||
/*
|
||||
* USB clock init: choose 48 MHz PLLB value, turn all clocks off,
|
||||
* disable 48MHz clock during usb peripheral suspend.
|
||||
*
|
||||
* REVISIT: assumes MCK doesn't derive from PLLB!
|
||||
*/
|
||||
at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) | 0x10000000;
|
||||
pllb.rate_hz = at91_pll_rate(&pllb, main_clock, at91_pllb_usb_init);
|
||||
at91_sys_write(AT91_PMC_PCDR, (1 << AT91_ID_UHP) | (1 << AT91_ID_UDP));
|
||||
at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP | AT91_PMC_UDP);
|
||||
at91_sys_write(AT91_CKGR_PLLBR, 0);
|
||||
at91_sys_write(AT91_PMC_SCER, AT91_PMC_MCKUDP);
|
||||
|
||||
/*
|
||||
* MCK and CPU derive from one of those primary clocks.
|
||||
* For now, assume this parentage won't change.
|
||||
*/
|
||||
mckr = at91_sys_read(AT91_PMC_MCKR);
|
||||
mck.parent = clock_list[mckr & AT91_PMC_CSS];
|
||||
mck.parent->users++;
|
||||
freq = mck.parent->rate_hz;
|
||||
freq /= (1 << ((mckr >> 2) & 3)); /* prescale */
|
||||
mck.rate_hz = freq / (1 + ((mckr >> 8) & 3)); /* mdiv */
|
||||
|
||||
printk("Clocks: CPU %u MHz, master %u MHz, main %u.%03u MHz\n",
|
||||
freq / 1000000, (unsigned) mck.rate_hz / 1000000,
|
||||
(unsigned) main_clock / 1000000,
|
||||
((unsigned) main_clock % 1000000) / 1000);
|
||||
|
||||
/* FIXME get rid of master_clock global */
|
||||
at91_master_clock = mck.rate_hz;
|
||||
|
||||
#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
|
||||
/* establish PCK0..PCK3 parentage */
|
||||
for (tmp = 0; tmp < ARRAY_SIZE(clock_list); tmp++) {
|
||||
struct clk *clk = clock_list[tmp], *parent;
|
||||
u32 pckr;
|
||||
|
||||
if (!clk->programmable)
|
||||
continue;
|
||||
|
||||
pckr = at91_sys_read(AT91_PMC_PCKR(clk->id));
|
||||
parent = clock_list[pckr & 3];
|
||||
clk->parent = parent;
|
||||
clk->rate_hz = parent->rate_hz / (1 << ((pckr >> 2) & 3));
|
||||
}
|
||||
#else
|
||||
/* disable unused clocks */
|
||||
at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK0 | AT91_PMC_PCK1 | AT91_PMC_PCK2 | AT91_PMC_PCK3);
|
||||
#endif /* CONFIG_AT91_PROGRAMMABLE_CLOCKS */
|
||||
|
||||
/* FIXME several unused clocks may still be active... provide
|
||||
* a CONFIG option to turn off all unused clocks at some point
|
||||
* before driver init starts.
|
||||
*/
|
||||
|
||||
return 0;
|
||||
}
|
115
arch/arm/mach-at91rm9200/common.c
Normal file
115
arch/arm/mach-at91rm9200/common.c
Normal file
|
@ -0,0 +1,115 @@
|
|||
/*
|
||||
* arch/arm/mach-at91rm9200/common.c
|
||||
*
|
||||
* Copyright (C) 2005 SAN People
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/config.h>
|
||||
#include <linux/module.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
||||
#include <asm/arch/hardware.h>
|
||||
|
||||
static struct map_desc at91rm9200_io_desc[] __initdata = {
|
||||
{
|
||||
.virtual = AT91_VA_BASE_SYS,
|
||||
.pfn = __phys_to_pfn(AT91_BASE_SYS),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = AT91_VA_BASE_SPI,
|
||||
.pfn = __phys_to_pfn(AT91_BASE_SPI),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = AT91_VA_BASE_SSC2,
|
||||
.pfn = __phys_to_pfn(AT91_BASE_SSC2),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = AT91_VA_BASE_SSC1,
|
||||
.pfn = __phys_to_pfn(AT91_BASE_SSC1),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = AT91_VA_BASE_SSC0,
|
||||
.pfn = __phys_to_pfn(AT91_BASE_SSC0),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = AT91_VA_BASE_US3,
|
||||
.pfn = __phys_to_pfn(AT91_BASE_US3),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = AT91_VA_BASE_US2,
|
||||
.pfn = __phys_to_pfn(AT91_BASE_US2),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = AT91_VA_BASE_US1,
|
||||
.pfn = __phys_to_pfn(AT91_BASE_US1),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = AT91_VA_BASE_US0,
|
||||
.pfn = __phys_to_pfn(AT91_BASE_US0),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = AT91_VA_BASE_EMAC,
|
||||
.pfn = __phys_to_pfn(AT91_BASE_EMAC),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = AT91_VA_BASE_TWI,
|
||||
.pfn = __phys_to_pfn(AT91_BASE_TWI),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = AT91_VA_BASE_MCI,
|
||||
.pfn = __phys_to_pfn(AT91_BASE_MCI),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = AT91_VA_BASE_UDP,
|
||||
.pfn = __phys_to_pfn(AT91_BASE_UDP),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = AT91_VA_BASE_TCB1,
|
||||
.pfn = __phys_to_pfn(AT91_BASE_TCB1),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = AT91_VA_BASE_TCB0,
|
||||
.pfn = __phys_to_pfn(AT91_BASE_TCB0),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
},
|
||||
};
|
||||
|
||||
void __init at91rm9200_map_io(void)
|
||||
{
|
||||
iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
|
||||
}
|
||||
|
||||
|
||||
unsigned long at91_master_clock;
|
||||
|
||||
EXPORT_SYMBOL(at91_master_clock);
|
||||
|
||||
|
||||
int at91_serial_map[AT91_NR_UART];
|
||||
int at91_console_port;
|
||||
|
||||
EXPORT_SYMBOL(at91_serial_map);
|
||||
EXPORT_SYMBOL(at91_console_port);
|
291
arch/arm/mach-at91rm9200/devices.c
Normal file
291
arch/arm/mach-at91rm9200/devices.c
Normal file
|
@ -0,0 +1,291 @@
|
|||
/*
|
||||
* arch/arm/mach-at91rm9200/devices.c
|
||||
*
|
||||
* Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
|
||||
* Copyright (C) 2005 David Brownell
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
*/
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
||||
#include <linux/config.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
#include <asm/arch/board.h>
|
||||
#include <asm/arch/pio.h>
|
||||
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* USB Host
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
|
||||
static u64 ohci_dmamask = 0xffffffffUL;
|
||||
static struct at91_usbh_data usbh_data;
|
||||
|
||||
static struct resource at91rm9200_usbh_resource[] = {
|
||||
[0] = {
|
||||
.start = AT91_UHP_BASE,
|
||||
.end = AT91_UHP_BASE + SZ_1M -1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = AT91_ID_UHP,
|
||||
.end = AT91_ID_UHP,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device at91rm9200_usbh_device = {
|
||||
.name = "at91rm9200-ohci",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.dma_mask = &ohci_dmamask,
|
||||
.coherent_dma_mask = 0xffffffff,
|
||||
.platform_data = &usbh_data,
|
||||
},
|
||||
.resource = at91rm9200_usbh_resource,
|
||||
.num_resources = ARRAY_SIZE(at91rm9200_usbh_resource),
|
||||
};
|
||||
|
||||
void __init at91_add_device_usbh(struct at91_usbh_data *data)
|
||||
{
|
||||
if (!data)
|
||||
return;
|
||||
|
||||
usbh_data = *data;
|
||||
platform_device_register(&at91rm9200_usbh_device);
|
||||
}
|
||||
#else
|
||||
void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
|
||||
#endif
|
||||
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* USB Device (Gadget)
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#ifdef CONFIG_USB_GADGET_AT91
|
||||
static struct at91_udc_data udc_data;
|
||||
|
||||
static struct resource at91_udc_resources[] = {
|
||||
{
|
||||
.start = AT91_BASE_UDP,
|
||||
.end = AT91_BASE_UDP + SZ_16K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
}
|
||||
};
|
||||
|
||||
static struct platform_device at91rm9200_udc_device = {
|
||||
.name = "at91_udc",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &udc_data,
|
||||
},
|
||||
.resource = at91_udc_resources,
|
||||
.num_resources = ARRAY_SIZE(at91_udc_resources),
|
||||
};
|
||||
|
||||
void __init at91_add_device_udc(struct at91_udc_data *data)
|
||||
{
|
||||
if (!data)
|
||||
return;
|
||||
|
||||
if (data->vbus_pin) {
|
||||
at91_set_gpio_input(data->vbus_pin, 0);
|
||||
at91_set_deglitch(data->vbus_pin, 1);
|
||||
}
|
||||
if (data->pullup_pin)
|
||||
at91_set_gpio_output(data->pullup_pin, 0);
|
||||
|
||||
udc_data = *data;
|
||||
platform_device_register(&at91rm9200_udc_device);
|
||||
}
|
||||
#else
|
||||
void __init at91_add_device_udc(struct at91_udc_data *data) {}
|
||||
#endif
|
||||
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* Ethernet
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE)
|
||||
static u64 eth_dmamask = 0xffffffffUL;
|
||||
static struct at91_eth_data eth_data;
|
||||
|
||||
static struct platform_device at91rm9200_eth_device = {
|
||||
.name = "at91_ether",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.dma_mask = ð_dmamask,
|
||||
.coherent_dma_mask = 0xffffffff,
|
||||
.platform_data = ð_data,
|
||||
},
|
||||
.num_resources = 0,
|
||||
};
|
||||
|
||||
void __init at91_add_device_eth(struct at91_eth_data *data)
|
||||
{
|
||||
if (!data)
|
||||
return;
|
||||
|
||||
if (data->phy_irq_pin) {
|
||||
at91_set_gpio_input(data->phy_irq_pin, 0);
|
||||
at91_set_deglitch(data->phy_irq_pin, 1);
|
||||
}
|
||||
|
||||
/* Pins used for MII and RMII */
|
||||
at91_set_A_periph(AT91_PIN_PA16, 0); /* EMDIO */
|
||||
at91_set_A_periph(AT91_PIN_PA15, 0); /* EMDC */
|
||||
at91_set_A_periph(AT91_PIN_PA14, 0); /* ERXER */
|
||||
at91_set_A_periph(AT91_PIN_PA13, 0); /* ERX1 */
|
||||
at91_set_A_periph(AT91_PIN_PA12, 0); /* ERX0 */
|
||||
at91_set_A_periph(AT91_PIN_PA11, 0); /* ECRS_ECRSDV */
|
||||
at91_set_A_periph(AT91_PIN_PA10, 0); /* ETX1 */
|
||||
at91_set_A_periph(AT91_PIN_PA9, 0); /* ETX0 */
|
||||
at91_set_A_periph(AT91_PIN_PA8, 0); /* ETXEN */
|
||||
at91_set_A_periph(AT91_PIN_PA7, 0); /* ETXCK_EREFCK */
|
||||
|
||||
if (!data->is_rmii) {
|
||||
at91_set_B_periph(AT91_PIN_PB19, 0); /* ERXCK */
|
||||
at91_set_B_periph(AT91_PIN_PB18, 0); /* ECOL */
|
||||
at91_set_B_periph(AT91_PIN_PB17, 0); /* ERXDV */
|
||||
at91_set_B_periph(AT91_PIN_PB16, 0); /* ERX3 */
|
||||
at91_set_B_periph(AT91_PIN_PB15, 0); /* ERX2 */
|
||||
at91_set_B_periph(AT91_PIN_PB14, 0); /* ETXER */
|
||||
at91_set_B_periph(AT91_PIN_PB13, 0); /* ETX3 */
|
||||
at91_set_B_periph(AT91_PIN_PB12, 0); /* ETX2 */
|
||||
}
|
||||
|
||||
eth_data = *data;
|
||||
platform_device_register(&at91rm9200_eth_device);
|
||||
}
|
||||
#else
|
||||
void __init at91_add_device_eth(struct at91_eth_data *data) {}
|
||||
#endif
|
||||
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* Compact Flash / PCMCIA
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
|
||||
static struct at91_cf_data cf_data;
|
||||
|
||||
static struct platform_device at91rm9200_cf_device = {
|
||||
.name = "at91_cf",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &cf_data,
|
||||
},
|
||||
.num_resources = 0,
|
||||
};
|
||||
|
||||
void __init at91_add_device_cf(struct at91_cf_data *data)
|
||||
{
|
||||
if (!data)
|
||||
return;
|
||||
|
||||
/* input/irq */
|
||||
if (data->irq_pin) {
|
||||
at91_set_gpio_input(data->irq_pin, 1);
|
||||
at91_set_deglitch(data->irq_pin, 1);
|
||||
}
|
||||
at91_set_gpio_input(data->det_pin, 1);
|
||||
at91_set_deglitch(data->det_pin, 1);
|
||||
|
||||
/* outputs, initially off */
|
||||
if (data->vcc_pin)
|
||||
at91_set_gpio_output(data->vcc_pin, 0);
|
||||
at91_set_gpio_output(data->rst_pin, 0);
|
||||
|
||||
cf_data = *data;
|
||||
platform_device_register(&at91rm9200_cf_device);
|
||||
}
|
||||
#else
|
||||
void __init at91_add_device_cf(struct at91_cf_data *data) {}
|
||||
#endif
|
||||
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* MMC / SD
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#if defined(CONFIG_MMC_AT91RM9200) || defined(CONFIG_MMC_AT91RM9200_MODULE)
|
||||
static u64 mmc_dmamask = 0xffffffffUL;
|
||||
static struct at91_mmc_data mmc_data;
|
||||
|
||||
static struct resource at91_mmc_resources[] = {
|
||||
{
|
||||
.start = AT91_BASE_MCI,
|
||||
.end = AT91_BASE_MCI + SZ_16K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
}
|
||||
};
|
||||
|
||||
static struct platform_device at91rm9200_mmc_device = {
|
||||
.name = "at91rm9200_mci",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.dma_mask = &mmc_dmamask,
|
||||
.coherent_dma_mask = 0xffffffff,
|
||||
.platform_data = &mmc_data,
|
||||
},
|
||||
.resource = at91_mmc_resources,
|
||||
.num_resources = ARRAY_SIZE(at91_mmc_resources),
|
||||
};
|
||||
|
||||
void __init at91_add_device_mmc(struct at91_mmc_data *data)
|
||||
{
|
||||
if (!data)
|
||||
return;
|
||||
|
||||
/* input/irq */
|
||||
if (data->det_pin) {
|
||||
at91_set_gpio_input(data->det_pin, 1);
|
||||
at91_set_deglitch(data->det_pin, 1);
|
||||
}
|
||||
if (data->wp_pin)
|
||||
at91_set_gpio_input(data->wp_pin, 1);
|
||||
|
||||
/* CLK */
|
||||
at91_set_A_periph(AT91_PIN_PA27, 0);
|
||||
|
||||
if (data->is_b) {
|
||||
/* CMD */
|
||||
at91_set_B_periph(AT91_PIN_PA8, 0);
|
||||
|
||||
/* DAT0, maybe DAT1..DAT3 */
|
||||
at91_set_B_periph(AT91_PIN_PA9, 0);
|
||||
if (data->wire4) {
|
||||
at91_set_B_periph(AT91_PIN_PA10, 0);
|
||||
at91_set_B_periph(AT91_PIN_PA11, 0);
|
||||
at91_set_B_periph(AT91_PIN_PA12, 0);
|
||||
}
|
||||
} else {
|
||||
/* CMD */
|
||||
at91_set_A_periph(AT91_PIN_PA28, 0);
|
||||
|
||||
/* DAT0, maybe DAT1..DAT3 */
|
||||
at91_set_A_periph(AT91_PIN_PA29, 0);
|
||||
if (data->wire4) {
|
||||
at91_set_B_periph(AT91_PIN_PB3, 0);
|
||||
at91_set_B_periph(AT91_PIN_PB4, 0);
|
||||
at91_set_B_periph(AT91_PIN_PB5, 0);
|
||||
}
|
||||
}
|
||||
|
||||
mmc_data = *data;
|
||||
platform_device_register(&at91rm9200_mmc_device);
|
||||
}
|
||||
#else
|
||||
void __init at91_add_device_mmc(struct at91_mmc_data *data) {}
|
||||
#endif
|
||||
|
||||
/* -------------------------------------------------------------------- */
|
18
arch/arm/mach-at91rm9200/generic.h
Normal file
18
arch/arm/mach-at91rm9200/generic.h
Normal file
|
@ -0,0 +1,18 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91rm9200/generic.h
|
||||
*
|
||||
* Copyright (C) 2005 David Brownell
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
void at91_gpio_irq_setup(unsigned banks);
|
||||
|
||||
struct sys_timer;
|
||||
extern struct sys_timer at91rm9200_timer;
|
||||
|
||||
extern void __init at91rm9200_map_io(void);
|
||||
|
||||
extern int __init at91_clock_init(unsigned long main_clock);
|
302
arch/arm/mach-at91rm9200/gpio.c
Normal file
302
arch/arm/mach-at91rm9200/gpio.c
Normal file
|
@ -0,0 +1,302 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91rm9200/gpio.c
|
||||
*
|
||||
* Copyright (C) 2005 HP Labs
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/errno.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/list.h>
|
||||
#include <linux/module.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/mach/irq.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <asm/arch/gpio.h>
|
||||
|
||||
static const u32 pio_controller_offset[4] = {
|
||||
AT91_PIOA,
|
||||
AT91_PIOB,
|
||||
AT91_PIOC,
|
||||
AT91_PIOD,
|
||||
};
|
||||
|
||||
static inline void __iomem *pin_to_controller(unsigned pin)
|
||||
{
|
||||
void __iomem *sys_base = (void __iomem *) AT91_VA_BASE_SYS;
|
||||
|
||||
pin -= PIN_BASE;
|
||||
pin /= 32;
|
||||
if (likely(pin < BGA_GPIO_BANKS))
|
||||
return sys_base + pio_controller_offset[pin];
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static inline unsigned pin_to_mask(unsigned pin)
|
||||
{
|
||||
pin -= PIN_BASE;
|
||||
return 1 << (pin % 32);
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------------------------------------------------------*/
|
||||
|
||||
/* Not all hardware capabilities are exposed through these calls; they
|
||||
* only encapsulate the most common features and modes. (So if you
|
||||
* want to change signals in groups, do it directly.)
|
||||
*
|
||||
* Bootloaders will usually handle some of the pin multiplexing setup.
|
||||
* The intent is certainly that by the time Linux is fully booted, all
|
||||
* pins should have been fully initialized. These setup calls should
|
||||
* only be used by board setup routines, or possibly in driver probe().
|
||||
*
|
||||
* For bootloaders doing all that setup, these calls could be inlined
|
||||
* as NOPs so Linux won't duplicate any setup code
|
||||
*/
|
||||
|
||||
|
||||
/*
|
||||
* mux the pin to the "A" internal peripheral role.
|
||||
*/
|
||||
int __init_or_module at91_set_A_periph(unsigned pin, int use_pullup)
|
||||
{
|
||||
void __iomem *pio = pin_to_controller(pin);
|
||||
unsigned mask = pin_to_mask(pin);
|
||||
|
||||
if (!pio)
|
||||
return -EINVAL;
|
||||
|
||||
__raw_writel(mask, pio + PIO_IDR);
|
||||
__raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
|
||||
__raw_writel(mask, pio + PIO_ASR);
|
||||
__raw_writel(mask, pio + PIO_PDR);
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(at91_set_A_periph);
|
||||
|
||||
|
||||
/*
|
||||
* mux the pin to the "B" internal peripheral role.
|
||||
*/
|
||||
int __init_or_module at91_set_B_periph(unsigned pin, int use_pullup)
|
||||
{
|
||||
void __iomem *pio = pin_to_controller(pin);
|
||||
unsigned mask = pin_to_mask(pin);
|
||||
|
||||
if (!pio)
|
||||
return -EINVAL;
|
||||
|
||||
__raw_writel(mask, pio + PIO_IDR);
|
||||
__raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
|
||||
__raw_writel(mask, pio + PIO_BSR);
|
||||
__raw_writel(mask, pio + PIO_PDR);
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(at91_set_B_periph);
|
||||
|
||||
|
||||
/*
|
||||
* mux the pin to the gpio controller (instead of "A" or "B" peripheral), and
|
||||
* configure it for an input.
|
||||
*/
|
||||
int __init_or_module at91_set_gpio_input(unsigned pin, int use_pullup)
|
||||
{
|
||||
void __iomem *pio = pin_to_controller(pin);
|
||||
unsigned mask = pin_to_mask(pin);
|
||||
|
||||
if (!pio)
|
||||
return -EINVAL;
|
||||
|
||||
__raw_writel(mask, pio + PIO_IDR);
|
||||
__raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
|
||||
__raw_writel(mask, pio + PIO_ODR);
|
||||
__raw_writel(mask, pio + PIO_PER);
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(at91_set_gpio_input);
|
||||
|
||||
|
||||
/*
|
||||
* mux the pin to the gpio controller (instead of "A" or "B" peripheral),
|
||||
* and configure it for an output.
|
||||
*/
|
||||
int __init_or_module at91_set_gpio_output(unsigned pin, int value)
|
||||
{
|
||||
void __iomem *pio = pin_to_controller(pin);
|
||||
unsigned mask = pin_to_mask(pin);
|
||||
|
||||
if (!pio)
|
||||
return -EINVAL;
|
||||
|
||||
__raw_writel(mask, pio + PIO_IDR);
|
||||
__raw_writel(mask, pio + PIO_PUDR);
|
||||
__raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
|
||||
__raw_writel(mask, pio + PIO_OER);
|
||||
__raw_writel(mask, pio + PIO_PER);
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(at91_set_gpio_output);
|
||||
|
||||
|
||||
/*
|
||||
* enable/disable the glitch filter; mostly used with IRQ handling.
|
||||
*/
|
||||
int __init_or_module at91_set_deglitch(unsigned pin, int is_on)
|
||||
{
|
||||
void __iomem *pio = pin_to_controller(pin);
|
||||
unsigned mask = pin_to_mask(pin);
|
||||
|
||||
if (!pio)
|
||||
return -EINVAL;
|
||||
__raw_writel(mask, pio + (is_on ? PIO_IFER : PIO_IFDR));
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(at91_set_deglitch);
|
||||
|
||||
/*--------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
/*
|
||||
* assuming the pin is muxed as a gpio output, set its value.
|
||||
*/
|
||||
int at91_set_gpio_value(unsigned pin, int value)
|
||||
{
|
||||
void __iomem *pio = pin_to_controller(pin);
|
||||
unsigned mask = pin_to_mask(pin);
|
||||
|
||||
if (!pio)
|
||||
return -EINVAL;
|
||||
__raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(at91_set_gpio_value);
|
||||
|
||||
|
||||
/*
|
||||
* read the pin's value (works even if it's not muxed as a gpio).
|
||||
*/
|
||||
int at91_get_gpio_value(unsigned pin)
|
||||
{
|
||||
void __iomem *pio = pin_to_controller(pin);
|
||||
unsigned mask = pin_to_mask(pin);
|
||||
u32 pdsr;
|
||||
|
||||
if (!pio)
|
||||
return -EINVAL;
|
||||
pdsr = __raw_readl(pio + PIO_PDSR);
|
||||
return (pdsr & mask) != 0;
|
||||
}
|
||||
EXPORT_SYMBOL(at91_get_gpio_value);
|
||||
|
||||
/*--------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
/* Several AIC controller irqs are dispatched through this GPIO handler.
|
||||
* To use any AT91_PIN_* as an externally triggered IRQ, first call
|
||||
* at91_set_gpio_input() then maybe enable its glitch filter.
|
||||
* Then just request_irq() with the pin ID; it works like any ARM IRQ
|
||||
* handler, though it always triggers on rising and falling edges.
|
||||
*
|
||||
* Alternatively, certain pins may be used directly as IRQ0..IRQ6 after
|
||||
* configuring them with at91_set_a_periph() or at91_set_b_periph().
|
||||
* IRQ0..IRQ6 should be configurable, e.g. level vs edge triggering.
|
||||
*/
|
||||
|
||||
static void gpio_irq_mask(unsigned pin)
|
||||
{
|
||||
void __iomem *pio = pin_to_controller(pin);
|
||||
unsigned mask = pin_to_mask(pin);
|
||||
|
||||
if (pio)
|
||||
__raw_writel(mask, pio + PIO_IDR);
|
||||
}
|
||||
|
||||
static void gpio_irq_unmask(unsigned pin)
|
||||
{
|
||||
void __iomem *pio = pin_to_controller(pin);
|
||||
unsigned mask = pin_to_mask(pin);
|
||||
|
||||
if (pio)
|
||||
__raw_writel(mask, pio + PIO_IER);
|
||||
}
|
||||
|
||||
static int gpio_irq_type(unsigned pin, unsigned type)
|
||||
{
|
||||
return (type == IRQT_BOTHEDGE) ? 0 : -EINVAL;
|
||||
}
|
||||
|
||||
static struct irqchip gpio_irqchip = {
|
||||
.mask = gpio_irq_mask,
|
||||
.unmask = gpio_irq_unmask,
|
||||
.set_type = gpio_irq_type,
|
||||
};
|
||||
|
||||
static void gpio_irq_handler(unsigned irq, struct irqdesc *desc, struct pt_regs *regs)
|
||||
{
|
||||
unsigned pin;
|
||||
struct irqdesc *gpio;
|
||||
void __iomem *pio;
|
||||
u32 isr;
|
||||
|
||||
pio = (void __force __iomem *) desc->chipdata;
|
||||
|
||||
/* temporarily mask (level sensitive) parent IRQ */
|
||||
desc->chip->ack(irq);
|
||||
for (;;) {
|
||||
isr = __raw_readl(pio + PIO_ISR) & __raw_readl(pio + PIO_IMR);
|
||||
if (!isr)
|
||||
break;
|
||||
|
||||
pin = (unsigned) desc->data;
|
||||
gpio = &irq_desc[pin];
|
||||
|
||||
while (isr) {
|
||||
if (isr & 1)
|
||||
gpio->handle(pin, gpio, regs);
|
||||
pin++;
|
||||
gpio++;
|
||||
isr >>= 1;
|
||||
}
|
||||
}
|
||||
desc->chip->unmask(irq);
|
||||
/* now it may re-trigger */
|
||||
}
|
||||
|
||||
/* call this from board-specific init_irq */
|
||||
void __init at91_gpio_irq_setup(unsigned banks)
|
||||
{
|
||||
unsigned pioc, pin, id;
|
||||
|
||||
if (banks > 4)
|
||||
banks = 4;
|
||||
for (pioc = 0, pin = PIN_BASE, id = AT91_ID_PIOA;
|
||||
pioc < banks;
|
||||
pioc++, id++) {
|
||||
void __iomem *controller;
|
||||
unsigned i;
|
||||
|
||||
controller = (void __iomem *) AT91_VA_BASE_SYS + pio_controller_offset[pioc];
|
||||
__raw_writel(~0, controller + PIO_IDR);
|
||||
|
||||
set_irq_data(id, (void *) pin);
|
||||
set_irq_chipdata(id, (void __force *) controller);
|
||||
|
||||
for (i = 0; i < 32; i++, pin++) {
|
||||
set_irq_chip(pin, &gpio_irqchip);
|
||||
set_irq_handler(pin, do_simple_IRQ);
|
||||
set_irq_flags(pin, IRQF_VALID);
|
||||
}
|
||||
|
||||
set_irq_chained_handler(id, gpio_irq_handler);
|
||||
|
||||
/* enable the PIO peripheral clock */
|
||||
at91_sys_write(AT91_PMC_PCER, 1 << id);
|
||||
}
|
||||
pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, banks);
|
||||
}
|
170
arch/arm/mach-at91rm9200/irq.c
Normal file
170
arch/arm/mach-at91rm9200/irq.c
Normal file
|
@ -0,0 +1,170 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91rm9200/irq.c
|
||||
*
|
||||
* Copyright (C) 2004 SAN People
|
||||
* Copyright (C) 2004 ATMEL
|
||||
* Copyright (C) Rick Bronson
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/config.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/setup.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/irq.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
||||
#include "generic.h"
|
||||
|
||||
/*
|
||||
* The default interrupt priority levels (0 = lowest, 7 = highest).
|
||||
*/
|
||||
static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
|
||||
7, /* Advanced Interrupt Controller */
|
||||
7, /* System Peripheral */
|
||||
0, /* Parallel IO Controller A */
|
||||
0, /* Parallel IO Controller B */
|
||||
0, /* Parallel IO Controller C */
|
||||
0, /* Parallel IO Controller D */
|
||||
6, /* USART 0 */
|
||||
6, /* USART 1 */
|
||||
6, /* USART 2 */
|
||||
6, /* USART 3 */
|
||||
0, /* Multimedia Card Interface */
|
||||
4, /* USB Device Port */
|
||||
0, /* Two-Wire Interface */
|
||||
6, /* Serial Peripheral Interface */
|
||||
5, /* Serial Synchronous Controller */
|
||||
5, /* Serial Synchronous Controller */
|
||||
5, /* Serial Synchronous Controller */
|
||||
0, /* Timer Counter 0 */
|
||||
0, /* Timer Counter 1 */
|
||||
0, /* Timer Counter 2 */
|
||||
0, /* Timer Counter 3 */
|
||||
0, /* Timer Counter 4 */
|
||||
0, /* Timer Counter 5 */
|
||||
3, /* USB Host port */
|
||||
3, /* Ethernet MAC */
|
||||
0, /* Advanced Interrupt Controller */
|
||||
0, /* Advanced Interrupt Controller */
|
||||
0, /* Advanced Interrupt Controller */
|
||||
0, /* Advanced Interrupt Controller */
|
||||
0, /* Advanced Interrupt Controller */
|
||||
0, /* Advanced Interrupt Controller */
|
||||
0 /* Advanced Interrupt Controller */
|
||||
};
|
||||
|
||||
|
||||
static void at91rm9200_mask_irq(unsigned int irq)
|
||||
{
|
||||
/* Disable interrupt on AIC */
|
||||
at91_sys_write(AT91_AIC_IDCR, 1 << irq);
|
||||
}
|
||||
|
||||
static void at91rm9200_unmask_irq(unsigned int irq)
|
||||
{
|
||||
/* Enable interrupt on AIC */
|
||||
at91_sys_write(AT91_AIC_IECR, 1 << irq);
|
||||
}
|
||||
|
||||
static int at91rm9200_irq_type(unsigned irq, unsigned type)
|
||||
{
|
||||
unsigned int smr, srctype;
|
||||
|
||||
/* change triggering only for FIQ and external IRQ0..IRQ6 */
|
||||
if ((irq < AT91_ID_IRQ0) && (irq != AT91_ID_FIQ))
|
||||
return -EINVAL;
|
||||
|
||||
switch (type) {
|
||||
case IRQT_HIGH:
|
||||
srctype = AT91_AIC_SRCTYPE_HIGH;
|
||||
break;
|
||||
case IRQT_RISING:
|
||||
srctype = AT91_AIC_SRCTYPE_RISING;
|
||||
break;
|
||||
case IRQT_LOW:
|
||||
srctype = AT91_AIC_SRCTYPE_LOW;
|
||||
break;
|
||||
case IRQT_FALLING:
|
||||
srctype = AT91_AIC_SRCTYPE_FALLING;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
smr = at91_sys_read(AT91_AIC_SMR(irq)) & ~AT91_AIC_SRCTYPE;
|
||||
at91_sys_write(AT91_AIC_SMR(irq), smr | srctype);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct irqchip at91rm9200_irq_chip = {
|
||||
.ack = at91rm9200_mask_irq,
|
||||
.mask = at91rm9200_mask_irq,
|
||||
.unmask = at91rm9200_unmask_irq,
|
||||
.set_type = at91rm9200_irq_type,
|
||||
};
|
||||
|
||||
/*
|
||||
* Initialize the AIC interrupt controller.
|
||||
*/
|
||||
void __init at91rm9200_init_irq(unsigned int priority[NR_AIC_IRQS])
|
||||
{
|
||||
unsigned int i;
|
||||
|
||||
/* No priority list specified for this board -> use defaults */
|
||||
if (priority == NULL)
|
||||
priority = at91rm9200_default_irq_priority;
|
||||
|
||||
/*
|
||||
* The IVR is used by macro get_irqnr_and_base to read and verify.
|
||||
* The irq number is NR_AIC_IRQS when a spurious interrupt has occurred.
|
||||
*/
|
||||
for (i = 0; i < NR_AIC_IRQS; i++) {
|
||||
/* Put irq number in Source Vector Register: */
|
||||
at91_sys_write(AT91_AIC_SVR(i), i);
|
||||
/* Store the Source Mode Register as defined in table above */
|
||||
at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
|
||||
|
||||
set_irq_chip(i, &at91rm9200_irq_chip);
|
||||
set_irq_handler(i, do_level_IRQ);
|
||||
set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
|
||||
|
||||
/* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */
|
||||
if (i < 8)
|
||||
at91_sys_write(AT91_AIC_EOICR, 0);
|
||||
}
|
||||
|
||||
/*
|
||||
* Spurious Interrupt ID in Spurious Vector Register is NR_AIC_IRQS
|
||||
* When there is no current interrupt, the IRQ Vector Register reads the value stored in AIC_SPU
|
||||
*/
|
||||
at91_sys_write(AT91_AIC_SPU, NR_AIC_IRQS);
|
||||
|
||||
/* No debugging in AIC: Debug (Protect) Control Register */
|
||||
at91_sys_write(AT91_AIC_DCR, 0);
|
||||
|
||||
/* Disable and clear all interrupts initially */
|
||||
at91_sys_write(AT91_AIC_IDCR, 0xFFFFFFFF);
|
||||
at91_sys_write(AT91_AIC_ICCR, 0xFFFFFFFF);
|
||||
}
|
127
arch/arm/mach-at91rm9200/time.c
Normal file
127
arch/arm/mach-at91rm9200/time.c
Normal file
|
@ -0,0 +1,127 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91rm9200/time.c
|
||||
*
|
||||
* Copyright (C) 2003 SAN People
|
||||
* Copyright (C) 2003 ATMEL
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/config.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/time.h>
|
||||
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach/time.h>
|
||||
|
||||
/*
|
||||
* The ST_CRTR is updated asynchronously to the master clock. It is therefore
|
||||
* necessary to read it twice (with the same value) to ensure accuracy.
|
||||
*/
|
||||
static inline unsigned long read_CRTR(void) {
|
||||
unsigned long x1, x2;
|
||||
|
||||
do {
|
||||
x1 = at91_sys_read(AT91_ST_CRTR);
|
||||
x2 = at91_sys_read(AT91_ST_CRTR);
|
||||
} while (x1 != x2);
|
||||
|
||||
return x1;
|
||||
}
|
||||
|
||||
/*
|
||||
* Returns number of microseconds since last timer interrupt. Note that interrupts
|
||||
* will have been disabled by do_gettimeofday()
|
||||
* 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.
|
||||
* 'tick' is usecs per jiffy (linux/timex.h).
|
||||
*/
|
||||
static unsigned long at91rm9200_gettimeoffset(void)
|
||||
{
|
||||
unsigned long elapsed;
|
||||
|
||||
elapsed = (read_CRTR() - at91_sys_read(AT91_ST_RTAR)) & AT91_ST_ALMV;
|
||||
|
||||
return (unsigned long)(elapsed * (tick_nsec / 1000)) / LATCH;
|
||||
}
|
||||
|
||||
/*
|
||||
* IRQ handler for the timer.
|
||||
*/
|
||||
static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
|
||||
{
|
||||
unsigned long rtar;
|
||||
|
||||
if (at91_sys_read(AT91_ST_SR) & AT91_ST_PITS) { /* This is a shared interrupt */
|
||||
write_seqlock(&xtime_lock);
|
||||
|
||||
do {
|
||||
timer_tick(regs);
|
||||
rtar = (at91_sys_read(AT91_ST_RTAR) + LATCH) & AT91_ST_ALMV;
|
||||
at91_sys_write(AT91_ST_RTAR, rtar);
|
||||
} while (((read_CRTR() - at91_sys_read(AT91_ST_RTAR)) & AT91_ST_ALMV) >= LATCH);
|
||||
|
||||
write_sequnlock(&xtime_lock);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
else
|
||||
return IRQ_NONE; /* not handled */
|
||||
}
|
||||
|
||||
static struct irqaction at91rm9200_timer_irq = {
|
||||
.name = "at91_tick",
|
||||
.flags = SA_SHIRQ | SA_INTERRUPT,
|
||||
.handler = at91rm9200_timer_interrupt
|
||||
};
|
||||
|
||||
/*
|
||||
* Set up timer interrupt.
|
||||
*/
|
||||
void __init at91rm9200_timer_init(void)
|
||||
{
|
||||
/* Disable all timer interrupts */
|
||||
at91_sys_write(AT91_ST_IDR, AT91_ST_PITS | AT91_ST_WDOVF | AT91_ST_RTTINC | AT91_ST_ALMS);
|
||||
(void) at91_sys_read(AT91_ST_SR); /* Clear any pending interrupts */
|
||||
|
||||
/*
|
||||
* Make IRQs happen for the system timer.
|
||||
*/
|
||||
setup_irq(AT91_ID_SYS, &at91rm9200_timer_irq);
|
||||
|
||||
/* Set initial alarm to 0 */
|
||||
at91_sys_write(AT91_ST_RTAR, 0);
|
||||
|
||||
/* Real time counter incremented every 30.51758 microseconds */
|
||||
at91_sys_write(AT91_ST_RTMR, 1);
|
||||
|
||||
/* Set Period Interval timer */
|
||||
at91_sys_write(AT91_ST_PIMR, LATCH);
|
||||
|
||||
/* Change the kernel's 'tick' value to 10009 usec. (the default is 10000) */
|
||||
tick_usec = (LATCH * 1000000) / CLOCK_TICK_RATE;
|
||||
|
||||
/* Enable Period Interval Timer interrupt */
|
||||
at91_sys_write(AT91_ST_IER, AT91_ST_PITS);
|
||||
}
|
||||
|
||||
struct sys_timer at91rm9200_timer = {
|
||||
.init = at91rm9200_timer_init,
|
||||
.offset = at91rm9200_gettimeoffset,
|
||||
};
|
|
@ -1,23 +0,0 @@
|
|||
if ARCH_CAMELOT
|
||||
|
||||
menu "Epxa10db"
|
||||
|
||||
comment "PLD hotswap support"
|
||||
|
||||
config PLD
|
||||
bool
|
||||
default y
|
||||
|
||||
config PLD_HOTSWAP
|
||||
bool "Support for PLD device hotplugging (experimental)"
|
||||
depends on EXPERIMENTAL
|
||||
help
|
||||
This enables support for the dynamic loading and configuration of
|
||||
compatible drivers when the contents of the PLD are changed. This
|
||||
is still experimental and requires configuration tools which are
|
||||
not yet generally available. Say N here. You must enable the kernel
|
||||
module loader for this feature to work.
|
||||
|
||||
endmenu
|
||||
|
||||
endif
|
|
@ -1,11 +0,0 @@
|
|||
#
|
||||
# Makefile for the linux kernel.
|
||||
#
|
||||
|
||||
# Object file lists.
|
||||
|
||||
obj-y := arch.o irq.o mm.o time.o
|
||||
obj-m :=
|
||||
obj-n :=
|
||||
obj- :=
|
||||
|
|
@ -1,2 +0,0 @@
|
|||
zreladdr-y := 0x00008000
|
||||
|
|
@ -1,74 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-epxa10db/arch.c
|
||||
*
|
||||
* Copyright (C) 2000 Deep Blue Solutions Ltd
|
||||
* Copyright (C) 2001 Altera Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
#include <linux/types.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/serial_8250.h>
|
||||
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/setup.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
|
||||
static struct plat_serial8250_port serial_platform_data[] = {
|
||||
{
|
||||
.iobase = 0x3f8,
|
||||
.irq = IRQ_UARTINT0,
|
||||
#error FIXME
|
||||
.uartclk = 0,
|
||||
.regshift = 0,
|
||||
.iotype = UPIO_PORT,
|
||||
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
|
||||
},
|
||||
{
|
||||
.iobase = 0x2f8,
|
||||
.irq = IRQ_UARTINT1,
|
||||
#error FIXME
|
||||
.uartclk = 0,
|
||||
.regshift = 0,
|
||||
.iotype = UPIO_PORT,
|
||||
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
|
||||
},
|
||||
{ },
|
||||
};
|
||||
|
||||
static struct platform_device serial_device = {
|
||||
.name = "serial8250",
|
||||
.id = PLAT8250_DEV_PLATFORM,
|
||||
.dev = {
|
||||
.platform_data = serial_platform_data,
|
||||
},
|
||||
};
|
||||
|
||||
extern void epxa10db_map_io(void);
|
||||
extern void epxa10db_init_irq(void);
|
||||
extern struct sys_timer epxa10db_timer;
|
||||
|
||||
MACHINE_START(CAMELOT, "Altera Epxa10db")
|
||||
/* Maintainer: Altera Corporation */
|
||||
.phys_ram = 0x00000000,
|
||||
.phys_io = 0x7fffc000,
|
||||
.io_pg_offst = ((0xffffc000) >> 18) & 0xfffc,
|
||||
.map_io = epxa10db_map_io,
|
||||
.init_irq = epxa10db_init_irq,
|
||||
.timer = &epxa10db_timer,
|
||||
MACHINE_END
|
||||
|
|
@ -1,82 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-epxa10db/irq.c
|
||||
*
|
||||
* Copyright (C) 2001 Altera Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/stddef.h>
|
||||
#include <linux/timer.h>
|
||||
#include <linux/list.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach/irq.h>
|
||||
#include <asm/arch/platform.h>
|
||||
#include <asm/arch/int_ctrl00.h>
|
||||
|
||||
|
||||
static void epxa_mask_irq(unsigned int irq)
|
||||
{
|
||||
writel(1 << irq, INT_MC(IO_ADDRESS(EXC_INT_CTRL00_BASE)));
|
||||
}
|
||||
|
||||
static void epxa_unmask_irq(unsigned int irq)
|
||||
{
|
||||
writel(1 << irq, INT_MS(IO_ADDRESS(EXC_INT_CTRL00_BASE)));
|
||||
}
|
||||
|
||||
|
||||
static struct irqchip epxa_irq_chip = {
|
||||
.ack = epxa_mask_irq,
|
||||
.mask = epxa_mask_irq,
|
||||
.unmask = epxa_unmask_irq,
|
||||
};
|
||||
|
||||
static struct resource irq_resource = {
|
||||
.name = "irq_handler",
|
||||
.start = IO_ADDRESS(EXC_INT_CTRL00_BASE),
|
||||
.end = IO_ADDRESS(INT_PRIORITY_FC(EXC_INT_CTRL00_BASE))+4,
|
||||
};
|
||||
|
||||
void __init epxa10db_init_irq(void)
|
||||
{
|
||||
unsigned int i;
|
||||
|
||||
request_resource(&iomem_resource, &irq_resource);
|
||||
|
||||
/*
|
||||
* This bit sets up the interrupt controller using
|
||||
* the 6 PLD interrupts mode (the default) each
|
||||
* irqs is assigned a priority which is the same
|
||||
* as its interrupt number. This scheme is used because
|
||||
* its easy, but you may want to change it depending
|
||||
* on the contents of your PLD
|
||||
*/
|
||||
|
||||
writel(3,INT_MODE(IO_ADDRESS(EXC_INT_CTRL00_BASE)));
|
||||
for (i = 0; i < NR_IRQS; i++){
|
||||
writel(i+1, INT_PRIORITY_P0(IO_ADDRESS(EXC_INT_CTRL00_BASE)) + (4*i));
|
||||
set_irq_chip(i,&epxa_irq_chip);
|
||||
set_irq_handler(i,do_level_IRQ);
|
||||
set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
|
||||
}
|
||||
|
||||
/* Disable all interrupts */
|
||||
writel(-1,INT_MC(IO_ADDRESS(EXC_INT_CTRL00_BASE)));
|
||||
|
||||
}
|
|
@ -1,71 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-epxa10db/mm.c
|
||||
*
|
||||
* MM routines for Altera'a Epxa10db board
|
||||
*
|
||||
* Copyright (C) 2001 Altera Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/sizes.h>
|
||||
#include <asm/page.h>
|
||||
|
||||
#include <asm/mach/map.h>
|
||||
|
||||
/* Page table mapping for I/O region */
|
||||
|
||||
static struct map_desc epxa10db_io_desc[] __initdata = {
|
||||
{
|
||||
.virtual = IO_ADDRESS(EXC_REGISTERS_BASE),
|
||||
.pfn = __phys_to_pfn(EXC_REGISTERS_BASE),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE
|
||||
}, {
|
||||
.virtual = IO_ADDRESS(EXC_PLD_BLOCK0_BASE),
|
||||
.pfn = __phys_to_pfn(EXC_PLD_BLOCK0_BASE),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE
|
||||
}, {
|
||||
.virtual = IO_ADDRESS(EXC_PLD_BLOCK1_BASE),
|
||||
.pfn =__phys_to_pfn(EXC_PLD_BLOCK1_BASE),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE
|
||||
}, {
|
||||
.virtual = IO_ADDRESS(EXC_PLD_BLOCK2_BASE),
|
||||
.physical = __phys_to_pfn(EXC_PLD_BLOCK2_BASE),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE
|
||||
}, {
|
||||
.virtual = IO_ADDRESS(EXC_PLD_BLOCK3_BASE),
|
||||
.pfn = __phys_to_pfn(EXC_PLD_BLOCK3_BASE),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE
|
||||
}, {
|
||||
.virtual = FLASH_VADDR(EXC_EBI_BLOCK0_BASE),
|
||||
.pfn = __phys_to_pfn(EXC_EBI_BLOCK0_BASE),
|
||||
.length = SZ_16M,
|
||||
.type = MT_DEVICE
|
||||
}
|
||||
};
|
||||
|
||||
void __init epxa10db_map_io(void)
|
||||
{
|
||||
iotable_init(epxa10db_io_desc, ARRAY_SIZE(epxa10db_io_desc));
|
||||
}
|
|
@ -1,78 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-epxa10db/time.c
|
||||
*
|
||||
* Copyright (C) 2000 Deep Blue Solutions
|
||||
* Copyright (C) 2001 Altera Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/sched.h>
|
||||
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/system.h>
|
||||
#include <asm/leds.h>
|
||||
|
||||
#include <asm/mach/time.h>
|
||||
|
||||
#define TIMER00_TYPE (volatile unsigned int*)
|
||||
#include <asm/arch/timer00.h>
|
||||
|
||||
static int epxa10db_set_rtc(void)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int epxa10db_rtc_init(void)
|
||||
{
|
||||
set_rtc = epxa10db_set_rtc;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
__initcall(epxa10db_rtc_init);
|
||||
|
||||
|
||||
/*
|
||||
* IRQ handler for the timer
|
||||
*/
|
||||
static irqreturn_t
|
||||
epxa10db_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
|
||||
{
|
||||
write_seqlock(&xtime_lock);
|
||||
|
||||
// ...clear the interrupt
|
||||
*TIMER0_CR(IO_ADDRESS(EXC_TIMER00_BASE))|=TIMER0_CR_CI_MSK;
|
||||
|
||||
timer_tick(regs);
|
||||
write_sequnlock(&xtime_lock);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static struct irqaction epxa10db_timer_irq = {
|
||||
.name = "Excalibur Timer Tick",
|
||||
.flags = SA_INTERRUPT | SA_TIMER,
|
||||
.handler = epxa10db_timer_interrupt,
|
||||
};
|
||||
|
||||
/*
|
||||
* Set up timer interrupt, and return the current time in seconds.
|
||||
*/
|
||||
static void __init epxa10db_timer_init(void)
|
||||
{
|
||||
/* Start the timer */
|
||||
*TIMER0_LIMIT(IO_ADDRESS(EXC_TIMER00_BASE))=(unsigned int)(EXC_AHB2_CLK_FREQUENCY/200);
|
||||
*TIMER0_PRESCALE(IO_ADDRESS(EXC_TIMER00_BASE))=1;
|
||||
*TIMER0_CR(IO_ADDRESS(EXC_TIMER00_BASE))=TIMER0_CR_IE_MSK | TIMER0_CR_S_MSK;
|
||||
|
||||
setup_irq(IRQ_TIMER0, &epxa10db_timer_irq);
|
||||
}
|
||||
|
||||
struct sys_timer epxa10db_timer = {
|
||||
.init = epxa10db_timer_init,
|
||||
};
|
|
@ -253,100 +253,101 @@ struct clk s3c24xx_uclk = {
|
|||
/* clock definitions */
|
||||
|
||||
static struct clk init_clocks[] = {
|
||||
{ .name = "nand",
|
||||
.id = -1,
|
||||
.parent = &clk_h,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_NAND
|
||||
},
|
||||
{ .name = "lcd",
|
||||
.id = -1,
|
||||
.parent = &clk_h,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_LCDC
|
||||
},
|
||||
{ .name = "usb-host",
|
||||
.id = -1,
|
||||
.parent = &clk_h,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_USBH
|
||||
},
|
||||
{ .name = "usb-device",
|
||||
.id = -1,
|
||||
.parent = &clk_h,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_USBD
|
||||
},
|
||||
{ .name = "timers",
|
||||
.id = -1,
|
||||
.parent = &clk_p,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_PWMT
|
||||
},
|
||||
{ .name = "sdi",
|
||||
.id = -1,
|
||||
.parent = &clk_p,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_SDI
|
||||
},
|
||||
{ .name = "uart",
|
||||
.id = 0,
|
||||
.parent = &clk_p,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_UART0
|
||||
},
|
||||
{ .name = "uart",
|
||||
.id = 1,
|
||||
.parent = &clk_p,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_UART1
|
||||
},
|
||||
{ .name = "uart",
|
||||
.id = 2,
|
||||
.parent = &clk_p,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_UART2
|
||||
},
|
||||
{ .name = "gpio",
|
||||
.id = -1,
|
||||
.parent = &clk_p,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_GPIO
|
||||
},
|
||||
{ .name = "rtc",
|
||||
.id = -1,
|
||||
.parent = &clk_p,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_RTC
|
||||
},
|
||||
{ .name = "adc",
|
||||
.id = -1,
|
||||
.parent = &clk_p,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_ADC
|
||||
},
|
||||
{ .name = "i2c",
|
||||
.id = -1,
|
||||
.parent = &clk_p,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_IIC
|
||||
},
|
||||
{ .name = "iis",
|
||||
.id = -1,
|
||||
.parent = &clk_p,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_IIS
|
||||
},
|
||||
{ .name = "spi",
|
||||
.id = -1,
|
||||
.parent = &clk_p,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_SPI
|
||||
},
|
||||
{ .name = "watchdog",
|
||||
.id = -1,
|
||||
.parent = &clk_p,
|
||||
.ctrlbit = 0
|
||||
{
|
||||
.name = "nand",
|
||||
.id = -1,
|
||||
.parent = &clk_h,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_NAND,
|
||||
}, {
|
||||
.name = "lcd",
|
||||
.id = -1,
|
||||
.parent = &clk_h,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_LCDC,
|
||||
}, {
|
||||
.name = "usb-host",
|
||||
.id = -1,
|
||||
.parent = &clk_h,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_USBH,
|
||||
}, {
|
||||
.name = "usb-device",
|
||||
.id = -1,
|
||||
.parent = &clk_h,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_USBD,
|
||||
}, {
|
||||
.name = "timers",
|
||||
.id = -1,
|
||||
.parent = &clk_p,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_PWMT,
|
||||
}, {
|
||||
.name = "sdi",
|
||||
.id = -1,
|
||||
.parent = &clk_p,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_SDI,
|
||||
}, {
|
||||
.name = "uart",
|
||||
.id = 0,
|
||||
.parent = &clk_p,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_UART0,
|
||||
}, {
|
||||
.name = "uart",
|
||||
.id = 1,
|
||||
.parent = &clk_p,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_UART1,
|
||||
}, {
|
||||
.name = "uart",
|
||||
.id = 2,
|
||||
.parent = &clk_p,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_UART2,
|
||||
}, {
|
||||
.name = "gpio",
|
||||
.id = -1,
|
||||
.parent = &clk_p,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_GPIO,
|
||||
}, {
|
||||
.name = "rtc",
|
||||
.id = -1,
|
||||
.parent = &clk_p,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_RTC,
|
||||
}, {
|
||||
.name = "adc",
|
||||
.id = -1,
|
||||
.parent = &clk_p,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_ADC,
|
||||
}, {
|
||||
.name = "i2c",
|
||||
.id = -1,
|
||||
.parent = &clk_p,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_IIC,
|
||||
}, {
|
||||
.name = "iis",
|
||||
.id = -1,
|
||||
.parent = &clk_p,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_IIS,
|
||||
}, {
|
||||
.name = "spi",
|
||||
.id = -1,
|
||||
.parent = &clk_p,
|
||||
.enable = s3c24xx_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_SPI,
|
||||
}, {
|
||||
.name = "watchdog",
|
||||
.id = -1,
|
||||
.parent = &clk_p,
|
||||
.ctrlbit = 0,
|
||||
}
|
||||
};
|
||||
|
||||
|
@ -390,16 +391,15 @@ int __init s3c24xx_setup_clocks(unsigned long xtal,
|
|||
clk_p.rate = pclk;
|
||||
clk_f.rate = fclk;
|
||||
|
||||
/* it looks like just setting the register here is not good
|
||||
* enough, and causes the odd hang at initial boot time, so
|
||||
* do all of them indivdually.
|
||||
/* We must be careful disabling the clocks we are not intending to
|
||||
* be using at boot time, as subsytems such as the LCD which do
|
||||
* their own DMA requests to the bus can cause the system to lockup
|
||||
* if they where in the middle of requesting bus access.
|
||||
*
|
||||
* I think disabling the LCD clock if the LCD is active is
|
||||
* very dangerous, and therefore the bootloader should be
|
||||
* careful to not enable the LCD clock if it is not needed.
|
||||
*
|
||||
* and of course, this looks neater
|
||||
*/
|
||||
* Disabling the LCD clock if the LCD is active is very dangerous,
|
||||
* and therefore the bootloader should be careful to not enable
|
||||
* the LCD clock if it is not needed.
|
||||
*/
|
||||
|
||||
s3c24xx_clk_enable(S3C2410_CLKCON_NAND, 0);
|
||||
s3c24xx_clk_enable(S3C2410_CLKCON_USBH, 0);
|
||||
|
|
|
@ -62,8 +62,8 @@ config CPU_ARM720T
|
|||
# ARM920T
|
||||
config CPU_ARM920T
|
||||
bool "Support ARM920T processor" if !ARCH_S3C2410
|
||||
depends on ARCH_INTEGRATOR || ARCH_S3C2410 || ARCH_IMX || ARCH_AAEC2000
|
||||
default y if ARCH_S3C2410
|
||||
depends on ARCH_INTEGRATOR || ARCH_S3C2410 || ARCH_IMX || ARCH_AAEC2000 || ARCH_AT91RM9200
|
||||
default y if ARCH_S3C2410 || ARCH_AT91RM9200
|
||||
select CPU_32v4
|
||||
select CPU_ABRT_EV4T
|
||||
select CPU_CACHE_V4WT
|
||||
|
@ -83,8 +83,8 @@ config CPU_ARM920T
|
|||
# ARM922T
|
||||
config CPU_ARM922T
|
||||
bool "Support ARM922T processor" if ARCH_INTEGRATOR
|
||||
depends on ARCH_CAMELOT || ARCH_LH7A40X || ARCH_INTEGRATOR
|
||||
default y if ARCH_CAMELOT || ARCH_LH7A40X
|
||||
depends on ARCH_LH7A40X || ARCH_INTEGRATOR
|
||||
default y if ARCH_LH7A40X
|
||||
select CPU_32v4
|
||||
select CPU_ABRT_EV4T
|
||||
select CPU_CACHE_V4WT
|
||||
|
|
|
@ -86,11 +86,12 @@ remap_area_pmd(pmd_t * pmd, unsigned long address, unsigned long size,
|
|||
}
|
||||
|
||||
static int
|
||||
remap_area_pages(unsigned long start, unsigned long phys_addr,
|
||||
remap_area_pages(unsigned long start, unsigned long pfn,
|
||||
unsigned long size, unsigned long flags)
|
||||
{
|
||||
unsigned long address = start;
|
||||
unsigned long end = start + size;
|
||||
unsigned long phys_addr = __pfn_to_phys(pfn);
|
||||
int err = 0;
|
||||
pgd_t * dir;
|
||||
|
||||
|
@ -129,37 +130,45 @@ remap_area_pages(unsigned long start, unsigned long phys_addr,
|
|||
* 'flags' are the extra L_PTE_ flags that you want to specify for this
|
||||
* mapping. See include/asm-arm/proc-armv/pgtable.h for more information.
|
||||
*/
|
||||
void __iomem *
|
||||
__ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size,
|
||||
unsigned long flags)
|
||||
{
|
||||
unsigned long addr;
|
||||
struct vm_struct * area;
|
||||
|
||||
area = get_vm_area(size, VM_IOREMAP);
|
||||
if (!area)
|
||||
return NULL;
|
||||
addr = (unsigned long)area->addr;
|
||||
if (remap_area_pages(addr, pfn, size, flags)) {
|
||||
vfree(addr);
|
||||
return NULL;
|
||||
}
|
||||
return (void __iomem *) (offset + (char *)addr);
|
||||
}
|
||||
EXPORT_SYMBOL(__ioremap_pfn);
|
||||
|
||||
void __iomem *
|
||||
__ioremap(unsigned long phys_addr, size_t size, unsigned long flags)
|
||||
{
|
||||
void * addr;
|
||||
struct vm_struct * area;
|
||||
unsigned long offset, last_addr;
|
||||
unsigned long last_addr;
|
||||
unsigned long offset = phys_addr & ~PAGE_MASK;
|
||||
unsigned long pfn = __phys_to_pfn(phys_addr);
|
||||
|
||||
/* Don't allow wraparound or zero size */
|
||||
/*
|
||||
* Don't allow wraparound or zero size
|
||||
*/
|
||||
last_addr = phys_addr + size - 1;
|
||||
if (!size || last_addr < phys_addr)
|
||||
return NULL;
|
||||
|
||||
/*
|
||||
* Mappings have to be page-aligned
|
||||
* Page align the mapping size
|
||||
*/
|
||||
offset = phys_addr & ~PAGE_MASK;
|
||||
phys_addr &= PAGE_MASK;
|
||||
size = PAGE_ALIGN(last_addr + 1) - phys_addr;
|
||||
|
||||
/*
|
||||
* Ok, go for it..
|
||||
*/
|
||||
area = get_vm_area(size, VM_IOREMAP);
|
||||
if (!area)
|
||||
return NULL;
|
||||
addr = area->addr;
|
||||
if (remap_area_pages((unsigned long) addr, phys_addr, size, flags)) {
|
||||
vfree(addr);
|
||||
return NULL;
|
||||
}
|
||||
return (void __iomem *) (offset + (char *)addr);
|
||||
return __ioremap_pfn(pfn, offset, size, flags);
|
||||
}
|
||||
EXPORT_SYMBOL(__ioremap);
|
||||
|
||||
|
|
|
@ -12,7 +12,7 @@
|
|||
#
|
||||
# http://www.arm.linux.org.uk/developer/machines/?action=new
|
||||
#
|
||||
# Last update: Fri Nov 25 14:43:04 2005
|
||||
# Last update: Mon Jan 9 12:56:42 2006
|
||||
#
|
||||
# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
|
||||
#
|
||||
|
@ -910,3 +910,31 @@ mbus MACH_MBUS MBUS 896
|
|||
nadia2vb MACH_NADIA2VB NADIA2VB 897
|
||||
r1000 MACH_R1000 R1000 898
|
||||
hw90250 MACH_HW90250 HW90250 899
|
||||
omap_2430sdp MACH_OMAP_2430SDP OMAP_2430SDP 900
|
||||
davinci_evm MACH_DAVINCI_EVM DAVINCI_EVM 901
|
||||
omap_tornado MACH_OMAP_TORNADO OMAP_TORNADO 902
|
||||
olocreek MACH_OLOCREEK OLOCREEK 903
|
||||
palmz72 MACH_PALMZ72 PALMZ72 904
|
||||
nxdb500 MACH_NXDB500 NXDB500 905
|
||||
apf9328 MACH_APF9328 APF9328 906
|
||||
omap_wipoq MACH_OMAP_WIPOQ OMAP_WIPOQ 907
|
||||
omap_twip MACH_OMAP_TWIP OMAP_TWIP 908
|
||||
xscale_treo650 MACH_XSCALE_PALMTREO650 XSCALE_PALMTREO650 909
|
||||
acumen MACH_ACUMEN ACUMEN 910
|
||||
xp100 MACH_XP100 XP100 911
|
||||
fs2410 MACH_FS2410 FS2410 912
|
||||
pxa270_cerf MACH_PXA270_CERF PXA270_CERF 913
|
||||
sq2ftlpalm MACH_SQ2FTLPALM SQ2FTLPALM 914
|
||||
bsemserver MACH_BSEMSERVER BSEMSERVER 915
|
||||
netclient MACH_NETCLIENT NETCLIENT 916
|
||||
xscale_palmtt5 MACH_XSCALE_PALMTT5 XSCALE_PALMTT5 917
|
||||
xscale_palmtc MACH_OMAP_PALMTC OMAP_PALMTC 918
|
||||
omap_apollon MACH_OMAP_APOLLON OMAP_APOLLON 919
|
||||
argonlvevb MACH_ARGONLVEVB ARGONLVEVB 920
|
||||
rea_2d MACH_REA_2D REA_2D 921
|
||||
eti3e524 MACH_TI3E524 TI3E524 922
|
||||
ateb9200 MACH_ATEB9200 ATEB9200 923
|
||||
auckland MACH_AUCKLAND AUCKLAND 924
|
||||
ak3220m MACH_AK3320M AK3320M 925
|
||||
duramax MACH_DURAMAX DURAMAX 926
|
||||
n35 MACH_N35 N35 927
|
||||
|
|
|
@ -15,7 +15,6 @@
|
|||
#include <linux/amba/bus.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/sizes.h>
|
||||
|
||||
#define to_amba_device(d) container_of(d, struct amba_device, dev)
|
||||
|
|
|
@ -20,7 +20,6 @@
|
|||
#include <linux/spinlock.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/system.h>
|
||||
|
||||
#include <asm/hardware/sa1111.h>
|
||||
|
|
|
@ -473,14 +473,6 @@ config MTD_IXP2000
|
|||
IXDP425 and Coyote. If you have an IXP2000 based board and
|
||||
would like to use the flash chips on it, say 'Y'.
|
||||
|
||||
config MTD_EPXA10DB
|
||||
tristate "CFI Flash device mapped on Epxa10db"
|
||||
depends on MTD_CFI && MTD_PARTITIONS && ARCH_CAMELOT
|
||||
help
|
||||
This enables support for the flash devices on the Altera
|
||||
Excalibur XA10 Development Board. If you are building a kernel
|
||||
for on of these boards then you should say 'Y' otherwise say 'N'.
|
||||
|
||||
config MTD_FORTUNET
|
||||
tristate "CFI Flash device mapped on the FortuNet board"
|
||||
depends on MTD_CFI && MTD_PARTITIONS && SA1100_FORTUNET
|
||||
|
|
|
@ -15,7 +15,6 @@ obj-$(CONFIG_MTD_CFI_FLAGADM) += cfi_flagadm.o
|
|||
obj-$(CONFIG_MTD_CSTM_MIPS_IXX) += cstm_mips_ixx.o
|
||||
obj-$(CONFIG_MTD_DC21285) += dc21285.o
|
||||
obj-$(CONFIG_MTD_DILNETPC) += dilnetpc.o
|
||||
obj-$(CONFIG_MTD_EPXA10DB) += epxa10db-flash.o
|
||||
obj-$(CONFIG_MTD_IQ80310) += iq80310.o
|
||||
obj-$(CONFIG_MTD_L440GX) += l440gx.o
|
||||
obj-$(CONFIG_MTD_AMD76XROM) += amd76xrom.o
|
||||
|
|
|
@ -1,179 +0,0 @@
|
|||
/*
|
||||
* Flash memory access on EPXA based devices
|
||||
*
|
||||
* (C) 2000 Nicolas Pitre <nico@cam.org>
|
||||
* Copyright (C) 2001 Altera Corporation
|
||||
* Copyright (C) 2001 Red Hat, Inc.
|
||||
*
|
||||
* $Id: epxa10db-flash.c,v 1.15 2005/11/07 11:14:27 gleixner Exp $
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/config.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
#include <linux/mtd/mtd.h>
|
||||
#include <linux/mtd/map.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/hardware.h>
|
||||
|
||||
#ifdef CONFIG_EPXA10DB
|
||||
#define BOARD_NAME "EPXA10DB"
|
||||
#else
|
||||
#define BOARD_NAME "EPXA1DB"
|
||||
#endif
|
||||
|
||||
static int nr_parts = 0;
|
||||
static struct mtd_partition *parts;
|
||||
|
||||
static struct mtd_info *mymtd;
|
||||
|
||||
static int epxa_default_partitions(struct mtd_info *master, struct mtd_partition **pparts);
|
||||
|
||||
|
||||
static struct map_info epxa_map = {
|
||||
.name = "EPXA flash",
|
||||
.size = FLASH_SIZE,
|
||||
.bankwidth = 2,
|
||||
.phys = FLASH_START,
|
||||
};
|
||||
|
||||
static const char *probes[] = { "RedBoot", "afs", NULL };
|
||||
|
||||
static int __init epxa_mtd_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
printk(KERN_NOTICE "%s flash device: 0x%x at 0x%x\n", BOARD_NAME, FLASH_SIZE, FLASH_START);
|
||||
|
||||
epxa_map.virt = ioremap(FLASH_START, FLASH_SIZE);
|
||||
if (!epxa_map.virt) {
|
||||
printk("Failed to ioremap %s flash\n",BOARD_NAME);
|
||||
return -EIO;
|
||||
}
|
||||
simple_map_init(&epxa_map);
|
||||
|
||||
mymtd = do_map_probe("cfi_probe", &epxa_map);
|
||||
if (!mymtd) {
|
||||
iounmap((void *)epxa_map.virt);
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
mymtd->owner = THIS_MODULE;
|
||||
|
||||
/* Unlock the flash device. */
|
||||
if(mymtd->unlock){
|
||||
for (i=0; i<mymtd->numeraseregions;i++){
|
||||
int j;
|
||||
for(j=0;j<mymtd->eraseregions[i].numblocks;j++){
|
||||
mymtd->unlock(mymtd,mymtd->eraseregions[i].offset + j * mymtd->eraseregions[i].erasesize,mymtd->eraseregions[i].erasesize);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MTD_PARTITIONS
|
||||
nr_parts = parse_mtd_partitions(mymtd, probes, &parts, 0);
|
||||
|
||||
if (nr_parts > 0) {
|
||||
add_mtd_partitions(mymtd, parts, nr_parts);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
/* No recognised partitioning schemes found - use defaults */
|
||||
nr_parts = epxa_default_partitions(mymtd, &parts);
|
||||
if (nr_parts > 0) {
|
||||
add_mtd_partitions(mymtd, parts, nr_parts);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* If all else fails... */
|
||||
add_mtd_device(mymtd);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void __exit epxa_mtd_cleanup(void)
|
||||
{
|
||||
if (mymtd) {
|
||||
if (nr_parts)
|
||||
del_mtd_partitions(mymtd);
|
||||
else
|
||||
del_mtd_device(mymtd);
|
||||
map_destroy(mymtd);
|
||||
}
|
||||
if (epxa_map.virt) {
|
||||
iounmap((void *)epxa_map.virt);
|
||||
epxa_map.virt = 0;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* This will do for now, once we decide which bootldr we're finally
|
||||
* going to use then we'll remove this function and do it properly
|
||||
*
|
||||
* Partions are currently (as offsets from base of flash):
|
||||
* 0x00000000 - 0x003FFFFF - bootloader (!)
|
||||
* 0x00400000 - 0x00FFFFFF - Flashdisk
|
||||
*/
|
||||
|
||||
static int __init epxa_default_partitions(struct mtd_info *master, struct mtd_partition **pparts)
|
||||
{
|
||||
struct mtd_partition *parts;
|
||||
int ret, i;
|
||||
int npartitions = 0;
|
||||
char *names;
|
||||
const char *name = "jffs";
|
||||
|
||||
printk("Using default partitions for %s\n",BOARD_NAME);
|
||||
npartitions=1;
|
||||
parts = kmalloc(npartitions*sizeof(*parts)+strlen(name), GFP_KERNEL);
|
||||
memzero(parts,npartitions*sizeof(*parts)+strlen(name));
|
||||
if (!parts) {
|
||||
ret = -ENOMEM;
|
||||
goto out;
|
||||
}
|
||||
i=0;
|
||||
names = (char *)&parts[npartitions];
|
||||
parts[i].name = names;
|
||||
names += strlen(name) + 1;
|
||||
strcpy(parts[i].name, name);
|
||||
|
||||
#ifdef CONFIG_EPXA10DB
|
||||
parts[i].size = FLASH_SIZE-0x00400000;
|
||||
parts[i].offset = 0x00400000;
|
||||
#else
|
||||
parts[i].size = FLASH_SIZE-0x00180000;
|
||||
parts[i].offset = 0x00180000;
|
||||
#endif
|
||||
|
||||
out:
|
||||
*pparts = parts;
|
||||
return npartitions;
|
||||
}
|
||||
|
||||
|
||||
module_init(epxa_mtd_init);
|
||||
module_exit(epxa_mtd_cleanup);
|
||||
|
||||
MODULE_AUTHOR("Clive Davies");
|
||||
MODULE_DESCRIPTION("Altera epxa mtd flash map");
|
||||
MODULE_LICENSE("GPL");
|
|
@ -31,16 +31,3 @@ config ARM_ETHERH
|
|||
help
|
||||
If you have an Acorn system with one of these network cards, you
|
||||
should say Y to this option if you wish to use it with Linux.
|
||||
|
||||
config ARM_ETHER00
|
||||
tristate "Altera Ether00 support"
|
||||
depends on NET_ETHERNET && ARM && ARCH_CAMELOT
|
||||
help
|
||||
This is the driver for Altera's ether00 ethernet mac IP core. Say
|
||||
Y here if you want to build support for this into the kernel. It
|
||||
is also available as a module (say M here) that can be inserted/
|
||||
removed from the kernel at the same time as the PLD is configured.
|
||||
If this driver is running on an epxa10 development board then it
|
||||
will generate a suitable hw address based on the board serial
|
||||
number (MTD support is required for this). Otherwise you will
|
||||
need to set a suitable hw address using ifconfig.
|
||||
|
|
|
@ -4,7 +4,6 @@
|
|||
#
|
||||
|
||||
obj-$(CONFIG_ARM_AM79C961A) += am79c961a.o
|
||||
obj-$(CONFIG_ARM_ETHER00) += ether00.o
|
||||
obj-$(CONFIG_ARM_ETHERH) += etherh.o
|
||||
obj-$(CONFIG_ARM_ETHER3) += ether3.o
|
||||
obj-$(CONFIG_ARM_ETHER1) += ether1.o
|
||||
|
|
|
@ -668,9 +668,8 @@ static void __init am79c961_banner(void)
|
|||
printk(KERN_INFO "%s", version);
|
||||
}
|
||||
|
||||
static int __init am79c961_probe(struct device *_dev)
|
||||
static int __init am79c961_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct platform_device *pdev = to_platform_device(_dev);
|
||||
struct resource *res;
|
||||
struct net_device *dev;
|
||||
struct dev_priv *priv;
|
||||
|
@ -758,15 +757,16 @@ out:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static struct device_driver am79c961_driver = {
|
||||
.name = "am79c961",
|
||||
.bus = &platform_bus_type,
|
||||
static struct platform_driver am79c961_driver = {
|
||||
.probe = am79c961_probe,
|
||||
.driver = {
|
||||
.name = "am79c961",
|
||||
},
|
||||
};
|
||||
|
||||
static int __init am79c961_init(void)
|
||||
{
|
||||
return driver_register(&am79c961_driver);
|
||||
return platform_driver_register(&am79c961_driver);
|
||||
}
|
||||
|
||||
__initcall(am79c961_init);
|
||||
|
|
File diff suppressed because it is too large
Load diff
|
@ -69,7 +69,6 @@
|
|||
#include <asm/system.h>
|
||||
#include <asm/ecard.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
static char version[] __initdata = "ether3 ethernet driver (c) 1995-2000 R.M.King v1.17\n";
|
||||
|
||||
|
|
|
@ -50,7 +50,6 @@
|
|||
#include <asm/system.h>
|
||||
#include <asm/ecard.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
#include "../8390.h"
|
||||
|
||||
|
|
|
@ -146,7 +146,6 @@
|
|||
|
||||
#include <asm/system.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/ecard.h>
|
||||
|
||||
#include "../scsi.h"
|
||||
|
|
|
@ -33,7 +33,6 @@
|
|||
|
||||
#include <asm/dma.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/ecard.h>
|
||||
|
||||
#include "../scsi.h"
|
||||
|
|
|
@ -13,7 +13,6 @@
|
|||
|
||||
#include <asm/ecard.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/system.h>
|
||||
|
||||
#include "../scsi.h"
|
||||
|
|
|
@ -31,7 +31,6 @@
|
|||
#include <asm/dma.h>
|
||||
#include <asm/ecard.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/pgtable.h>
|
||||
|
||||
#include "../scsi.h"
|
||||
|
|
|
@ -35,7 +35,6 @@
|
|||
#include <linux/dma-mapping.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/dma.h>
|
||||
#include <asm/ecard.h>
|
||||
#include <asm/pgtable.h>
|
||||
|
|
|
@ -22,7 +22,6 @@
|
|||
#include <asm/dma.h>
|
||||
#include <asm/ecard.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/pgtable.h>
|
||||
|
||||
#include "../scsi.h"
|
||||
|
|
|
@ -369,29 +369,6 @@ config SERIAL_21285_CONSOLE
|
|||
your boot loader (lilo or loadlin) about how to pass options to the
|
||||
kernel at boot time.)
|
||||
|
||||
config SERIAL_UART00
|
||||
bool "Excalibur serial port (uart00) support"
|
||||
depends on ARM && ARCH_CAMELOT
|
||||
select SERIAL_CORE
|
||||
help
|
||||
Say Y here if you want to use the hard logic uart on Excalibur. This
|
||||
driver also supports soft logic implementations of this uart core.
|
||||
|
||||
config SERIAL_UART00_CONSOLE
|
||||
bool "Support for console on Excalibur serial port"
|
||||
depends on SERIAL_UART00
|
||||
select SERIAL_CORE_CONSOLE
|
||||
help
|
||||
Say Y here if you want to support a serial console on an Excalibur
|
||||
hard logic uart or uart00 IP core.
|
||||
|
||||
Even if you say Y here, the currently visible virtual console
|
||||
(/dev/tty0) will still be used as the system console by default, but
|
||||
you can alter that using a kernel command line option such as
|
||||
"console=ttyS1". (Try "man bootparam" or see the documentation of
|
||||
your boot loader (lilo or loadlin) about how to pass options to the
|
||||
kernel at boot time.)
|
||||
|
||||
config SERIAL_MPSC
|
||||
bool "Marvell MPSC serial port support"
|
||||
depends on PPC32 && MV64X60
|
||||
|
|
|
@ -29,7 +29,6 @@ obj-$(CONFIG_SERIAL_CLPS711X) += clps711x.o
|
|||
obj-$(CONFIG_SERIAL_PXA) += pxa.o
|
||||
obj-$(CONFIG_SERIAL_SA1100) += sa1100.o
|
||||
obj-$(CONFIG_SERIAL_S3C2410) += s3c2410.o
|
||||
obj-$(CONFIG_SERIAL_UART00) += uart00.o
|
||||
obj-$(CONFIG_SERIAL_SUNCORE) += suncore.o
|
||||
obj-$(CONFIG_SERIAL_SUNZILOG) += sunzilog.o
|
||||
obj-$(CONFIG_SERIAL_IP22_ZILOG) += ip22zilog.o
|
||||
|
|
|
@ -1,782 +0,0 @@
|
|||
/*
|
||||
* linux/drivers/serial/uart00.c
|
||||
*
|
||||
* Driver for UART00 serial ports
|
||||
*
|
||||
* Based on drivers/char/serial_amba.c, by ARM Limited &
|
||||
* Deep Blue Solutions Ltd.
|
||||
* Copyright 2001 Altera Corporation
|
||||
*
|
||||
* Update for 2.6.4 by Dirk Behme <dirk.behme@de.bosch.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*
|
||||
* $Id: uart00.c,v 1.35 2002/07/28 10:03:28 rmk Exp $
|
||||
*
|
||||
*/
|
||||
#include <linux/config.h>
|
||||
|
||||
#if defined(CONFIG_SERIAL_UART00_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
|
||||
#define SUPPORT_SYSRQ
|
||||
#endif
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/console.h>
|
||||
#include <linux/sysrq.h>
|
||||
#include <linux/tty.h>
|
||||
#include <linux/tty_flip.h>
|
||||
#include <linux/serial_core.h>
|
||||
#include <linux/serial.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/sizes.h>
|
||||
|
||||
#include <asm/arch/excalibur.h>
|
||||
#define UART00_TYPE (volatile unsigned int*)
|
||||
#include <asm/arch/uart00.h>
|
||||
#include <asm/arch/int_ctrl00.h>
|
||||
|
||||
#define UART_NR 2
|
||||
|
||||
#define SERIAL_UART00_NAME "ttyUA"
|
||||
#define SERIAL_UART00_MAJOR 204
|
||||
#define SERIAL_UART00_MINOR 16 /* Temporary - will change in future */
|
||||
#define SERIAL_UART00_NR UART_NR
|
||||
#define UART_PORT_SIZE 0x50
|
||||
|
||||
#define UART00_ISR_PASS_LIMIT 256
|
||||
|
||||
/*
|
||||
* Access macros for the UART00 UARTs
|
||||
*/
|
||||
#define UART_GET_INT_STATUS(p) inl(UART_ISR((p)->membase))
|
||||
#define UART_PUT_IES(p, c) outl(c,UART_IES((p)->membase))
|
||||
#define UART_GET_IES(p) inl(UART_IES((p)->membase))
|
||||
#define UART_PUT_IEC(p, c) outl(c,UART_IEC((p)->membase))
|
||||
#define UART_GET_IEC(p) inl(UART_IEC((p)->membase))
|
||||
#define UART_PUT_CHAR(p, c) outl(c,UART_TD((p)->membase))
|
||||
#define UART_GET_CHAR(p) inl(UART_RD((p)->membase))
|
||||
#define UART_GET_RSR(p) inl(UART_RSR((p)->membase))
|
||||
#define UART_GET_RDS(p) inl(UART_RDS((p)->membase))
|
||||
#define UART_GET_MSR(p) inl(UART_MSR((p)->membase))
|
||||
#define UART_GET_MCR(p) inl(UART_MCR((p)->membase))
|
||||
#define UART_PUT_MCR(p, c) outl(c,UART_MCR((p)->membase))
|
||||
#define UART_GET_MC(p) inl(UART_MC((p)->membase))
|
||||
#define UART_PUT_MC(p, c) outl(c,UART_MC((p)->membase))
|
||||
#define UART_GET_TSR(p) inl(UART_TSR((p)->membase))
|
||||
#define UART_GET_DIV_HI(p) inl(UART_DIV_HI((p)->membase))
|
||||
#define UART_PUT_DIV_HI(p,c) outl(c,UART_DIV_HI((p)->membase))
|
||||
#define UART_GET_DIV_LO(p) inl(UART_DIV_LO((p)->membase))
|
||||
#define UART_PUT_DIV_LO(p,c) outl(c,UART_DIV_LO((p)->membase))
|
||||
#define UART_RX_DATA(s) ((s) & UART_RSR_RX_LEVEL_MSK)
|
||||
#define UART_TX_READY(s) (((s) & UART_TSR_TX_LEVEL_MSK) < 15)
|
||||
//#define UART_TX_EMPTY(p) ((UART_GET_FR(p) & UART00_UARTFR_TMSK) == 0)
|
||||
|
||||
static void uart00_stop_tx(struct uart_port *port)
|
||||
{
|
||||
UART_PUT_IEC(port, UART_IEC_TIE_MSK);
|
||||
}
|
||||
|
||||
static void uart00_stop_rx(struct uart_port *port)
|
||||
{
|
||||
UART_PUT_IEC(port, UART_IEC_RE_MSK);
|
||||
}
|
||||
|
||||
static void uart00_enable_ms(struct uart_port *port)
|
||||
{
|
||||
UART_PUT_IES(port, UART_IES_ME_MSK);
|
||||
}
|
||||
|
||||
static void
|
||||
uart00_rx_chars(struct uart_port *port, struct pt_regs *regs)
|
||||
{
|
||||
struct tty_struct *tty = port->info->tty;
|
||||
unsigned int status, ch, rds, flg, ignored = 0;
|
||||
|
||||
status = UART_GET_RSR(port);
|
||||
while (UART_RX_DATA(status)) {
|
||||
/*
|
||||
* We need to read rds before reading the
|
||||
* character from the fifo
|
||||
*/
|
||||
rds = UART_GET_RDS(port);
|
||||
ch = UART_GET_CHAR(port);
|
||||
port->icount.rx++;
|
||||
|
||||
if (tty->flip.count >= TTY_FLIPBUF_SIZE)
|
||||
goto ignore_char;
|
||||
|
||||
flg = TTY_NORMAL;
|
||||
|
||||
/*
|
||||
* Note that the error handling code is
|
||||
* out of the main execution path
|
||||
*/
|
||||
if (rds & (UART_RDS_BI_MSK |UART_RDS_FE_MSK|
|
||||
UART_RDS_PE_MSK |UART_RDS_PE_MSK))
|
||||
goto handle_error;
|
||||
if (uart_handle_sysrq_char(port, ch, regs))
|
||||
goto ignore_char;
|
||||
|
||||
error_return:
|
||||
tty_insert_flip_char(tty, ch, flg);
|
||||
|
||||
ignore_char:
|
||||
status = UART_GET_RSR(port);
|
||||
}
|
||||
out:
|
||||
tty_flip_buffer_push(tty);
|
||||
return;
|
||||
|
||||
handle_error:
|
||||
if (rds & UART_RDS_BI_MSK) {
|
||||
status &= ~(UART_RDS_FE_MSK | UART_RDS_PE_MSK);
|
||||
port->icount.brk++;
|
||||
if (uart_handle_break(port))
|
||||
goto ignore_char;
|
||||
} else if (rds & UART_RDS_PE_MSK)
|
||||
port->icount.parity++;
|
||||
else if (rds & UART_RDS_FE_MSK)
|
||||
port->icount.frame++;
|
||||
if (rds & UART_RDS_OE_MSK)
|
||||
port->icount.overrun++;
|
||||
|
||||
if (rds & port->ignore_status_mask) {
|
||||
if (++ignored > 100)
|
||||
goto out;
|
||||
goto ignore_char;
|
||||
}
|
||||
rds &= port->read_status_mask;
|
||||
|
||||
if (rds & UART_RDS_BI_MSK)
|
||||
flg = TTY_BREAK;
|
||||
else if (rds & UART_RDS_PE_MSK)
|
||||
flg = TTY_PARITY;
|
||||
else if (rds & UART_RDS_FE_MSK)
|
||||
flg = TTY_FRAME;
|
||||
|
||||
if (rds & UART_RDS_OE_MSK) {
|
||||
/*
|
||||
* CHECK: does overrun affect the current character?
|
||||
* ASSUMPTION: it does not.
|
||||
*/
|
||||
tty_insert_flip_char(tty, ch, flg);
|
||||
ch = 0;
|
||||
flg = TTY_OVERRUN;
|
||||
}
|
||||
#ifdef SUPPORT_SYSRQ
|
||||
port->sysrq = 0;
|
||||
#endif
|
||||
goto error_return;
|
||||
}
|
||||
|
||||
static void uart00_tx_chars(struct uart_port *port)
|
||||
{
|
||||
struct circ_buf *xmit = &port->info->xmit;
|
||||
int count;
|
||||
|
||||
if (port->x_char) {
|
||||
while ((UART_GET_TSR(port) & UART_TSR_TX_LEVEL_MSK) == 15)
|
||||
barrier();
|
||||
UART_PUT_CHAR(port, port->x_char);
|
||||
port->icount.tx++;
|
||||
port->x_char = 0;
|
||||
return;
|
||||
}
|
||||
if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
|
||||
uart00_stop_tx(port);
|
||||
return;
|
||||
}
|
||||
|
||||
count = port->fifosize >> 1;
|
||||
do {
|
||||
while ((UART_GET_TSR(port) & UART_TSR_TX_LEVEL_MSK) == 15)
|
||||
barrier();
|
||||
UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
|
||||
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
|
||||
port->icount.tx++;
|
||||
if (uart_circ_empty(xmit))
|
||||
break;
|
||||
} while (--count > 0);
|
||||
|
||||
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
|
||||
uart_write_wakeup(port);
|
||||
|
||||
if (uart_circ_empty(xmit))
|
||||
uart00_stop_tx(port);
|
||||
}
|
||||
|
||||
static void uart00_start_tx(struct uart_port *port)
|
||||
{
|
||||
UART_PUT_IES(port, UART_IES_TIE_MSK);
|
||||
uart00_tx_chars(port);
|
||||
}
|
||||
|
||||
static void uart00_modem_status(struct uart_port *port)
|
||||
{
|
||||
unsigned int status;
|
||||
|
||||
status = UART_GET_MSR(port);
|
||||
|
||||
if (!(status & (UART_MSR_DCTS_MSK | UART_MSR_DDSR_MSK |
|
||||
UART_MSR_TERI_MSK | UART_MSR_DDCD_MSK)))
|
||||
return;
|
||||
|
||||
if (status & UART_MSR_DDCD_MSK)
|
||||
uart_handle_dcd_change(port, status & UART_MSR_DCD_MSK);
|
||||
|
||||
if (status & UART_MSR_DDSR_MSK)
|
||||
port->icount.dsr++;
|
||||
|
||||
if (status & UART_MSR_DCTS_MSK)
|
||||
uart_handle_cts_change(port, status & UART_MSR_CTS_MSK);
|
||||
|
||||
wake_up_interruptible(&port->info->delta_msr_wait);
|
||||
}
|
||||
|
||||
static irqreturn_t uart00_int(int irq, void *dev_id, struct pt_regs *regs)
|
||||
{
|
||||
struct uart_port *port = dev_id;
|
||||
unsigned int status, pass_counter = 0;
|
||||
|
||||
status = UART_GET_INT_STATUS(port);
|
||||
do {
|
||||
if (status & UART_ISR_RI_MSK)
|
||||
uart00_rx_chars(port, regs);
|
||||
if (status & UART_ISR_MI_MSK)
|
||||
uart00_modem_status(port);
|
||||
if (status & (UART_ISR_TI_MSK | UART_ISR_TII_MSK))
|
||||
uart00_tx_chars(port);
|
||||
if (pass_counter++ > UART00_ISR_PASS_LIMIT)
|
||||
break;
|
||||
|
||||
status = UART_GET_INT_STATUS(port);
|
||||
} while (status);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static unsigned int uart00_tx_empty(struct uart_port *port)
|
||||
{
|
||||
return UART_GET_TSR(port) & UART_TSR_TX_LEVEL_MSK? 0 : TIOCSER_TEMT;
|
||||
}
|
||||
|
||||
static unsigned int uart00_get_mctrl(struct uart_port *port)
|
||||
{
|
||||
unsigned int result = 0;
|
||||
unsigned int status;
|
||||
|
||||
status = UART_GET_MSR(port);
|
||||
if (status & UART_MSR_DCD_MSK)
|
||||
result |= TIOCM_CAR;
|
||||
if (status & UART_MSR_DSR_MSK)
|
||||
result |= TIOCM_DSR;
|
||||
if (status & UART_MSR_CTS_MSK)
|
||||
result |= TIOCM_CTS;
|
||||
if (status & UART_MSR_RI_MSK)
|
||||
result |= TIOCM_RI;
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
static void uart00_set_mctrl_null(struct uart_port *port, unsigned int mctrl)
|
||||
{
|
||||
}
|
||||
|
||||
static void uart00_break_ctl(struct uart_port *port, int break_state)
|
||||
{
|
||||
unsigned long flags;
|
||||
unsigned int mcr;
|
||||
|
||||
spin_lock_irqsave(&port->lock, flags);
|
||||
mcr = UART_GET_MCR(port);
|
||||
if (break_state == -1)
|
||||
mcr |= UART_MCR_BR_MSK;
|
||||
else
|
||||
mcr &= ~UART_MCR_BR_MSK;
|
||||
UART_PUT_MCR(port, mcr);
|
||||
spin_unlock_irqrestore(&port->lock, flags);
|
||||
}
|
||||
|
||||
static void
|
||||
uart00_set_termios(struct uart_port *port, struct termios *termios,
|
||||
struct termios *old)
|
||||
{
|
||||
unsigned int uart_mc, old_ies, baud, quot;
|
||||
unsigned long flags;
|
||||
|
||||
/*
|
||||
* We don't support CREAD (yet)
|
||||
*/
|
||||
termios->c_cflag |= CREAD;
|
||||
|
||||
/*
|
||||
* Ask the core to calculate the divisor for us.
|
||||
*/
|
||||
baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
|
||||
quot = uart_get_divisor(port, baud);
|
||||
|
||||
/* byte size and parity */
|
||||
switch (termios->c_cflag & CSIZE) {
|
||||
case CS5:
|
||||
uart_mc = UART_MC_CLS_CHARLEN_5;
|
||||
break;
|
||||
case CS6:
|
||||
uart_mc = UART_MC_CLS_CHARLEN_6;
|
||||
break;
|
||||
case CS7:
|
||||
uart_mc = UART_MC_CLS_CHARLEN_7;
|
||||
break;
|
||||
default: // CS8
|
||||
uart_mc = UART_MC_CLS_CHARLEN_8;
|
||||
break;
|
||||
}
|
||||
if (termios->c_cflag & CSTOPB)
|
||||
uart_mc|= UART_MC_ST_TWO;
|
||||
if (termios->c_cflag & PARENB) {
|
||||
uart_mc |= UART_MC_PE_MSK;
|
||||
if (!(termios->c_cflag & PARODD))
|
||||
uart_mc |= UART_MC_EP_MSK;
|
||||
}
|
||||
|
||||
spin_lock_irqsave(&port->lock, flags);
|
||||
|
||||
/*
|
||||
* Update the per-port timeout.
|
||||
*/
|
||||
uart_update_timeout(port, termios->c_cflag, baud);
|
||||
|
||||
port->read_status_mask = UART_RDS_OE_MSK;
|
||||
if (termios->c_iflag & INPCK)
|
||||
port->read_status_mask |= UART_RDS_FE_MSK | UART_RDS_PE_MSK;
|
||||
if (termios->c_iflag & (BRKINT | PARMRK))
|
||||
port->read_status_mask |= UART_RDS_BI_MSK;
|
||||
|
||||
/*
|
||||
* Characters to ignore
|
||||
*/
|
||||
port->ignore_status_mask = 0;
|
||||
if (termios->c_iflag & IGNPAR)
|
||||
port->ignore_status_mask |= UART_RDS_FE_MSK | UART_RDS_PE_MSK;
|
||||
if (termios->c_iflag & IGNBRK) {
|
||||
port->ignore_status_mask |= UART_RDS_BI_MSK;
|
||||
/*
|
||||
* If we're ignoring parity and break indicators,
|
||||
* ignore overruns to (for real raw support).
|
||||
*/
|
||||
if (termios->c_iflag & IGNPAR)
|
||||
port->ignore_status_mask |= UART_RDS_OE_MSK;
|
||||
}
|
||||
|
||||
/* first, disable everything */
|
||||
old_ies = UART_GET_IES(port);
|
||||
|
||||
if (UART_ENABLE_MS(port, termios->c_cflag))
|
||||
old_ies |= UART_IES_ME_MSK;
|
||||
|
||||
/* Set baud rate */
|
||||
UART_PUT_DIV_LO(port, (quot & 0xff));
|
||||
UART_PUT_DIV_HI(port, ((quot & 0xf00) >> 8));
|
||||
|
||||
UART_PUT_MC(port, uart_mc);
|
||||
UART_PUT_IES(port, old_ies);
|
||||
|
||||
spin_unlock_irqrestore(&port->lock, flags);
|
||||
}
|
||||
|
||||
static int uart00_startup(struct uart_port *port)
|
||||
{
|
||||
int result;
|
||||
|
||||
/*
|
||||
* Allocate the IRQ
|
||||
*/
|
||||
result = request_irq(port->irq, uart00_int, 0, "uart00", port);
|
||||
if (result) {
|
||||
printk(KERN_ERR "Request of irq %d failed\n", port->irq);
|
||||
return result;
|
||||
}
|
||||
|
||||
/*
|
||||
* Finally, enable interrupts. Use the TII interrupt to minimise
|
||||
* the number of interrupts generated. If higher performance is
|
||||
* needed, consider using the TI interrupt with a suitable FIFO
|
||||
* threshold
|
||||
*/
|
||||
UART_PUT_IES(port, UART_IES_RE_MSK | UART_IES_TIE_MSK);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void uart00_shutdown(struct uart_port *port)
|
||||
{
|
||||
/*
|
||||
* disable all interrupts, disable the port
|
||||
*/
|
||||
UART_PUT_IEC(port, 0xff);
|
||||
|
||||
/* disable break condition and fifos */
|
||||
UART_PUT_MCR(port, UART_GET_MCR(port) &~UART_MCR_BR_MSK);
|
||||
|
||||
/*
|
||||
* Free the interrupt
|
||||
*/
|
||||
free_irq(port->irq, port);
|
||||
}
|
||||
|
||||
static const char *uart00_type(struct uart_port *port)
|
||||
{
|
||||
return port->type == PORT_UART00 ? "Altera UART00" : NULL;
|
||||
}
|
||||
|
||||
/*
|
||||
* Release the memory region(s) being used by 'port'
|
||||
*/
|
||||
static void uart00_release_port(struct uart_port *port)
|
||||
{
|
||||
release_mem_region(port->mapbase, UART_PORT_SIZE);
|
||||
|
||||
#ifdef CONFIG_ARCH_CAMELOT
|
||||
if (port->membase != (void*)IO_ADDRESS(EXC_UART00_BASE)) {
|
||||
iounmap(port->membase);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
* Request the memory region(s) being used by 'port'
|
||||
*/
|
||||
static int uart00_request_port(struct uart_port *port)
|
||||
{
|
||||
return request_mem_region(port->mapbase, UART_PORT_SIZE, "serial_uart00")
|
||||
!= NULL ? 0 : -EBUSY;
|
||||
}
|
||||
|
||||
/*
|
||||
* Configure/autoconfigure the port.
|
||||
*/
|
||||
static void uart00_config_port(struct uart_port *port, int flags)
|
||||
{
|
||||
|
||||
/*
|
||||
* Map the io memory if this is a soft uart
|
||||
*/
|
||||
if (!port->membase)
|
||||
port->membase = ioremap_nocache(port->mapbase,SZ_4K);
|
||||
|
||||
if (!port->membase)
|
||||
printk(KERN_ERR "serial00: cannot map io memory\n");
|
||||
else
|
||||
port->type = PORT_UART00;
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
* verify the new serial_struct (for TIOCSSERIAL).
|
||||
*/
|
||||
static int uart00_verify_port(struct uart_port *port, struct serial_struct *ser)
|
||||
{
|
||||
int ret = 0;
|
||||
if (ser->type != PORT_UNKNOWN && ser->type != PORT_UART00)
|
||||
ret = -EINVAL;
|
||||
if (ser->irq < 0 || ser->irq >= NR_IRQS)
|
||||
ret = -EINVAL;
|
||||
if (ser->baud_base < 9600)
|
||||
ret = -EINVAL;
|
||||
return ret;
|
||||
}
|
||||
|
||||
static struct uart_ops uart00_pops = {
|
||||
.tx_empty = uart00_tx_empty,
|
||||
.set_mctrl = uart00_set_mctrl_null,
|
||||
.get_mctrl = uart00_get_mctrl,
|
||||
.stop_tx = uart00_stop_tx,
|
||||
.start_tx = uart00_start_tx,
|
||||
.stop_rx = uart00_stop_rx,
|
||||
.enable_ms = uart00_enable_ms,
|
||||
.break_ctl = uart00_break_ctl,
|
||||
.startup = uart00_startup,
|
||||
.shutdown = uart00_shutdown,
|
||||
.set_termios = uart00_set_termios,
|
||||
.type = uart00_type,
|
||||
.release_port = uart00_release_port,
|
||||
.request_port = uart00_request_port,
|
||||
.config_port = uart00_config_port,
|
||||
.verify_port = uart00_verify_port,
|
||||
};
|
||||
|
||||
|
||||
#ifdef CONFIG_ARCH_CAMELOT
|
||||
static struct uart_port epxa10db_port = {
|
||||
.membase = (void*)IO_ADDRESS(EXC_UART00_BASE),
|
||||
.mapbase = EXC_UART00_BASE,
|
||||
.iotype = SERIAL_IO_MEM,
|
||||
.irq = IRQ_UART,
|
||||
.uartclk = EXC_AHB2_CLK_FREQUENCY,
|
||||
.fifosize = 16,
|
||||
.ops = &uart00_pops,
|
||||
.flags = ASYNC_BOOT_AUTOCONF,
|
||||
};
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef CONFIG_SERIAL_UART00_CONSOLE
|
||||
static void uart00_console_write(struct console *co, const char *s, unsigned count)
|
||||
{
|
||||
#ifdef CONFIG_ARCH_CAMELOT
|
||||
struct uart_port *port = &epxa10db_port;
|
||||
unsigned int status, old_ies;
|
||||
int i;
|
||||
|
||||
/*
|
||||
* First save the CR then disable the interrupts
|
||||
*/
|
||||
old_ies = UART_GET_IES(port);
|
||||
UART_PUT_IEC(port,0xff);
|
||||
|
||||
/*
|
||||
* Now, do each character
|
||||
*/
|
||||
for (i = 0; i < count; i++) {
|
||||
do {
|
||||
status = UART_GET_TSR(port);
|
||||
} while (!UART_TX_READY(status));
|
||||
UART_PUT_CHAR(port, s[i]);
|
||||
if (s[i] == '\n') {
|
||||
do {
|
||||
status = UART_GET_TSR(port);
|
||||
} while (!UART_TX_READY(status));
|
||||
UART_PUT_CHAR(port, '\r');
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Finally, wait for transmitter to become empty
|
||||
* and restore the IES
|
||||
*/
|
||||
do {
|
||||
status = UART_GET_TSR(port);
|
||||
} while (status & UART_TSR_TX_LEVEL_MSK);
|
||||
UART_PUT_IES(port, old_ies);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void __init
|
||||
uart00_console_get_options(struct uart_port *port, int *baud,
|
||||
int *parity, int *bits)
|
||||
{
|
||||
unsigned int uart_mc, quot;
|
||||
|
||||
uart_mc = UART_GET_MC(port);
|
||||
|
||||
*parity = 'n';
|
||||
if (uart_mc & UART_MC_PE_MSK) {
|
||||
if (uart_mc & UART_MC_EP_MSK)
|
||||
*parity = 'e';
|
||||
else
|
||||
*parity = 'o';
|
||||
}
|
||||
|
||||
switch (uart_mc & UART_MC_CLS_MSK) {
|
||||
case UART_MC_CLS_CHARLEN_5:
|
||||
*bits = 5;
|
||||
break;
|
||||
case UART_MC_CLS_CHARLEN_6:
|
||||
*bits = 6;
|
||||
break;
|
||||
case UART_MC_CLS_CHARLEN_7:
|
||||
*bits = 7;
|
||||
break;
|
||||
case UART_MC_CLS_CHARLEN_8:
|
||||
*bits = 8;
|
||||
break;
|
||||
}
|
||||
quot = UART_GET_DIV_LO(port) | (UART_GET_DIV_HI(port) << 8);
|
||||
*baud = port->uartclk / (16 *quot );
|
||||
}
|
||||
|
||||
static int __init uart00_console_setup(struct console *co, char *options)
|
||||
{
|
||||
struct uart_port *port;
|
||||
int baud = 115200;
|
||||
int bits = 8;
|
||||
int parity = 'n';
|
||||
int flow = 'n';
|
||||
|
||||
#ifdef CONFIG_ARCH_CAMELOT
|
||||
port = &epxa10db_port; ;
|
||||
#else
|
||||
return -ENODEV;
|
||||
#endif
|
||||
if (options)
|
||||
uart_parse_options(options, &baud, &parity, &bits, &flow);
|
||||
else
|
||||
uart00_console_get_options(port, &baud, &parity, &bits);
|
||||
|
||||
return uart_set_options(port, co, baud, parity, bits, flow);
|
||||
}
|
||||
|
||||
extern struct uart_driver uart00_reg;
|
||||
static struct console uart00_console = {
|
||||
.name = SERIAL_UART00_NAME,
|
||||
.write = uart00_console_write,
|
||||
.device = uart_console_device,
|
||||
.setup = uart00_console_setup,
|
||||
.flags = CON_PRINTBUFFER,
|
||||
.index = 0,
|
||||
.data = &uart00_reg,
|
||||
};
|
||||
|
||||
static int __init uart00_console_init(void)
|
||||
{
|
||||
register_console(&uart00_console);
|
||||
return 0;
|
||||
}
|
||||
console_initcall(uart00_console_init);
|
||||
|
||||
#define UART00_CONSOLE &uart00_console
|
||||
#else
|
||||
#define UART00_CONSOLE NULL
|
||||
#endif
|
||||
|
||||
static struct uart_driver uart00_reg = {
|
||||
.owner = NULL,
|
||||
.driver_name = SERIAL_UART00_NAME,
|
||||
.dev_name = SERIAL_UART00_NAME,
|
||||
.major = SERIAL_UART00_MAJOR,
|
||||
.minor = SERIAL_UART00_MINOR,
|
||||
.nr = UART_NR,
|
||||
.cons = UART00_CONSOLE,
|
||||
};
|
||||
|
||||
struct dev_port_entry{
|
||||
unsigned int base_addr;
|
||||
struct uart_port *port;
|
||||
};
|
||||
|
||||
#ifdef CONFIG_PLD_HOTSWAP
|
||||
|
||||
static struct dev_port_entry dev_port_map[UART_NR];
|
||||
|
||||
/*
|
||||
* Keep a mapping of dev_info addresses -> port lines to use when
|
||||
* removing ports dev==NULL indicates unused entry
|
||||
*/
|
||||
|
||||
struct uart00_ps_data{
|
||||
unsigned int clk;
|
||||
unsigned int fifosize;
|
||||
};
|
||||
|
||||
int uart00_add_device(struct pldhs_dev_info* dev_info, void* dev_ps_data)
|
||||
{
|
||||
struct uart00_ps_data* dev_ps=dev_ps_data;
|
||||
struct uart_port * port;
|
||||
int i,result;
|
||||
|
||||
i=0;
|
||||
while(dev_port_map[i].port)
|
||||
i++;
|
||||
|
||||
if(i==UART_NR){
|
||||
printk(KERN_WARNING "uart00: Maximum number of ports reached\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
port=kmalloc(sizeof(struct uart_port),GFP_KERNEL);
|
||||
if(!port)
|
||||
return -ENOMEM;
|
||||
|
||||
printk("clk=%d fifo=%d\n",dev_ps->clk,dev_ps->fifosize);
|
||||
port->membase=0;
|
||||
port->mapbase=dev_info->base_addr;
|
||||
port->iotype=SERIAL_IO_MEM;
|
||||
port->irq=dev_info->irq;
|
||||
port->uartclk=dev_ps->clk;
|
||||
port->fifosize=dev_ps->fifosize;
|
||||
port->ops=&uart00_pops;
|
||||
port->line=i;
|
||||
port->flags=ASYNC_BOOT_AUTOCONF;
|
||||
|
||||
result=uart_add_one_port(&uart00_reg, port);
|
||||
if(result){
|
||||
printk("uart_add_one_port returned %d\n",result);
|
||||
return result;
|
||||
}
|
||||
dev_port_map[i].base_addr=dev_info->base_addr;
|
||||
dev_port_map[i].port=port;
|
||||
printk("uart00: added device at %x as ttyUA%d\n",dev_port_map[i].base_addr,i);
|
||||
return 0;
|
||||
|
||||
}
|
||||
|
||||
int uart00_remove_devices(void)
|
||||
{
|
||||
int i,result;
|
||||
|
||||
|
||||
result=0;
|
||||
for(i=1;i<UART_NR;i++){
|
||||
if(dev_port_map[i].base_addr){
|
||||
result=uart_remove_one_port(&uart00_reg, dev_port_map[i].port);
|
||||
if(result)
|
||||
return result;
|
||||
|
||||
/* port removed sucessfully, so now tidy up */
|
||||
kfree(dev_port_map[i].port);
|
||||
dev_port_map[i].base_addr=0;
|
||||
dev_port_map[i].port=NULL;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
|
||||
}
|
||||
|
||||
struct pld_hotswap_ops uart00_pldhs_ops={
|
||||
.name = "uart00",
|
||||
.add_device = uart00_add_device,
|
||||
.remove_devices = uart00_remove_devices,
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
static int __init uart00_init(void)
|
||||
{
|
||||
int result;
|
||||
|
||||
printk(KERN_INFO "Serial: UART00 driver $Revision: 1.35 $\n");
|
||||
|
||||
printk(KERN_WARNING "serial_uart00:Using temporary major/minor pairs"
|
||||
" - these WILL change in the future\n");
|
||||
|
||||
result = uart_register_driver(&uart00_reg);
|
||||
if (result)
|
||||
return result;
|
||||
#ifdef CONFIG_ARCH_CAMELOT
|
||||
result = uart_add_one_port(&uart00_reg,&epxa10db_port);
|
||||
#endif
|
||||
if (result)
|
||||
uart_unregister_driver(&uart00_reg);
|
||||
|
||||
#ifdef CONFIG_PLD_HOTSWAP
|
||||
pldhs_register_driver(&uart00_pldhs_ops);
|
||||
#endif
|
||||
return result;
|
||||
}
|
||||
|
||||
__initcall(uart00_init);
|
|
@ -50,7 +50,6 @@
|
|||
#include <linux/init.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/system.h>
|
||||
#include <asm/uaccess.h>
|
||||
|
|
|
@ -178,7 +178,6 @@
|
|||
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/uaccess.h>
|
||||
#include <asm/arch/assabet.h>
|
||||
|
@ -1455,7 +1454,11 @@ static struct sa1100fb_info * __init sa1100fb_init_fbinfo(struct device *dev)
|
|||
static int __init sa1100fb_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct sa1100fb_info *fbi;
|
||||
int ret;
|
||||
int ret, irq;
|
||||
|
||||
irq = platform_get_irq(pdev, 0);
|
||||
if (irq <= 0)
|
||||
return -EINVAL;
|
||||
|
||||
if (!request_mem_region(0xb0100000, 0x10000, "LCD"))
|
||||
return -EBUSY;
|
||||
|
@ -1470,7 +1473,7 @@ static int __init sa1100fb_probe(struct platform_device *pdev)
|
|||
if (ret)
|
||||
goto failed;
|
||||
|
||||
ret = request_irq(IRQ_LCD, sa1100fb_handle_irq, SA_INTERRUPT,
|
||||
ret = request_irq(irq, sa1100fb_handle_irq, SA_INTERRUPT,
|
||||
"LCD", fbi);
|
||||
if (ret) {
|
||||
printk(KERN_ERR "sa1100fb: request_irq failed: %d\n", ret);
|
||||
|
@ -1492,7 +1495,7 @@ static int __init sa1100fb_probe(struct platform_device *pdev)
|
|||
|
||||
ret = register_framebuffer(&fbi->fb);
|
||||
if (ret < 0)
|
||||
goto failed;
|
||||
goto err_free_irq;
|
||||
|
||||
#ifdef CONFIG_CPU_FREQ
|
||||
fbi->freq_transition.notifier_call = sa1100fb_freq_transition;
|
||||
|
@ -1504,7 +1507,9 @@ static int __init sa1100fb_probe(struct platform_device *pdev)
|
|||
/* This driver cannot be unloaded at the moment */
|
||||
return 0;
|
||||
|
||||
failed:
|
||||
err_free_irq:
|
||||
free_irq(irq, fbi);
|
||||
failed:
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
kfree(fbi);
|
||||
release_mem_region(0xb0100000, 0x10000);
|
||||
|
|
|
@ -21,26 +21,30 @@ config ACORN_PARTITION
|
|||
Support hard disks partitioned under Acorn operating systems.
|
||||
|
||||
config ACORN_PARTITION_CUMANA
|
||||
bool "Cumana partition support" if PARTITION_ADVANCED && ACORN_PARTITION
|
||||
bool "Cumana partition support" if PARTITION_ADVANCED
|
||||
default y if ARCH_ACORN
|
||||
depends on ACORN_PARTITION
|
||||
help
|
||||
Say Y here if you would like to use hard disks under Linux which
|
||||
were partitioned using the Cumana interface on Acorn machines.
|
||||
|
||||
config ACORN_PARTITION_EESOX
|
||||
bool "EESOX partition support" if PARTITION_ADVANCED && ACORN_PARTITION
|
||||
bool "EESOX partition support" if PARTITION_ADVANCED
|
||||
default y if ARCH_ACORN
|
||||
depends on ACORN_PARTITION
|
||||
|
||||
config ACORN_PARTITION_ICS
|
||||
bool "ICS partition support" if PARTITION_ADVANCED && ACORN_PARTITION
|
||||
bool "ICS partition support" if PARTITION_ADVANCED
|
||||
default y if ARCH_ACORN
|
||||
depends on ACORN_PARTITION
|
||||
help
|
||||
Say Y here if you would like to use hard disks under Linux which
|
||||
were partitioned using the ICS interface on Acorn machines.
|
||||
|
||||
config ACORN_PARTITION_ADFS
|
||||
bool "Native filecore partition support" if PARTITION_ADVANCED && ACORN_PARTITION
|
||||
bool "Native filecore partition support" if PARTITION_ADVANCED
|
||||
default y if ARCH_ACORN
|
||||
depends on ACORN_PARTITION
|
||||
help
|
||||
The Acorn Disc Filing System is the standard file system of the
|
||||
RiscOS operating system which runs on Acorn's ARM-based Risc PC
|
||||
|
@ -48,15 +52,17 @@ config ACORN_PARTITION_ADFS
|
|||
`Y' here, Linux will support disk partitions created under ADFS.
|
||||
|
||||
config ACORN_PARTITION_POWERTEC
|
||||
bool "PowerTec partition support" if PARTITION_ADVANCED && ACORN_PARTITION
|
||||
bool "PowerTec partition support" if PARTITION_ADVANCED
|
||||
default y if ARCH_ACORN
|
||||
depends on ACORN_PARTITION
|
||||
help
|
||||
Support reading partition tables created on Acorn machines using
|
||||
the PowerTec SCSI drive.
|
||||
|
||||
config ACORN_PARTITION_RISCIX
|
||||
bool "RISCiX partition support" if PARTITION_ADVANCED && ACORN_PARTITION
|
||||
bool "RISCiX partition support" if PARTITION_ADVANCED
|
||||
default y if ARCH_ACORN
|
||||
depends on ACORN_PARTITION
|
||||
help
|
||||
Once upon a time, there was a native Unix port for the Acorn series
|
||||
of machines called RISCiX. If you say 'Y' here, Linux will be able
|
||||
|
@ -224,5 +230,3 @@ config EFI_PARTITION
|
|||
Say Y here if you would like to use hard disks under Linux which
|
||||
were partitioned using EFI GPT. Presently only useful on the
|
||||
IA-64 platform.
|
||||
|
||||
# define_bool CONFIG_ACORN_PARTITION_CUMANA y
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue