ppc: rename pci_assign_all_busses to pci_assign_all_buses
... for consistency with ppc64 and to make merging easier. Signed-off-by: Paul Mackerras <paulus@samba.org>
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@ -608,7 +608,7 @@ static inline void grackle_set_loop_snoop(struct pci_controller *bp, int enable)
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static int __init
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setup_uninorth(struct pci_controller* hose, struct reg_property* addr)
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{
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pci_assign_all_busses = 1;
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pci_assign_all_buses = 1;
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has_uninorth = 1;
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hose->ops = ¯isc_pci_ops;
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hose->cfg_addr = ioremap(addr->address + 0x800000, 0x1000);
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@ -640,7 +640,7 @@ static void __init setup_u3_agp(struct pci_controller* hose)
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{
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/* On G5, we move AGP up to high bus number so we don't need
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* to reassign bus numbers for HT. If we ever have P2P bridges
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* on AGP, we'll have to move pci_assign_all_busses to the
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* on AGP, we'll have to move pci_assign_all_buses to the
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* pci_controller structure so we enable it for AGP and not for
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* HT childs.
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* We hard code the address because of the different size of
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@ -1007,7 +1007,7 @@ void __init pmac_find_bridges(void)
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* some offset between bus number and domains for now when we
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* assign all busses should help for now
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*/
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if (pci_assign_all_busses)
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if (pci_assign_all_buses)
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pcibios_assign_bus_offset = 0x10;
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}
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@ -54,7 +54,7 @@ static u8* pci_to_OF_bus_map;
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/* By default, we don't re-assign bus numbers. We do this only on
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* some pmacs
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*/
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int pci_assign_all_busses;
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int pci_assign_all_buses;
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struct pci_controller* hose_head;
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struct pci_controller** hose_tail = &hose_head;
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@ -827,7 +827,7 @@ EXPORT_SYMBOL(pci_device_to_OF_node);
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* PCI bus numbers have not yet been assigned, and you need to
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* issue PCI config cycles to an OF device.
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* It could also be used to "fix" RTAS config cycles if you want
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* to set pci_assign_all_busses to 1 and still use RTAS for PCI
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* to set pci_assign_all_buses to 1 and still use RTAS for PCI
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* config cycles.
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*/
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struct pci_controller*
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@ -1270,12 +1270,12 @@ pcibios_init(void)
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/* Scan all of the recorded PCI controllers. */
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for (next_busno = 0, hose = hose_head; hose; hose = hose->next) {
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if (pci_assign_all_busses)
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if (pci_assign_all_buses)
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hose->first_busno = next_busno;
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hose->last_busno = 0xff;
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bus = pci_scan_bus(hose->first_busno, hose->ops, hose);
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hose->last_busno = bus->subordinate;
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if (pci_assign_all_busses || next_busno <= hose->last_busno)
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if (pci_assign_all_buses || next_busno <= hose->last_busno)
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next_busno = hose->last_busno + pcibios_assign_bus_offset;
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}
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pci_bus_count = next_busno;
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@ -1284,7 +1284,7 @@ pcibios_init(void)
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* numbers vs. kernel bus numbers since we may have to
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* remap them.
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*/
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if (pci_assign_all_busses && have_of)
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if (pci_assign_all_buses && have_of)
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pcibios_make_OF_bus_map();
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/* Do machine dependent PCI interrupt routing */
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@ -203,7 +203,7 @@ static void __init setup_peg2(struct pci_controller *hose, struct device_node *d
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printk ("RTAS supporting Pegasos OF not found, please upgrade"
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" your firmware\n");
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}
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pci_assign_all_busses = 1;
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pci_assign_all_buses = 1;
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}
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void __init
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@ -575,7 +575,7 @@ pmac_find_bridges(void)
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* some offset between bus number and domains for now when we
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* assign all busses should help for now
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*/
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if (pci_assign_all_busses)
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if (pci_assign_all_buses)
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pcibios_assign_bus_offset = 0x10;
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#ifdef CONFIG_POWER4
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@ -643,7 +643,7 @@ static inline void grackle_set_loop_snoop(struct pci_controller *bp, int enable)
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static int __init
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setup_uninorth(struct pci_controller* hose, struct reg_property* addr)
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{
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pci_assign_all_busses = 1;
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pci_assign_all_buses = 1;
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has_uninorth = 1;
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hose->ops = ¯isc_pci_ops;
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hose->cfg_addr = ioremap(addr->address + 0x800000, 0x1000);
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@ -677,7 +677,7 @@ setup_u3_agp(struct pci_controller* hose, struct reg_property* addr)
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{
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/* On G5, we move AGP up to high bus number so we don't need
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* to reassign bus numbers for HT. If we ever have P2P bridges
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* on AGP, we'll have to move pci_assign_all_busses to the
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* on AGP, we'll have to move pci_assign_all_buses to the
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* pci_controller structure so we enable it for AGP and not for
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* HT childs.
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* We hard code the address because of the different size of
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@ -302,7 +302,7 @@ pq2ads_setup_pci(struct pci_controller *hose)
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void __init pq2_find_bridges(void)
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{
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extern int pci_assign_all_busses;
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extern int pci_assign_all_buses;
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struct pci_controller * hose;
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int host_bridge;
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@ -182,7 +182,7 @@ mpc52xx_find_bridges(void)
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struct mpc52xx_pci __iomem *pci_regs;
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struct pci_controller *hose;
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pci_assign_all_busses = 1;
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pci_assign_all_buses = 1;
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pci_regs = ioremap(MPC52xx_PA(MPC52xx_PCI_OFFSET), MPC52xx_PCI_SIZE);
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if (!pci_regs)
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@ -275,7 +275,7 @@ static void __init setup_u3_agp(struct pci_controller* hose)
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{
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/* On G5, we move AGP up to high bus number so we don't need
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* to reassign bus numbers for HT. If we ever have P2P bridges
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* on AGP, we'll have to move pci_assign_all_busses to the
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* on AGP, we'll have to move pci_assign_all_buses to the
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* pci_controller structure so we enable it for AGP and not for
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* HT childs.
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* We hard code the address because of the different size of
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@ -381,7 +381,7 @@ static void __init setup_u3_agp(struct pci_controller* hose)
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{
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/* On G5, we move AGP up to high bus number so we don't need
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* to reassign bus numbers for HT. If we ever have P2P bridges
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* on AGP, we'll have to move pci_assign_all_busses to the
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* on AGP, we'll have to move pci_assign_all_buses to the
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* pci_controller structure so we enable it for AGP and not for
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* HT childs.
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* We hard code the address because of the different size of
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@ -24,9 +24,9 @@ struct pci_dev;
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* Set this to 1 if you want the kernel to re-assign all PCI
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* bus numbers
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*/
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extern int pci_assign_all_busses;
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extern int pci_assign_all_buses;
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#define pcibios_assign_all_busses() (pci_assign_all_busses)
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#define pcibios_assign_all_busses() (pci_assign_all_buses)
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#define pcibios_scan_all_fns(a, b) 0
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#define PCIBIOS_MIN_IO 0x1000
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