MLK-16097-2 PCI: imx: specify the imx8qxp form imx8qm
On iMX8QM, functions of PCIEB relied on PCIEA. But PCIEB used on iMX8QXP can work standalone. Specify the iMX8QXP PCIE in driver. Up to now, only iMX6QP PCIE may use the EXT OSC, specify the EXT/EXT_SRC clocks for iMX6QP only. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>pull/10/head
Richard Zhu
Jason Liu
parent
842863d3b5
commit
39c0773811
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@ -47,6 +47,7 @@ enum imx6_pcie_variants {
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IMX6QP,
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IMX7D,
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IMX8QM,
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IMX8QXP,
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IMX8MQ,
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};
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@ -439,6 +440,21 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie)
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/* BTNRST */
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regmap_update_bits(imx6_pcie->reg_src, 0x2c, BIT(2), BIT(2));
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break;
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case IMX8QXP:
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val = IMX8QM_CSR_PCIEB_OFFSET;
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regmap_update_bits(imx6_pcie->iomuxc_gpr,
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val + IMX8QM_CSR_PCIE_CTRL2_OFFSET,
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IMX8QM_CTRL_BUTTON_RST_N,
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IMX8QM_CTRL_BUTTON_RST_N);
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regmap_update_bits(imx6_pcie->iomuxc_gpr,
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val + IMX8QM_CSR_PCIE_CTRL2_OFFSET,
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IMX8QM_CTRL_PERST_N,
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IMX8QM_CTRL_PERST_N);
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regmap_update_bits(imx6_pcie->iomuxc_gpr,
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val + IMX8QM_CSR_PCIE_CTRL2_OFFSET,
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IMX8QM_CTRL_POWER_UP_RST_N,
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IMX8QM_CTRL_POWER_UP_RST_N);
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break;
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case IMX8QM:
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for (i = 0; i <= imx6_pcie->ctrl_id; i++) {
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val = IMX8QM_CSR_PCIEA_OFFSET + i * SZ_64K;
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@ -514,6 +530,7 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie)
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case IMX7D:
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case IMX8MQ:
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break;
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case IMX8QXP:
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case IMX8QM:
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ret = clk_prepare_enable(imx6_pcie->pcie_inbound_axi);
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if (ret) {
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@ -646,7 +663,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)
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goto err_pcie;
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}
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if (imx6_pcie->ext_osc && (imx6_pcie->variant != IMX8QM)) {
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if (imx6_pcie->ext_osc && (imx6_pcie->variant == IMX6QP)) {
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clk_set_parent(imx6_pcie->pcie_ext,
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imx6_pcie->pcie_ext_src);
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ret = clk_prepare_enable(imx6_pcie->pcie_ext);
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@ -746,6 +763,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)
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if (imx7d_pcie_wait_for_phy_pll_lock(imx6_pcie))
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ret = -ENODEV;
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break;
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case IMX8QXP:
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case IMX8QM:
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/* bit19 PM_REQ_CORE_RST of pciex#_stts0 should be cleared. */
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for (i = 0; i < 100; i++) {
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@ -798,7 +816,8 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)
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err_ref_clk:
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clk_disable_unprepare(imx6_pcie->pcie_phy);
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err_pcie_phy:
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if (!imx6_pcie->ext_osc || (imx6_pcie->variant == IMX8QM))
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if (!imx6_pcie->ext_osc || (imx6_pcie->variant == IMX8QM)
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|| (imx6_pcie->variant == IMX8QXP))
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clk_disable_unprepare(imx6_pcie->pcie_bus);
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err_pcie_bus:
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clk_disable_unprepare(imx6_pcie->pcie);
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@ -912,7 +931,8 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie)
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u32 tmp, val;
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int ret;
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if (imx6_pcie->variant == IMX8QM) {
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if (imx6_pcie->variant == IMX8QM
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|| imx6_pcie->variant == IMX8QXP) {
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switch (imx6_pcie->hsio_cfg) {
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case PCIEAX2SATA:
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/*
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@ -1082,7 +1102,8 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie)
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/* configure the device type */
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if (IS_ENABLED(CONFIG_EP_MODE_IN_EP_RC_SYS)) {
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if (imx6_pcie->variant == IMX8QM) {
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if (imx6_pcie->variant == IMX8QM
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|| imx6_pcie->variant == IMX8QXP) {
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val = IMX8QM_CSR_PCIEA_OFFSET
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+ imx6_pcie->ctrl_id * SZ_64K;
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regmap_update_bits(imx6_pcie->iomuxc_gpr,
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@ -1102,7 +1123,8 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie)
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PCI_EXP_TYPE_ENDPOINT << 12);
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}
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} else {
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if (imx6_pcie->variant == IMX8QM) {
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if (imx6_pcie->variant == IMX8QM
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|| imx6_pcie->variant == IMX8QXP) {
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val = IMX8QM_CSR_PCIEA_OFFSET
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+ imx6_pcie->ctrl_id * SZ_64K;
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regmap_update_bits(imx6_pcie->iomuxc_gpr,
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@ -1194,7 +1216,7 @@ static int imx6_pcie_establish_link(struct imx6_pcie *imx6_pcie)
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}
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/* Start LTSSM. */
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if (imx6_pcie->variant == IMX8QM) {
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if (imx6_pcie->variant == IMX8QM || imx6_pcie->variant == IMX8QXP) {
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/* Bit4 of the CTRL2 */
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tmp = IMX8QM_CSR_PCIEA_OFFSET
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+ imx6_pcie->ctrl_id * SZ_64K;
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@ -1273,15 +1295,19 @@ err_reset_phy:
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if (!IS_ENABLED(CONFIG_PCI_IMX6_COMPLIANCE_TEST)) {
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clk_disable_unprepare(imx6_pcie->pcie);
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if (!imx6_pcie->ext_osc || (imx6_pcie->variant == IMX8QM))
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if (!imx6_pcie->ext_osc
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|| (imx6_pcie->variant == IMX8QXP)
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|| (imx6_pcie->variant == IMX8QM))
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clk_disable_unprepare(imx6_pcie->pcie_bus);
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clk_disable_unprepare(imx6_pcie->pcie_phy);
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if (imx6_pcie->variant == IMX6SX
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|| imx6_pcie->variant == IMX8QXP
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|| imx6_pcie->variant == IMX8QM)
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clk_disable_unprepare(imx6_pcie->pcie_inbound_axi);
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release_bus_freq(BUS_FREQ_HIGH);
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if ((imx6_pcie->variant == IMX7D)
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|| (imx6_pcie->variant == IMX8QM))
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|| (imx6_pcie->variant == IMX8QM)
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|| (imx6_pcie->variant == IMX8QXP))
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pm_runtime_put_sync(pci->dev);
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if (imx6_pcie->variant == IMX8MQ)
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imx6_pcie_phy_pwr_dn(imx6_pcie);
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@ -1301,7 +1327,8 @@ static int imx6_pcie_host_init(struct pcie_port *pp)
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struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci);
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/* enable disp_mix power domain */
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if ((imx6_pcie->variant == IMX7D) || (imx6_pcie->variant == IMX8QM))
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if ((imx6_pcie->variant == IMX7D) || (imx6_pcie->variant == IMX8QM)
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|| (imx6_pcie->variant == IMX8QXP))
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pm_runtime_get_sync(pci->dev);
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imx6_pcie_assert_core_reset(imx6_pcie);
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@ -1316,7 +1343,7 @@ static int imx6_pcie_host_init(struct pcie_port *pp)
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else
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pp->cpu_addr_offset = 0;
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if (imx6_pcie->variant == IMX8QM) {
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if (imx6_pcie->variant == IMX8QM || imx6_pcie->variant == IMX8QXP) {
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if (dw_pcie_readl_dbi(pci, PCIE_MISC_CTRL) == 0)
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dw_pcie_writel_dbi(pci, PCIE_MISC_CTRL,
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PCIE_MISC_DBI_RO_WR_EN);
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@ -1614,13 +1641,17 @@ static int pci_imx_suspend_noirq(struct device *dev)
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pci_imx_pm_turn_off(imx6_pcie);
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if (imx6_pcie->variant == IMX7D || imx6_pcie->variant == IMX6SX ||
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imx6_pcie->variant == IMX6QP || imx6_pcie->variant == IMX8QM) {
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imx6_pcie->variant == IMX6QP || imx6_pcie->variant == IMX8QM
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|| imx6_pcie->variant == IMX8QXP) {
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/* Disable clks */
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clk_disable_unprepare(imx6_pcie->pcie);
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clk_disable_unprepare(imx6_pcie->pcie_phy);
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if (!imx6_pcie->ext_osc || (imx6_pcie->variant == IMX8QM))
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if (!imx6_pcie->ext_osc
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|| (imx6_pcie->variant == IMX8QXP)
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|| (imx6_pcie->variant == IMX8QM))
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clk_disable_unprepare(imx6_pcie->pcie_bus);
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if (imx6_pcie->variant == IMX6SX
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|| imx6_pcie->variant == IMX8QXP
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|| imx6_pcie->variant == IMX8QM)
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clk_disable_unprepare(imx6_pcie->pcie_inbound_axi);
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else if (imx6_pcie->variant == IMX7D)
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@ -1666,8 +1697,10 @@ static int pci_imx_resume_noirq(struct device *dev)
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struct pcie_port *pp = &imx6_pcie->pci->pp;
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if (imx6_pcie->variant == IMX7D || imx6_pcie->variant == IMX6SX ||
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imx6_pcie->variant == IMX6QP || imx6_pcie->variant == IMX8QM) {
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if (imx6_pcie->variant == IMX8QM) {
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imx6_pcie->variant == IMX6QP || imx6_pcie->variant == IMX8QXP
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|| imx6_pcie->variant == IMX8QM) {
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if (imx6_pcie->variant == IMX8QM
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|| imx6_pcie->variant == IMX8QXP) {
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/* Bit4 of the CTRL2 */
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val = IMX8QM_CSR_PCIEA_OFFSET
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+ imx6_pcie->ctrl_id * SZ_64K;
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@ -1695,7 +1728,8 @@ static int pci_imx_resume_noirq(struct device *dev)
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if (IS_ENABLED(CONFIG_PCI_MSI))
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dw_pcie_msi_cfg_restore(pp);
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if (imx6_pcie->variant == IMX8QM) {
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if (imx6_pcie->variant == IMX8QM
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|| imx6_pcie->variant == IMX8QXP) {
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/* wait for phy pll lock firstly. */
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imx8_pcie_wait_for_phy_pll_lock(imx6_pcie);
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@ -1860,7 +1894,7 @@ static int __init imx6_pcie_probe(struct platform_device *pdev)
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if (of_property_read_u32(node, "ext_osc", &imx6_pcie->ext_osc) < 0)
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imx6_pcie->ext_osc = 0;
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if (imx6_pcie->ext_osc && (imx6_pcie->variant != IMX8QM)) {
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if (imx6_pcie->ext_osc && (imx6_pcie->variant == IMX6QP)) {
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imx6_pcie->pcie_ext = devm_clk_get(&pdev->dev, "pcie_ext");
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if (IS_ERR(imx6_pcie->pcie_ext)) {
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dev_err(&pdev->dev,
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@ -1939,7 +1973,8 @@ static int __init imx6_pcie_probe(struct platform_device *pdev)
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imx6_pcie->iomuxc_gpr =
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syscon_regmap_lookup_by_compatible
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("fsl,imx6sx-iomuxc-gpr");
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} else if (imx6_pcie->variant == IMX8QM) {
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} else if (imx6_pcie->variant == IMX8QM
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|| imx6_pcie->variant == IMX8QXP) {
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imx6_pcie->iomuxc_gpr =
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syscon_regmap_lookup_by_phandle(node, "hsio");
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imx6_pcie->pcie_inbound_axi = devm_clk_get(&pdev->dev,
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@ -2056,7 +2091,8 @@ static int __init imx6_pcie_probe(struct platform_device *pdev)
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BIT(19), 0 << 19);
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/* assert LTSSM enable */
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if (imx6_pcie->variant == IMX8QM) {
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if (imx6_pcie->variant == IMX8QM
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|| imx6_pcie->variant == IMX8QXP) {
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/* Bit4 of the CTRL2 */
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val = IMX8QM_CSR_PCIEA_OFFSET
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+ imx6_pcie->ctrl_id * SZ_64K;
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@ -2179,8 +2215,7 @@ static void imx6_pcie_shutdown(struct platform_device *pdev)
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struct imx6_pcie *imx6_pcie = platform_get_drvdata(pdev);
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/* bring down link, so bootloader gets clean state in case of reboot */
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if (imx6_pcie->variant != IMX8QM)
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imx6_pcie_assert_core_reset(imx6_pcie);
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imx6_pcie_assert_core_reset(imx6_pcie);
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}
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static const struct of_device_id imx6_pcie_of_match[] = {
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@ -2189,6 +2224,7 @@ static const struct of_device_id imx6_pcie_of_match[] = {
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{ .compatible = "fsl,imx6qp-pcie", .data = (void *)IMX6QP, },
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{ .compatible = "fsl,imx7d-pcie", .data = (void *)IMX7D, },
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{ .compatible = "fsl,imx8qm-pcie", .data = (void *)IMX8QM, },
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{ .compatible = "fsl,imx8qxp-pcie", .data = (void *)IMX8QXP, },
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{ .compatible = "fsl,imx8mq-pcie", .data = (void *)IMX8MQ, },
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{},
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};
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