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MLK-18381-2 clk: imx8mm: add the mu root clk 

- mu is used by rpmsg on imx8mm, add the mu root clk.
- check the m4 is enable or not.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
pull/10/head
Richard Zhu 2018-05-21 11:01:48 +08:00 committed by Jason Liu
parent af573c0826
commit 3a619580a6
2 changed files with 6 additions and 1 deletions
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4
drivers/clk/imx/clk-imx8mm.c
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@ -19,6 +19,7 @@
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/types.h>
#include <soc/imx8/soc.h>
#include "clk.h"
@ -394,6 +395,8 @@ static void __init imx8mm_clocks_init(struct device_node *ccm_node)
void __iomem *base;
int i;
check_m4_enabled();
clks[IMX8MM_CLK_DUMMY] = imx_clk_fixed("dummy", 0);
clks[IMX8MM_CLK_24M] = of_clk_get_by_name(ccm_node, "osc_24m");
clks[IMX8MM_CLK_32K] = of_clk_get_by_name(ccm_node, "osc_32k"); /* Check more */
@ -833,6 +836,7 @@ static void __init imx8mm_clocks_init(struct device_node *ccm_node)
clks[IMX8MM_CLK_I2C2_ROOT] = imx_clk_gate4("i2c2_root_clk", "i2c2_div", base + 0x4180, 0);
clks[IMX8MM_CLK_I2C3_ROOT] = imx_clk_gate4("i2c3_root_clk", "i2c3_div", base + 0x4190, 0);
clks[IMX8MM_CLK_I2C4_ROOT] = imx_clk_gate4("i2c4_root_clk", "i2c4_div", base + 0x41a0, 0);
clks[IMX8MM_CLK_MU_ROOT] = imx_clk_gate4("mu_root_clk", "ipg_root", base + 0x4210, 0);
clks[IMX8MM_CLK_OCOTP_ROOT] = imx_clk_gate4("ocotp_root_clk", "ipg_root", base + 0x4220, 0);
clks[IMX8MM_CLK_PCIE1_ROOT] = imx_clk_gate4("pcie1_root_clk", "pcie1_ctrl_div", base + 0x4250, 0);
clks[IMX8MM_CLK_PWM1_ROOT] = imx_clk_gate4("pwm1_root_clk", "pwm1_div", base + 0x4280, 0);

3
include/dt-bindings/clock/imx8mm-clock.h
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@ -456,6 +456,7 @@
#define IMX8MM_CLK_ARM 444
#define IMX8MM_CLK_PDM_IPG 445
#define IMX8MM_CLK_GPU2D_ROOT 446
#define IMX8MM_CLK_MU_ROOT 447
#define IMX8MM_CLK_END 447
#define IMX8MM_CLK_END 448
#endif