[PATCH] i386: Implement X86_FEATURE_SYNC_RDTSC on i386
Syncs up with x86-64. Signed-off-by: Andi Kleen <ak@suse.de>
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@ -188,8 +188,10 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
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}
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#endif
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if (c->x86 == 15)
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if (c->x86 == 15) {
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set_bit(X86_FEATURE_P4, c->x86_capability);
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set_bit(X86_FEATURE_SYNC_RDTSC, c->x86_capability);
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}
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if (c->x86 == 6)
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set_bit(X86_FEATURE_P3, c->x86_capability);
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if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
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@ -79,6 +79,7 @@
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#define X86_FEATURE_PEBS (3*32+12) /* Precise-Event Based Sampling */
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#define X86_FEATURE_BTS (3*32+13) /* Branch Trace Store */
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#define X86_FEATURE_LAPIC_TIMER_BROKEN (3*32+ 14) /* lapic timer broken in C1 */
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#define X86_FEATURE_SYNC_RDTSC (3*32+15) /* RDTSC synchronizes the CPU */
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/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
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#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */
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@ -35,7 +35,6 @@ static inline cycles_t get_cycles(void)
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static __always_inline cycles_t get_cycles_sync(void)
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{
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unsigned long long ret;
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#ifdef X86_FEATURE_SYNC_RDTSC
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unsigned eax;
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/*
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@ -44,9 +43,6 @@ static __always_inline cycles_t get_cycles_sync(void)
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*/
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alternative_io("cpuid", ASM_NOP2, X86_FEATURE_SYNC_RDTSC,
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"=a" (eax), "0" (1) : "ebx","ecx","edx","memory");
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#else
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sync_core();
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#endif
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rdtscll(ret);
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return ret;
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