e1000e: cleanup ethtool loopback setup code
Refactor the loopback setup code to first handle the only 10/100 PHY supported by the driver if applicable and then handle the 1Gig PHYs in a switch statement for PHY-specific setups. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Emil Tantilov <emil.s.tantilov@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
20c0da65d7
commit
3af50481ee
|
@ -1263,33 +1263,36 @@ static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
|
|||
|
||||
hw->mac.autoneg = 0;
|
||||
|
||||
/* Workaround: K1 must be disabled for stable 1Gbps operation */
|
||||
if (hw->mac.type == e1000_pchlan)
|
||||
e1000_configure_k1_ich8lan(hw, false);
|
||||
if (hw->phy.type == e1000_phy_ife) {
|
||||
/* force 100, set loopback */
|
||||
e1e_wphy(hw, PHY_CONTROL, 0x6100);
|
||||
|
||||
if (hw->phy.type == e1000_phy_m88) {
|
||||
/* Now set up the MAC to the same speed/duplex as the PHY. */
|
||||
ctrl_reg = er32(CTRL);
|
||||
ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
|
||||
ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
|
||||
E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
|
||||
E1000_CTRL_SPD_100 |/* Force Speed to 100 */
|
||||
E1000_CTRL_FD); /* Force Duplex to FULL */
|
||||
|
||||
ew32(CTRL, ctrl_reg);
|
||||
udelay(500);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Specific PHY configuration for loopback */
|
||||
switch (hw->phy.type) {
|
||||
case e1000_phy_m88:
|
||||
/* Auto-MDI/MDIX Off */
|
||||
e1e_wphy(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
|
||||
/* reset to update Auto-MDI/MDIX */
|
||||
e1e_wphy(hw, PHY_CONTROL, 0x9140);
|
||||
/* autoneg off */
|
||||
e1e_wphy(hw, PHY_CONTROL, 0x8140);
|
||||
} else if (hw->phy.type == e1000_phy_gg82563)
|
||||
break;
|
||||
case e1000_phy_gg82563:
|
||||
e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL, 0x1CC);
|
||||
|
||||
ctrl_reg = er32(CTRL);
|
||||
|
||||
switch (hw->phy.type) {
|
||||
case e1000_phy_ife:
|
||||
/* force 100, set loopback */
|
||||
e1e_wphy(hw, PHY_CONTROL, 0x6100);
|
||||
|
||||
/* Now set up the MAC to the same speed/duplex as the PHY. */
|
||||
ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
|
||||
ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
|
||||
E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
|
||||
E1000_CTRL_SPD_100 |/* Force Speed to 100 */
|
||||
E1000_CTRL_FD); /* Force Duplex to FULL */
|
||||
break;
|
||||
case e1000_phy_bm:
|
||||
/* Set Default MAC Interface speed to 1GB */
|
||||
|
@ -1312,24 +1315,31 @@ static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
|
|||
/* Set Early Link Enable */
|
||||
e1e_rphy(hw, PHY_REG(769, 20), &phy_reg);
|
||||
e1e_wphy(hw, PHY_REG(769, 20), phy_reg | 0x0400);
|
||||
/* fall through */
|
||||
break;
|
||||
case e1000_phy_82577:
|
||||
case e1000_phy_82578:
|
||||
/* Workaround: K1 must be disabled for stable 1Gbps operation */
|
||||
e1000_configure_k1_ich8lan(hw, false);
|
||||
break;
|
||||
default:
|
||||
/* force 1000, set loopback */
|
||||
e1e_wphy(hw, PHY_CONTROL, 0x4140);
|
||||
mdelay(250);
|
||||
|
||||
/* Now set up the MAC to the same speed/duplex as the PHY. */
|
||||
ctrl_reg = er32(CTRL);
|
||||
ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
|
||||
ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
|
||||
E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
|
||||
E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
|
||||
E1000_CTRL_FD); /* Force Duplex to FULL */
|
||||
|
||||
if (adapter->flags & FLAG_IS_ICH)
|
||||
ctrl_reg |= E1000_CTRL_SLU; /* Set Link Up */
|
||||
break;
|
||||
}
|
||||
|
||||
/* force 1000, set loopback */
|
||||
e1e_wphy(hw, PHY_CONTROL, 0x4140);
|
||||
mdelay(250);
|
||||
|
||||
/* Now set up the MAC to the same speed/duplex as the PHY. */
|
||||
ctrl_reg = er32(CTRL);
|
||||
ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
|
||||
ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
|
||||
E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
|
||||
E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
|
||||
E1000_CTRL_FD); /* Force Duplex to FULL */
|
||||
|
||||
if (adapter->flags & FLAG_IS_ICH)
|
||||
ctrl_reg |= E1000_CTRL_SLU; /* Set Link Up */
|
||||
|
||||
if (hw->phy.media_type == e1000_media_type_copper &&
|
||||
hw->phy.type == e1000_phy_m88) {
|
||||
ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
|
||||
|
|
Loading…
Reference in a new issue