gpio/nomadik: disable clocks when unused
The GPIO clock is required for register access and interrupt detection. When interrupt detection is not required on any of the pin in a block, the block's clock can be disabled when the registers are not being accessed. Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Reviewed-by: Rickard Andersson <rickard.andersson@stericsson.com> Reviewed-by: Jonas Aberg <jonas.aberg@stericsson.com> [Adjust for new IRQ chip core code, use only local functions] Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This commit is contained in:
Rabin Vincent
Grant Likely
parent
b6fd41e29d
commit
3c0227d262
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@ -78,6 +78,9 @@ extern int nmk_gpio_get_mode(int gpio);
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extern void nmk_gpio_wakeups_suspend(void);
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extern void nmk_gpio_wakeups_resume(void);
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extern void nmk_gpio_clocks_enable(void);
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extern void nmk_gpio_clocks_disable(void);
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extern void nmk_gpio_read_pull(int gpio_bank, u32 *pull_up);
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/*
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@ -276,6 +276,8 @@ static void nmk_gpio_glitch_slpm_init(unsigned int *slpm)
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if (!chip)
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break;
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clk_enable(chip->clk);
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slpm[i] = readl(chip->addr + NMK_GPIO_SLPC);
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writel(temp, chip->addr + NMK_GPIO_SLPC);
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}
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@ -292,6 +294,8 @@ static void nmk_gpio_glitch_slpm_restore(unsigned int *slpm)
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break;
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writel(slpm[i], chip->addr + NMK_GPIO_SLPC);
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clk_disable(chip->clk);
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}
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}
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@ -336,10 +340,12 @@ static int __nmk_config_pins(pin_cfg_t *cfgs, int num, bool sleep)
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break;
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}
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clk_enable(nmk_chip->clk);
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spin_lock(&nmk_chip->lock);
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__nmk_config_pin(nmk_chip, pin - nmk_chip->chip.base,
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cfgs[i], sleep, glitch ? slpm : NULL);
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spin_unlock(&nmk_chip->lock);
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clk_disable(nmk_chip->clk);
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}
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if (glitch)
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@ -424,6 +430,7 @@ int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode)
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if (!nmk_chip)
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return -EINVAL;
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clk_enable(nmk_chip->clk);
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spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
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spin_lock(&nmk_chip->lock);
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@ -431,6 +438,7 @@ int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode)
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spin_unlock(&nmk_chip->lock);
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spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
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clk_disable(nmk_chip->clk);
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return 0;
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}
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@ -457,9 +465,11 @@ int nmk_gpio_set_pull(int gpio, enum nmk_gpio_pull pull)
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if (!nmk_chip)
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return -EINVAL;
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clk_enable(nmk_chip->clk);
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spin_lock_irqsave(&nmk_chip->lock, flags);
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__nmk_gpio_set_pull(nmk_chip, gpio - nmk_chip->chip.base, pull);
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spin_unlock_irqrestore(&nmk_chip->lock, flags);
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clk_disable(nmk_chip->clk);
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return 0;
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}
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@ -483,9 +493,11 @@ int nmk_gpio_set_mode(int gpio, int gpio_mode)
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if (!nmk_chip)
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return -EINVAL;
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clk_enable(nmk_chip->clk);
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spin_lock_irqsave(&nmk_chip->lock, flags);
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__nmk_gpio_set_mode(nmk_chip, gpio - nmk_chip->chip.base, gpio_mode);
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spin_unlock_irqrestore(&nmk_chip->lock, flags);
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clk_disable(nmk_chip->clk);
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return 0;
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}
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@ -502,9 +514,13 @@ int nmk_gpio_get_mode(int gpio)
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bit = 1 << (gpio - nmk_chip->chip.base);
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clk_enable(nmk_chip->clk);
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afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & bit;
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bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & bit;
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clk_disable(nmk_chip->clk);
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return (afunc ? NMK_GPIO_ALT_A : 0) | (bfunc ? NMK_GPIO_ALT_B : 0);
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}
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EXPORT_SYMBOL(nmk_gpio_get_mode);
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@ -525,7 +541,10 @@ static void nmk_gpio_irq_ack(struct irq_data *d)
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nmk_chip = irq_data_get_irq_chip_data(d);
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if (!nmk_chip)
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return;
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clk_enable(nmk_chip->clk);
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writel(nmk_gpio_get_bitmask(gpio), nmk_chip->addr + NMK_GPIO_IC);
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clk_disable(nmk_chip->clk);
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}
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enum nmk_gpio_irq_type {
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@ -591,6 +610,7 @@ static int nmk_gpio_irq_maskunmask(struct irq_data *d, bool enable)
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else
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nmk_chip->enabled &= ~bitmask;
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clk_enable(nmk_chip->clk);
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spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
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spin_lock(&nmk_chip->lock);
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@ -601,6 +621,7 @@ static int nmk_gpio_irq_maskunmask(struct irq_data *d, bool enable)
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spin_unlock(&nmk_chip->lock);
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spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
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clk_disable(nmk_chip->clk);
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return 0;
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}
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@ -628,6 +649,7 @@ static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
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return -EINVAL;
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bitmask = nmk_gpio_get_bitmask(gpio);
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clk_enable(nmk_chip->clk);
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spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
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spin_lock(&nmk_chip->lock);
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@ -641,13 +663,15 @@ static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
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spin_unlock(&nmk_chip->lock);
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spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
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clk_disable(nmk_chip->clk);
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return 0;
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}
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static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type)
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{
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bool enabled, wake = irqd_is_wakeup_set(d);
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bool enabled;
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bool wake = irqd_is_wakeup_set(d);
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int gpio;
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struct nmk_gpio_chip *nmk_chip;
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unsigned long flags;
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@ -664,10 +688,10 @@ static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type)
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if (type & IRQ_TYPE_LEVEL_LOW)
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return -EINVAL;
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enabled = nmk_chip->enabled & bitmask;
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clk_enable(nmk_chip->clk);
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spin_lock_irqsave(&nmk_chip->lock, flags);
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enabled = !!(nmk_chip->enabled & bitmask);
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if (enabled)
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__nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, false);
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@ -689,10 +713,28 @@ static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type)
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__nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, true);
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spin_unlock_irqrestore(&nmk_chip->lock, flags);
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clk_disable(nmk_chip->clk);
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return 0;
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}
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static unsigned int nmk_gpio_irq_startup(struct irq_data *d)
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{
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struct nmk_gpio_chip *nmk_chip = irq_data_get_irq_chip_data(d);
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clk_enable(nmk_chip->clk);
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nmk_gpio_irq_unmask(d);
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return 0;
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}
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static void nmk_gpio_irq_shutdown(struct irq_data *d)
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{
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struct nmk_gpio_chip *nmk_chip = irq_data_get_irq_chip_data(d);
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nmk_gpio_irq_mask(d);
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clk_disable(nmk_chip->clk);
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}
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static struct irq_chip nmk_gpio_irq_chip = {
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.name = "Nomadik-GPIO",
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.irq_ack = nmk_gpio_irq_ack,
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@ -700,6 +742,8 @@ static struct irq_chip nmk_gpio_irq_chip = {
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.irq_unmask = nmk_gpio_irq_unmask,
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.irq_set_type = nmk_gpio_irq_set_type,
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.irq_set_wake = nmk_gpio_irq_set_wake,
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.irq_startup = nmk_gpio_irq_startup,
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.irq_shutdown = nmk_gpio_irq_shutdown,
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};
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static void __nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc,
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@ -726,7 +770,11 @@ static void __nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc,
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static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
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{
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struct nmk_gpio_chip *nmk_chip = irq_get_handler_data(irq);
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u32 status = readl(nmk_chip->addr + NMK_GPIO_IS);
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u32 status;
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clk_enable(nmk_chip->clk);
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status = readl(nmk_chip->addr + NMK_GPIO_IS);
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clk_disable(nmk_chip->clk);
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__nmk_gpio_irq_handler(irq, desc, status);
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}
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@ -772,7 +820,12 @@ static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset)
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struct nmk_gpio_chip *nmk_chip =
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container_of(chip, struct nmk_gpio_chip, chip);
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clk_enable(nmk_chip->clk);
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writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
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clk_disable(nmk_chip->clk);
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return 0;
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}
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@ -781,8 +834,15 @@ static int nmk_gpio_get_input(struct gpio_chip *chip, unsigned offset)
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struct nmk_gpio_chip *nmk_chip =
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container_of(chip, struct nmk_gpio_chip, chip);
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u32 bit = 1 << offset;
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int value;
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return (readl(nmk_chip->addr + NMK_GPIO_DAT) & bit) != 0;
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clk_enable(nmk_chip->clk);
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value = (readl(nmk_chip->addr + NMK_GPIO_DAT) & bit) != 0;
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clk_disable(nmk_chip->clk);
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return value;
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}
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static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned offset,
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@ -791,7 +851,11 @@ static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned offset,
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struct nmk_gpio_chip *nmk_chip =
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container_of(chip, struct nmk_gpio_chip, chip);
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clk_enable(nmk_chip->clk);
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__nmk_gpio_set_output(nmk_chip, offset, val);
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clk_disable(nmk_chip->clk);
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}
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static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset,
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@ -800,8 +864,12 @@ static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset,
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struct nmk_gpio_chip *nmk_chip =
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container_of(chip, struct nmk_gpio_chip, chip);
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clk_enable(nmk_chip->clk);
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__nmk_gpio_make_output(nmk_chip, offset, val);
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clk_disable(nmk_chip->clk);
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return 0;
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}
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@ -832,6 +900,8 @@ static void nmk_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
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[NMK_GPIO_ALT_C] = "altC",
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};
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clk_enable(nmk_chip->clk);
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for (i = 0; i < chip->ngpio; i++, gpio++) {
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const char *label = gpiochip_is_requested(chip, i);
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bool pull;
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@ -876,6 +946,8 @@ static void nmk_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
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seq_printf(s, "\n");
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}
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clk_disable(nmk_chip->clk);
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}
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#else
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@ -893,6 +965,34 @@ static struct gpio_chip nmk_gpio_template = {
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.can_sleep = 0,
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};
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void nmk_gpio_clocks_enable(void)
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{
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int i;
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for (i = 0; i < NUM_BANKS; i++) {
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struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
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if (!chip)
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continue;
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clk_enable(chip->clk);
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}
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}
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void nmk_gpio_clocks_disable(void)
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{
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int i;
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for (i = 0; i < NUM_BANKS; i++) {
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struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
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if (!chip)
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continue;
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clk_disable(chip->clk);
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}
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}
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/*
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* Called from the suspend/resume path to only keep the real wakeup interrupts
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* (those that have had set_irq_wake() called on them) as wakeup interrupts,
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@ -912,6 +1012,8 @@ void nmk_gpio_wakeups_suspend(void)
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if (!chip)
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break;
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clk_enable(chip->clk);
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chip->rwimsc = readl(chip->addr + NMK_GPIO_RWIMSC);
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chip->fwimsc = readl(chip->addr + NMK_GPIO_FWIMSC);
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@ -926,6 +1028,8 @@ void nmk_gpio_wakeups_suspend(void)
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/* 0 -> wakeup enable */
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writel(~chip->real_wake, chip->addr + NMK_GPIO_SLPC);
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}
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clk_disable(chip->clk);
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}
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}
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@ -939,11 +1043,15 @@ void nmk_gpio_wakeups_resume(void)
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if (!chip)
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break;
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clk_enable(chip->clk);
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writel(chip->rwimsc, chip->addr + NMK_GPIO_RWIMSC);
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writel(chip->fwimsc, chip->addr + NMK_GPIO_FWIMSC);
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if (chip->sleepmode)
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writel(chip->slpm, chip->addr + NMK_GPIO_SLPC);
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clk_disable(chip->clk);
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}
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}
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@ -1010,8 +1118,6 @@ static int __devinit nmk_gpio_probe(struct platform_device *dev)
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goto out_release;
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}
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clk_enable(clk);
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nmk_chip = kzalloc(sizeof(*nmk_chip), GFP_KERNEL);
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if (!nmk_chip) {
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ret = -ENOMEM;
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