Allwinner DT changes for 4.11, part 2
Support for the audio codec and Mali GPU for the A33 -----BEGIN PGP SIGNATURE----- iQIcBAABCAAGBQJYmHAxAAoJEBx+YmzsjxAgiG8P/ijFKXwrmqtrk5a3gUvYIZMK Qw7zFwHAYgijDRKMNOC9TuvRx/5x6k5V/9kT19zavrz9b1lX/PG5XHfVJH4eWD5U KjTbISJNR2t7uMTiW2Ydree3D/m6AkrulbOF7M9UP8W5dhwbziJ0uOyAMzxIryjl Q5i3eUg3mUJylGk2SFcX4ANvtTpCPqvUjExRP1hwQSNonVQgaEKg9LKXEdo8o9RT hlF6yStn8AyNtHX6rzChiv7AxvOoD5vSehEWuWg3O7GTpUX5lWDzNJewlkkJ6aEl HBzO1Fni6e/TAxXBEeMeQlf6VnFfSjWhkvMEa5OhFB5NeFE+/THTX+tgyidGK6bT SwW5+YkQp5ZDhnYU40r0WrJwq4rKoJXzzqkjhE2iPng1zqMbMudiQzBXoITNCTC1 zOYCNMun1lg7GbWXC/YolGUe7ORYKhn+bWNQaBPhn1NR6Ck0uNTQZFyCxdDqN3rH XtC/JKxbkeXNXSAVFe/16yyyp5bk325n7uNxYzFH4ix9ePIUpvvBCzYgzh4EQY3V OMDPDFsmApV85S+a5U4ZcTe8QVk5PrAmEFGjfO/doMVcduH4TH3kbQz9GvoQtxJv R73qeTGWzZs1jLo+UovJ9+W8RYGUdlik4G3i0iT5LG4BiLKNmq+YcE8DEPg/C45t FAByvIheTctIWKeMhQpP =X2M/ -----END PGP SIGNATURE----- Merge tag 'sunxi-dt-for-4.11-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt Pull "Allwinner DT changes for 4.11, part 2" from Maxime Ripard: Support for the audio codec and Mali GPU for the A33 * tag 'sunxi-dt-for-4.11-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: ARM: dts: sun8i: sinlinx: Enable audio nodes ARM: dts: sun8i: parrot: Enable audio nodes ARM: dts: sun8i: Add audio codec, dai and card for A33 ARM: sun8i: dt: Add mali node dt-bindings: gpu: Add Mali Utgard bindings
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Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
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Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
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ARM Mali Utgard GPU
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===================
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Required properties:
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- compatible
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* Must be one of the following:
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+ "arm,mali-300"
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+ "arm,mali-400"
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+ "arm,mali-450"
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* And, optionally, one of the vendor specific compatible:
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+ allwinner,sun4i-a10-mali
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+ allwinner,sun7i-a20-mali
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+ amlogic,meson-gxbb-mali
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+ amlogic,meson-gxl-mali
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+ stericsson,db8500-mali
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- reg: Physical base address and length of the GPU registers
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- interrupts: an entry for each entry in interrupt-names.
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See ../interrupt-controller/interrupts.txt for details.
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- interrupt-names:
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* ppX: Pixel Processor X interrupt (X from 0 to 7)
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* ppmmuX: Pixel Processor X MMU interrupt (X from 0 to 7)
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* pp: Pixel Processor broadcast interrupt (mali-450 only)
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* gp: Geometry Processor interrupt
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* gpmmu: Geometry Processor MMU interrupt
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- clocks: an entry for each entry in clock-names
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- clock-names:
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* bus: bus clock for the GPU
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* core: clock driving the GPU itself
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Optional properties:
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- interrupt-names and interrupts:
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* pmu: Power Management Unit interrupt, if implemented in hardware
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Vendor-specific bindings
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------------------------
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The Mali GPU is integrated very differently from one SoC to
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another. In order to accomodate those differences, you have the option
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to specify one more vendor-specific compatible, among:
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- allwinner,sun4i-a10-mali
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Required properties:
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* resets: phandle to the reset line for the GPU
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- allwinner,sun7i-a20-mali
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Required properties:
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* resets: phandle to the reset line for the GPU
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- stericsson,db8500-mali
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Required properties:
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* interrupt-names and interrupts:
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+ combined: combined interrupt of all of the above lines
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Example:
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mali: gpu@1c40000 {
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compatible = "allwinner,sun7i-a20-mali", "arm,mali-400";
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reg = <0x01c40000 0x10000>;
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interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "gp",
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"gpmmu",
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"pp0",
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"ppmmu0",
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"pp1",
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"ppmmu1",
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"pmu";
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clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
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clock-names = "bus", "core";
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resets = <&ccu RST_BUS_GPU>;
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};
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@ -472,6 +472,32 @@
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#size-cells = <0>;
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#size-cells = <0>;
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};
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};
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mali: gpu@1c40000 {
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compatible = "allwinner,sun8i-a23-mali",
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"allwinner,sun7i-a20-mali", "arm,mali-400";
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reg = <0x01c40000 0x10000>;
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interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "gp",
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"gpmmu",
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"pp0",
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"ppmmu0",
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"pp1",
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"ppmmu1",
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"pmu";
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clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
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clock-names = "bus", "core";
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resets = <&ccu RST_BUS_GPU>;
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assigned-clocks = <&ccu CLK_GPU>;
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assigned-clock-rates = <408000000>;
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};
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gic: interrupt-controller@01c81000 {
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gic: interrupt-controller@01c81000 {
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compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
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compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
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reg = <0x01c81000 0x1000>,
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reg = <0x01c81000 0x1000>,
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@ -80,10 +80,18 @@
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};
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};
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};
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};
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&codec {
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status = "okay";
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};
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&de {
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&de {
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status = "okay";
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status = "okay";
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};
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};
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&dai {
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status = "okay";
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};
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&ehci0 {
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&ehci0 {
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status = "okay";
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status = "okay";
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};
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};
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@ -227,6 +235,10 @@
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regulator-name = "vcc-rtc";
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regulator-name = "vcc-rtc";
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};
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};
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&sound {
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status = "okay";
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};
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&tcon0 {
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&tcon0 {
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pinctrl-names = "default";
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pinctrl-names = "default";
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pinctrl-0 = <&lcd_rgb666_pins>;
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pinctrl-0 = <&lcd_rgb666_pins>;
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reg = <0x40000000 0x80000000>;
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reg = <0x40000000 0x80000000>;
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};
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};
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sound: sound {
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compatible = "simple-audio-card";
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simple-audio-card,name = "sun8i-a33-audio";
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simple-audio-card,format = "i2s";
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simple-audio-card,frame-master = <&link_codec>;
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simple-audio-card,bitclock-master = <&link_codec>;
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simple-audio-card,mclk-fs = <512>;
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simple-audio-card,aux-devs = <&codec_analog>;
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simple-audio-card,routing =
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"Left DAC", "Digital Left DAC",
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"Right DAC", "Digital Right DAC";
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status = "disabled";
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simple-audio-card,cpu {
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sound-dai = <&dai>;
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};
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link_codec: simple-audio-card,codec {
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sound-dai = <&codec>;
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};
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};
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soc@01c00000 {
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soc@01c00000 {
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tcon0: lcd-controller@01c0c000 {
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tcon0: lcd-controller@01c0c000 {
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compatible = "allwinner,sun8i-a33-tcon";
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compatible = "allwinner,sun8i-a33-tcon";
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@ -151,6 +173,29 @@
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reset-names = "ahb";
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reset-names = "ahb";
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};
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};
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dai: dai@01c22c00 {
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#sound-dai-cells = <0>;
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compatible = "allwinner,sun6i-a31-i2s";
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reg = <0x01c22c00 0x200>;
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interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
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clock-names = "apb", "mod";
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resets = <&ccu RST_BUS_CODEC>;
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dmas = <&dma 15>, <&dma 15>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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codec: codec@01c22e00 {
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#sound-dai-cells = <0>;
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compatible = "allwinner,sun8i-a33-codec";
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reg = <0x01c22e00 0x400>;
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interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
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clock-names = "bus", "mod";
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status = "disabled";
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};
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fe0: display-frontend@01e00000 {
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fe0: display-frontend@01e00000 {
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compatible = "allwinner,sun8i-a33-display-frontend";
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compatible = "allwinner,sun8i-a33-display-frontend";
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reg = <0x01e00000 0x20000>;
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reg = <0x01e00000 0x20000>;
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@ -84,6 +84,14 @@
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};
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};
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&codec {
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status = "okay";
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};
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&dai {
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status = "okay";
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};
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&ehci0 {
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&ehci0 {
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status = "okay";
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status = "okay";
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};
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};
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@ -317,6 +325,10 @@
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status = "okay";
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status = "okay";
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};
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};
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&sound {
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status = "okay";
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};
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&uart0 {
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&uart0 {
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pinctrl-names = "default";
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins_b>;
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pinctrl-0 = <&uart0_pins_b>;
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