KVM: x86: Add KVM_GET/SET_VCPU_EVENTS
This new IOCTL exports all yet user-invisible states related to exceptions, interrupts, and NMIs. Together with appropriate user space changes, this fixes sporadic problems of vmsave/restore, live migration and system reset. [avi: future-proof abi by adding a flags field] Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Avi Kivity <avi@redhat.com>
This commit is contained in:
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65ac726404
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3cfc3092f4
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@ -653,6 +653,55 @@ struct kvm_clock_data {
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__u32 pad[9];
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__u32 pad[9];
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};
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};
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4.29 KVM_GET_VCPU_EVENTS
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Capability: KVM_CAP_VCPU_EVENTS
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Architectures: x86
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Type: vm ioctl
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Parameters: struct kvm_vcpu_event (out)
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Returns: 0 on success, -1 on error
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Gets currently pending exceptions, interrupts, and NMIs as well as related
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states of the vcpu.
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struct kvm_vcpu_events {
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struct {
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__u8 injected;
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__u8 nr;
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__u8 has_error_code;
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__u8 pad;
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__u32 error_code;
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} exception;
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struct {
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__u8 injected;
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__u8 nr;
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__u8 soft;
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__u8 pad;
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} interrupt;
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struct {
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__u8 injected;
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__u8 pending;
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__u8 masked;
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__u8 pad;
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} nmi;
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__u32 sipi_vector;
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__u32 flags; /* must be zero */
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};
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4.30 KVM_SET_VCPU_EVENTS
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Capability: KVM_CAP_VCPU_EVENTS
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Architectures: x86
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Type: vm ioctl
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Parameters: struct kvm_vcpu_event (in)
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Returns: 0 on success, -1 on error
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Set pending exceptions, interrupts, and NMIs as well as related states of the
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vcpu.
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See KVM_GET_VCPU_EVENTS for the data structure.
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5. The kvm_run structure
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5. The kvm_run structure
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Application code obtains a pointer to the kvm_run structure by
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Application code obtains a pointer to the kvm_run structure by
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@ -20,6 +20,7 @@
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#define __KVM_HAVE_MCE
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#define __KVM_HAVE_MCE
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#define __KVM_HAVE_PIT_STATE2
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#define __KVM_HAVE_PIT_STATE2
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#define __KVM_HAVE_XEN_HVM
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#define __KVM_HAVE_XEN_HVM
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#define __KVM_HAVE_VCPU_EVENTS
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/* Architectural interrupt line count. */
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/* Architectural interrupt line count. */
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#define KVM_NR_INTERRUPTS 256
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#define KVM_NR_INTERRUPTS 256
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@ -252,4 +253,31 @@ struct kvm_reinject_control {
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__u8 pit_reinject;
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__u8 pit_reinject;
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__u8 reserved[31];
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__u8 reserved[31];
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};
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};
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/* for KVM_GET/SET_VCPU_EVENTS */
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struct kvm_vcpu_events {
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struct {
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__u8 injected;
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__u8 nr;
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__u8 has_error_code;
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__u8 pad;
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__u32 error_code;
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} exception;
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struct {
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__u8 injected;
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__u8 nr;
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__u8 soft;
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__u8 pad;
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} interrupt;
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struct {
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__u8 injected;
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__u8 pending;
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__u8 masked;
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__u8 pad;
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} nmi;
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__u32 sipi_vector;
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__u32 flags;
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__u32 reserved[10];
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};
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#endif /* _ASM_X86_KVM_H */
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#endif /* _ASM_X86_KVM_H */
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@ -523,6 +523,8 @@ struct kvm_x86_ops {
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bool has_error_code, u32 error_code);
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bool has_error_code, u32 error_code);
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int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
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int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
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int (*nmi_allowed)(struct kvm_vcpu *vcpu);
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int (*nmi_allowed)(struct kvm_vcpu *vcpu);
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bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
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void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
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void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
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void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
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void (*enable_irq_window)(struct kvm_vcpu *vcpu);
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void (*enable_irq_window)(struct kvm_vcpu *vcpu);
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void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
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void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
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@ -2499,6 +2499,26 @@ static int svm_nmi_allowed(struct kvm_vcpu *vcpu)
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!(svm->vcpu.arch.hflags & HF_NMI_MASK);
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!(svm->vcpu.arch.hflags & HF_NMI_MASK);
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}
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}
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static bool svm_get_nmi_mask(struct kvm_vcpu *vcpu)
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{
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struct vcpu_svm *svm = to_svm(vcpu);
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return !!(svm->vcpu.arch.hflags & HF_NMI_MASK);
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}
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static void svm_set_nmi_mask(struct kvm_vcpu *vcpu, bool masked)
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{
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struct vcpu_svm *svm = to_svm(vcpu);
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if (masked) {
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svm->vcpu.arch.hflags |= HF_NMI_MASK;
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svm->vmcb->control.intercept |= (1UL << INTERCEPT_IRET);
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} else {
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svm->vcpu.arch.hflags &= ~HF_NMI_MASK;
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svm->vmcb->control.intercept &= ~(1UL << INTERCEPT_IRET);
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}
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}
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static int svm_interrupt_allowed(struct kvm_vcpu *vcpu)
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static int svm_interrupt_allowed(struct kvm_vcpu *vcpu)
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{
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{
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struct vcpu_svm *svm = to_svm(vcpu);
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struct vcpu_svm *svm = to_svm(vcpu);
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@ -2946,6 +2966,8 @@ static struct kvm_x86_ops svm_x86_ops = {
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.queue_exception = svm_queue_exception,
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.queue_exception = svm_queue_exception,
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.interrupt_allowed = svm_interrupt_allowed,
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.interrupt_allowed = svm_interrupt_allowed,
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.nmi_allowed = svm_nmi_allowed,
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.nmi_allowed = svm_nmi_allowed,
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.get_nmi_mask = svm_get_nmi_mask,
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.set_nmi_mask = svm_set_nmi_mask,
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.enable_nmi_window = enable_nmi_window,
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.enable_nmi_window = enable_nmi_window,
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.enable_irq_window = enable_irq_window,
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.enable_irq_window = enable_irq_window,
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.update_cr8_intercept = update_cr8_intercept,
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.update_cr8_intercept = update_cr8_intercept,
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@ -2639,6 +2639,34 @@ static int vmx_nmi_allowed(struct kvm_vcpu *vcpu)
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GUEST_INTR_STATE_NMI));
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GUEST_INTR_STATE_NMI));
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}
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}
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static bool vmx_get_nmi_mask(struct kvm_vcpu *vcpu)
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{
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if (!cpu_has_virtual_nmis())
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return to_vmx(vcpu)->soft_vnmi_blocked;
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else
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return !!(vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) &
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GUEST_INTR_STATE_NMI);
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}
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static void vmx_set_nmi_mask(struct kvm_vcpu *vcpu, bool masked)
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{
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struct vcpu_vmx *vmx = to_vmx(vcpu);
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if (!cpu_has_virtual_nmis()) {
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if (vmx->soft_vnmi_blocked != masked) {
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vmx->soft_vnmi_blocked = masked;
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vmx->vnmi_blocked_time = 0;
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}
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} else {
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if (masked)
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vmcs_set_bits(GUEST_INTERRUPTIBILITY_INFO,
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GUEST_INTR_STATE_NMI);
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else
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vmcs_clear_bits(GUEST_INTERRUPTIBILITY_INFO,
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GUEST_INTR_STATE_NMI);
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}
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}
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static int vmx_interrupt_allowed(struct kvm_vcpu *vcpu)
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static int vmx_interrupt_allowed(struct kvm_vcpu *vcpu)
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{
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{
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return (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
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return (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
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@ -3985,6 +4013,8 @@ static struct kvm_x86_ops vmx_x86_ops = {
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.queue_exception = vmx_queue_exception,
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.queue_exception = vmx_queue_exception,
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.interrupt_allowed = vmx_interrupt_allowed,
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.interrupt_allowed = vmx_interrupt_allowed,
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.nmi_allowed = vmx_nmi_allowed,
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.nmi_allowed = vmx_nmi_allowed,
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.get_nmi_mask = vmx_get_nmi_mask,
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.set_nmi_mask = vmx_set_nmi_mask,
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.enable_nmi_window = enable_nmi_window,
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.enable_nmi_window = enable_nmi_window,
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.enable_irq_window = enable_irq_window,
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.enable_irq_window = enable_irq_window,
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.update_cr8_intercept = update_cr8_intercept,
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.update_cr8_intercept = update_cr8_intercept,
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@ -1342,6 +1342,7 @@ int kvm_dev_ioctl_check_extension(long ext)
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case KVM_CAP_SET_IDENTITY_MAP_ADDR:
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case KVM_CAP_SET_IDENTITY_MAP_ADDR:
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case KVM_CAP_XEN_HVM:
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case KVM_CAP_XEN_HVM:
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case KVM_CAP_ADJUST_CLOCK:
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case KVM_CAP_ADJUST_CLOCK:
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case KVM_CAP_VCPU_EVENTS:
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r = 1;
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r = 1;
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break;
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break;
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case KVM_CAP_COALESCED_MMIO:
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case KVM_CAP_COALESCED_MMIO:
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@ -1883,6 +1884,61 @@ static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
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return 0;
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return 0;
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}
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}
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static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
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struct kvm_vcpu_events *events)
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{
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vcpu_load(vcpu);
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events->exception.injected = vcpu->arch.exception.pending;
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events->exception.nr = vcpu->arch.exception.nr;
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events->exception.has_error_code = vcpu->arch.exception.has_error_code;
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events->exception.error_code = vcpu->arch.exception.error_code;
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events->interrupt.injected = vcpu->arch.interrupt.pending;
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events->interrupt.nr = vcpu->arch.interrupt.nr;
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events->interrupt.soft = vcpu->arch.interrupt.soft;
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events->nmi.injected = vcpu->arch.nmi_injected;
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events->nmi.pending = vcpu->arch.nmi_pending;
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events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
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events->sipi_vector = vcpu->arch.sipi_vector;
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events->flags = 0;
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vcpu_put(vcpu);
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}
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static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
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struct kvm_vcpu_events *events)
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{
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if (events->flags)
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return -EINVAL;
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vcpu_load(vcpu);
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vcpu->arch.exception.pending = events->exception.injected;
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vcpu->arch.exception.nr = events->exception.nr;
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vcpu->arch.exception.has_error_code = events->exception.has_error_code;
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vcpu->arch.exception.error_code = events->exception.error_code;
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vcpu->arch.interrupt.pending = events->interrupt.injected;
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vcpu->arch.interrupt.nr = events->interrupt.nr;
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vcpu->arch.interrupt.soft = events->interrupt.soft;
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if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
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kvm_pic_clear_isr_ack(vcpu->kvm);
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vcpu->arch.nmi_injected = events->nmi.injected;
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vcpu->arch.nmi_pending = events->nmi.pending;
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kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
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vcpu->arch.sipi_vector = events->sipi_vector;
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vcpu_put(vcpu);
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return 0;
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}
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long kvm_arch_vcpu_ioctl(struct file *filp,
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long kvm_arch_vcpu_ioctl(struct file *filp,
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unsigned int ioctl, unsigned long arg)
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unsigned int ioctl, unsigned long arg)
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{
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{
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r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
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r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
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break;
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break;
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}
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}
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case KVM_GET_VCPU_EVENTS: {
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struct kvm_vcpu_events events;
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kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
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r = -EFAULT;
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if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
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break;
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r = 0;
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break;
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}
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case KVM_SET_VCPU_EVENTS: {
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struct kvm_vcpu_events events;
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r = -EFAULT;
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if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
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break;
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r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
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break;
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}
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default:
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default:
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r = -EINVAL;
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r = -EINVAL;
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}
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}
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@ -489,6 +489,9 @@ struct kvm_ioeventfd {
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#endif
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#endif
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#define KVM_CAP_ADJUST_CLOCK 39
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#define KVM_CAP_ADJUST_CLOCK 39
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#define KVM_CAP_INTERNAL_ERROR_DATA 40
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#define KVM_CAP_INTERNAL_ERROR_DATA 40
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#ifdef __KVM_HAVE_VCPU_EVENTS
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#define KVM_CAP_VCPU_EVENTS 41
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#endif
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#ifdef KVM_CAP_IRQ_ROUTING
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#ifdef KVM_CAP_IRQ_ROUTING
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/* IA64 stack access */
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/* IA64 stack access */
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#define KVM_IA64_VCPU_GET_STACK _IOR(KVMIO, 0x9a, void *)
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#define KVM_IA64_VCPU_GET_STACK _IOR(KVMIO, 0x9a, void *)
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#define KVM_IA64_VCPU_SET_STACK _IOW(KVMIO, 0x9b, void *)
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#define KVM_IA64_VCPU_SET_STACK _IOW(KVMIO, 0x9b, void *)
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/* Available with KVM_CAP_VCPU_EVENTS */
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#define KVM_GET_VCPU_EVENTS _IOR(KVMIO, 0x9f, struct kvm_vcpu_events)
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#define KVM_SET_VCPU_EVENTS _IOW(KVMIO, 0xa0, struct kvm_vcpu_events)
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#define KVM_DEV_ASSIGN_ENABLE_IOMMU (1 << 0)
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#define KVM_DEV_ASSIGN_ENABLE_IOMMU (1 << 0)
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