drm/i915/perf: rework mux configurations queries
Gen8+ might have mux configurations per slices/subslices. Depending on whether slices/subslices have been fused off, only part of the configuration needs to be applied. This change reworks the mux configurations query mechanism to allow more than one set of registers to be programmed. v2: s/n_mux_regs/n_mux_configs/ (Matthew) Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
This commit is contained in:
Lionel Landwerlin
Ben Widawsky
parent
f532023381
commit
3f488d9985
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@ -2417,8 +2417,10 @@ struct drm_i915_private {
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int metrics_set;
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const struct i915_oa_reg *mux_regs;
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int mux_regs_len;
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const struct i915_oa_reg *mux_regs[1];
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int mux_regs_lens[1];
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int n_mux_configs;
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const struct i915_oa_reg *b_counter_regs;
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int b_counter_regs_len;
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@ -1,5 +1,7 @@
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/*
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* Autogenerated file, DO NOT EDIT manually!
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* Autogenerated file by GPU Top : https://github.com/rib/gputop
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* DO NOT EDIT manually!
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*
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*
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* Copyright (c) 2015 Intel Corporation
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*
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@ -109,12 +111,21 @@ static const struct i915_oa_reg mux_config_render_basic[] = {
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{ _MMIO(0x25428), 0x00042049 },
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};
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static const struct i915_oa_reg *
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static int
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get_render_basic_mux_config(struct drm_i915_private *dev_priv,
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int *len)
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const struct i915_oa_reg **regs,
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int *lens)
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{
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*len = ARRAY_SIZE(mux_config_render_basic);
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return mux_config_render_basic;
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int n = 0;
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BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1);
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BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1);
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regs[n] = mux_config_render_basic;
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lens[n] = ARRAY_SIZE(mux_config_render_basic);
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n++;
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return n;
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}
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static const struct i915_oa_reg b_counter_config_compute_basic[] = {
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@ -172,12 +183,21 @@ static const struct i915_oa_reg mux_config_compute_basic[] = {
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{ _MMIO(0x25428), 0x00000c03 },
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};
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static const struct i915_oa_reg *
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static int
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get_compute_basic_mux_config(struct drm_i915_private *dev_priv,
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int *len)
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const struct i915_oa_reg **regs,
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int *lens)
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{
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*len = ARRAY_SIZE(mux_config_compute_basic);
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return mux_config_compute_basic;
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int n = 0;
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BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1);
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BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1);
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regs[n] = mux_config_compute_basic;
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lens[n] = ARRAY_SIZE(mux_config_compute_basic);
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n++;
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return n;
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}
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static const struct i915_oa_reg b_counter_config_compute_extended[] = {
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@ -221,12 +241,21 @@ static const struct i915_oa_reg mux_config_compute_extended[] = {
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{ _MMIO(0x25428), 0x00000000 },
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};
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static const struct i915_oa_reg *
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static int
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get_compute_extended_mux_config(struct drm_i915_private *dev_priv,
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int *len)
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const struct i915_oa_reg **regs,
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int *lens)
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{
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*len = ARRAY_SIZE(mux_config_compute_extended);
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return mux_config_compute_extended;
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int n = 0;
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BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1);
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BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1);
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regs[n] = mux_config_compute_extended;
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lens[n] = ARRAY_SIZE(mux_config_compute_extended);
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n++;
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return n;
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}
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static const struct i915_oa_reg b_counter_config_memory_reads[] = {
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@ -281,12 +310,21 @@ static const struct i915_oa_reg mux_config_memory_reads[] = {
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{ _MMIO(0x25428), 0x00000000 },
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};
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static const struct i915_oa_reg *
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static int
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get_memory_reads_mux_config(struct drm_i915_private *dev_priv,
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int *len)
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const struct i915_oa_reg **regs,
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int *lens)
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{
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*len = ARRAY_SIZE(mux_config_memory_reads);
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return mux_config_memory_reads;
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int n = 0;
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BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1);
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BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1);
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regs[n] = mux_config_memory_reads;
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lens[n] = ARRAY_SIZE(mux_config_memory_reads);
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n++;
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return n;
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}
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static const struct i915_oa_reg b_counter_config_memory_writes[] = {
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@ -341,12 +379,21 @@ static const struct i915_oa_reg mux_config_memory_writes[] = {
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{ _MMIO(0x25428), 0x00000000 },
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};
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static const struct i915_oa_reg *
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static int
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get_memory_writes_mux_config(struct drm_i915_private *dev_priv,
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int *len)
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const struct i915_oa_reg **regs,
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int *lens)
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{
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*len = ARRAY_SIZE(mux_config_memory_writes);
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return mux_config_memory_writes;
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int n = 0;
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BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1);
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BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1);
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regs[n] = mux_config_memory_writes;
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lens[n] = ARRAY_SIZE(mux_config_memory_writes);
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n++;
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return n;
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}
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static const struct i915_oa_reg b_counter_config_sampler_balance[] = {
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@ -401,31 +448,40 @@ static const struct i915_oa_reg mux_config_sampler_balance[] = {
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{ _MMIO(0x25428), 0x0004a54a },
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};
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static const struct i915_oa_reg *
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static int
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get_sampler_balance_mux_config(struct drm_i915_private *dev_priv,
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int *len)
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const struct i915_oa_reg **regs,
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int *lens)
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{
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*len = ARRAY_SIZE(mux_config_sampler_balance);
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return mux_config_sampler_balance;
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int n = 0;
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BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1);
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BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1);
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regs[n] = mux_config_sampler_balance;
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lens[n] = ARRAY_SIZE(mux_config_sampler_balance);
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n++;
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return n;
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}
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int i915_oa_select_metric_set_hsw(struct drm_i915_private *dev_priv)
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{
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dev_priv->perf.oa.mux_regs = NULL;
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dev_priv->perf.oa.mux_regs_len = 0;
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dev_priv->perf.oa.n_mux_configs = 0;
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dev_priv->perf.oa.b_counter_regs = NULL;
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dev_priv->perf.oa.b_counter_regs_len = 0;
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switch (dev_priv->perf.oa.metrics_set) {
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case METRIC_SET_ID_RENDER_BASIC:
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dev_priv->perf.oa.mux_regs =
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dev_priv->perf.oa.n_mux_configs =
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get_render_basic_mux_config(dev_priv,
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&dev_priv->perf.oa.mux_regs_len);
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if (!dev_priv->perf.oa.mux_regs) {
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DRM_DEBUG_DRIVER("No suitable MUX config for \"RENDER_BASIC\" metric set");
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dev_priv->perf.oa.mux_regs,
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dev_priv->perf.oa.mux_regs_lens);
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if (dev_priv->perf.oa.n_mux_configs == 0) {
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DRM_DEBUG_DRIVER("No suitable MUX config for \"RENDER_BASIC\" metric set\n");
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/* EINVAL because *_register_sysfs already checked this
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* and so it wouldn't have been advertised so userspace and
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* and so it wouldn't have been advertised to userspace and
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* so shouldn't have been requested
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*/
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return -EINVAL;
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@ -438,14 +494,15 @@ int i915_oa_select_metric_set_hsw(struct drm_i915_private *dev_priv)
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return 0;
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case METRIC_SET_ID_COMPUTE_BASIC:
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dev_priv->perf.oa.mux_regs =
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dev_priv->perf.oa.n_mux_configs =
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get_compute_basic_mux_config(dev_priv,
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&dev_priv->perf.oa.mux_regs_len);
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if (!dev_priv->perf.oa.mux_regs) {
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DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_BASIC\" metric set");
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dev_priv->perf.oa.mux_regs,
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dev_priv->perf.oa.mux_regs_lens);
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if (dev_priv->perf.oa.n_mux_configs == 0) {
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DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_BASIC\" metric set\n");
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/* EINVAL because *_register_sysfs already checked this
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* and so it wouldn't have been advertised so userspace and
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* and so it wouldn't have been advertised to userspace and
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* so shouldn't have been requested
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*/
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return -EINVAL;
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@ -458,14 +515,15 @@ int i915_oa_select_metric_set_hsw(struct drm_i915_private *dev_priv)
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return 0;
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case METRIC_SET_ID_COMPUTE_EXTENDED:
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dev_priv->perf.oa.mux_regs =
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dev_priv->perf.oa.n_mux_configs =
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get_compute_extended_mux_config(dev_priv,
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&dev_priv->perf.oa.mux_regs_len);
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if (!dev_priv->perf.oa.mux_regs) {
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DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_EXTENDED\" metric set");
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dev_priv->perf.oa.mux_regs,
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dev_priv->perf.oa.mux_regs_lens);
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if (dev_priv->perf.oa.n_mux_configs == 0) {
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DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_EXTENDED\" metric set\n");
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/* EINVAL because *_register_sysfs already checked this
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* and so it wouldn't have been advertised so userspace and
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* and so it wouldn't have been advertised to userspace and
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* so shouldn't have been requested
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*/
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return -EINVAL;
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@ -478,14 +536,15 @@ int i915_oa_select_metric_set_hsw(struct drm_i915_private *dev_priv)
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return 0;
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case METRIC_SET_ID_MEMORY_READS:
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dev_priv->perf.oa.mux_regs =
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dev_priv->perf.oa.n_mux_configs =
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get_memory_reads_mux_config(dev_priv,
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&dev_priv->perf.oa.mux_regs_len);
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if (!dev_priv->perf.oa.mux_regs) {
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DRM_DEBUG_DRIVER("No suitable MUX config for \"MEMORY_READS\" metric set");
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dev_priv->perf.oa.mux_regs,
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dev_priv->perf.oa.mux_regs_lens);
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if (dev_priv->perf.oa.n_mux_configs == 0) {
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DRM_DEBUG_DRIVER("No suitable MUX config for \"MEMORY_READS\" metric set\n");
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/* EINVAL because *_register_sysfs already checked this
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* and so it wouldn't have been advertised so userspace and
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* and so it wouldn't have been advertised to userspace and
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* so shouldn't have been requested
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*/
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return -EINVAL;
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@ -498,14 +557,15 @@ int i915_oa_select_metric_set_hsw(struct drm_i915_private *dev_priv)
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return 0;
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case METRIC_SET_ID_MEMORY_WRITES:
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dev_priv->perf.oa.mux_regs =
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dev_priv->perf.oa.n_mux_configs =
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get_memory_writes_mux_config(dev_priv,
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&dev_priv->perf.oa.mux_regs_len);
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if (!dev_priv->perf.oa.mux_regs) {
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DRM_DEBUG_DRIVER("No suitable MUX config for \"MEMORY_WRITES\" metric set");
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dev_priv->perf.oa.mux_regs,
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dev_priv->perf.oa.mux_regs_lens);
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if (dev_priv->perf.oa.n_mux_configs == 0) {
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DRM_DEBUG_DRIVER("No suitable MUX config for \"MEMORY_WRITES\" metric set\n");
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/* EINVAL because *_register_sysfs already checked this
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* and so it wouldn't have been advertised so userspace and
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* and so it wouldn't have been advertised to userspace and
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* so shouldn't have been requested
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*/
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return -EINVAL;
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@ -518,14 +578,15 @@ int i915_oa_select_metric_set_hsw(struct drm_i915_private *dev_priv)
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return 0;
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case METRIC_SET_ID_SAMPLER_BALANCE:
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dev_priv->perf.oa.mux_regs =
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dev_priv->perf.oa.n_mux_configs =
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get_sampler_balance_mux_config(dev_priv,
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&dev_priv->perf.oa.mux_regs_len);
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if (!dev_priv->perf.oa.mux_regs) {
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DRM_DEBUG_DRIVER("No suitable MUX config for \"SAMPLER_BALANCE\" metric set");
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dev_priv->perf.oa.mux_regs,
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dev_priv->perf.oa.mux_regs_lens);
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if (dev_priv->perf.oa.n_mux_configs == 0) {
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DRM_DEBUG_DRIVER("No suitable MUX config for \"SAMPLER_BALANCE\" metric set\n");
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/* EINVAL because *_register_sysfs already checked this
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* and so it wouldn't have been advertised so userspace and
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* and so it wouldn't have been advertised to userspace and
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* so shouldn't have been requested
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*/
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return -EINVAL;
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@ -677,35 +738,36 @@ static struct attribute_group group_sampler_balance = {
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int
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i915_perf_register_sysfs_hsw(struct drm_i915_private *dev_priv)
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{
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int mux_len;
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const struct i915_oa_reg *mux_regs[ARRAY_SIZE(dev_priv->perf.oa.mux_regs)];
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int mux_lens[ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens)];
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int ret = 0;
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if (get_render_basic_mux_config(dev_priv, &mux_len)) {
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if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) {
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ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_render_basic);
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if (ret)
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goto error_render_basic;
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}
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if (get_compute_basic_mux_config(dev_priv, &mux_len)) {
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if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) {
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ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_basic);
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if (ret)
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goto error_compute_basic;
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}
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if (get_compute_extended_mux_config(dev_priv, &mux_len)) {
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if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens)) {
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ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_extended);
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if (ret)
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goto error_compute_extended;
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}
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if (get_memory_reads_mux_config(dev_priv, &mux_len)) {
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if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens)) {
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ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_memory_reads);
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if (ret)
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goto error_memory_reads;
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}
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if (get_memory_writes_mux_config(dev_priv, &mux_len)) {
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if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens)) {
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ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_memory_writes);
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if (ret)
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goto error_memory_writes;
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}
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if (get_sampler_balance_mux_config(dev_priv, &mux_len)) {
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if (get_sampler_balance_mux_config(dev_priv, mux_regs, mux_lens)) {
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ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_sampler_balance);
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if (ret)
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goto error_sampler_balance;
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@ -714,19 +776,19 @@ i915_perf_register_sysfs_hsw(struct drm_i915_private *dev_priv)
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return 0;
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error_sampler_balance:
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if (get_sampler_balance_mux_config(dev_priv, &mux_len))
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if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens))
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sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_writes);
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error_memory_writes:
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if (get_sampler_balance_mux_config(dev_priv, &mux_len))
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if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens))
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sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_reads);
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error_memory_reads:
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if (get_sampler_balance_mux_config(dev_priv, &mux_len))
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if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens))
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sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extended);
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error_compute_extended:
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if (get_sampler_balance_mux_config(dev_priv, &mux_len))
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if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens))
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sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_basic);
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error_compute_basic:
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if (get_sampler_balance_mux_config(dev_priv, &mux_len))
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if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens))
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sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_basic);
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error_render_basic:
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return ret;
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@ -735,18 +797,19 @@ error_render_basic:
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void
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i915_perf_unregister_sysfs_hsw(struct drm_i915_private *dev_priv)
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{
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int mux_len;
|
||||
const struct i915_oa_reg *mux_regs[ARRAY_SIZE(dev_priv->perf.oa.mux_regs)];
|
||||
int mux_lens[ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens)];
|
||||
|
||||
if (get_render_basic_mux_config(dev_priv, &mux_len))
|
||||
if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens))
|
||||
sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_basic);
|
||||
if (get_compute_basic_mux_config(dev_priv, &mux_len))
|
||||
if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens))
|
||||
sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_basic);
|
||||
if (get_compute_extended_mux_config(dev_priv, &mux_len))
|
||||
if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens))
|
||||
sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extended);
|
||||
if (get_memory_reads_mux_config(dev_priv, &mux_len))
|
||||
if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens))
|
||||
sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_reads);
|
||||
if (get_memory_writes_mux_config(dev_priv, &mux_len))
|
||||
if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens))
|
||||
sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_writes);
|
||||
if (get_sampler_balance_mux_config(dev_priv, &mux_len))
|
||||
if (get_sampler_balance_mux_config(dev_priv, mux_regs, mux_lens))
|
||||
sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_sampler_balance);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,7 @@
|
|||
/*
|
||||
* Autogenerated file, DO NOT EDIT manually!
|
||||
* Autogenerated file by GPU Top : https://github.com/rib/gputop
|
||||
* DO NOT EDIT manually!
|
||||
*
|
||||
*
|
||||
* Copyright (c) 2015 Intel Corporation
|
||||
*
|
||||
|
|
|
|||
|
|
@ -1047,6 +1047,7 @@ static void config_oa_regs(struct drm_i915_private *dev_priv,
|
|||
static int hsw_enable_metric_set(struct drm_i915_private *dev_priv)
|
||||
{
|
||||
int ret = i915_oa_select_metric_set_hsw(dev_priv);
|
||||
int i;
|
||||
|
||||
if (ret)
|
||||
return ret;
|
||||
|
|
@ -1068,8 +1069,10 @@ static int hsw_enable_metric_set(struct drm_i915_private *dev_priv)
|
|||
I915_WRITE(GEN6_UCGCTL1, (I915_READ(GEN6_UCGCTL1) |
|
||||
GEN6_CSUNIT_CLOCK_GATE_DISABLE));
|
||||
|
||||
config_oa_regs(dev_priv, dev_priv->perf.oa.mux_regs,
|
||||
dev_priv->perf.oa.mux_regs_len);
|
||||
for (i = 0; i < dev_priv->perf.oa.n_mux_configs; i++) {
|
||||
config_oa_regs(dev_priv, dev_priv->perf.oa.mux_regs[i],
|
||||
dev_priv->perf.oa.mux_regs_lens[i]);
|
||||
}
|
||||
|
||||
/* It apparently takes a fairly long time for a new MUX
|
||||
* configuration to be be applied after these register writes.
|
||||
|
|
|
|||
Loading…
Reference in a new issue