scc_pata: PIO fixes
* Use pio == 255 == "auto-tune" in scc_config_drive_for_dma() instead of forcing PIO4 on PIO fallback. Fix comment while at it. * Rename scc_tuneproc() to scc_tune_pio() and add scc_tuneproc() wrapper. Move finding of the best PIO mode and setting of transfer mode on the device to the new wrapper. * Fix scc_tune_chipset() to tune PIO modes. Do a small cleanup while at it. Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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@ -190,7 +190,7 @@ scc_ide_outsl(unsigned long port, void *addr, u32 count)
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}
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/**
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* scc_tuneproc - tune a drive PIO mode
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* scc_tune_pio - tune a drive PIO mode
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* @drive: drive to tune
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* @mode_wanted: the target operating mode
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*
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@ -198,7 +198,7 @@ scc_ide_outsl(unsigned long port, void *addr, u32 count)
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* controller.
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*/
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static void scc_tuneproc(ide_drive_t *drive, byte mode_wanted)
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static void scc_tune_pio(ide_drive_t *drive, const u8 pio)
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{
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ide_hwif_t *hwif = HWIF(drive);
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struct scc_ports *ports = ide_get_hwifdata(hwif);
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@ -207,41 +207,25 @@ static void scc_tuneproc(ide_drive_t *drive, byte mode_wanted)
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unsigned long piosht_port = ctl_base + 0x000;
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unsigned long pioct_port = ctl_base + 0x004;
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unsigned long reg;
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unsigned char speed = XFER_PIO_0;
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int offset;
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mode_wanted = ide_get_best_pio_mode(drive, mode_wanted, 4);
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switch (mode_wanted) {
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case 4:
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speed = XFER_PIO_4;
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break;
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case 3:
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speed = XFER_PIO_3;
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break;
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case 2:
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speed = XFER_PIO_2;
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break;
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case 1:
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speed = XFER_PIO_1;
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break;
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case 0:
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default:
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speed = XFER_PIO_0;
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break;
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}
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reg = in_be32((void __iomem *)cckctrl_port);
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if (reg & CCKCTRL_ATACLKOEN) {
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offset = 1; /* 133MHz */
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} else {
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offset = 0; /* 100MHz */
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}
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reg = JCHSTtbl[offset][mode_wanted] << 16 | JCHHTtbl[offset][mode_wanted];
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reg = JCHSTtbl[offset][pio] << 16 | JCHHTtbl[offset][pio];
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out_be32((void __iomem *)piosht_port, reg);
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reg = JCHCTtbl[offset][mode_wanted];
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reg = JCHCTtbl[offset][pio];
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out_be32((void __iomem *)pioct_port, reg);
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}
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ide_config_drive_speed(drive, speed);
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static void scc_tuneproc(ide_drive_t *drive, u8 pio)
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{
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pio = ide_get_best_pio_mode(drive, pio, 4);
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scc_tune_pio(drive, pio);
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ide_config_drive_speed(drive, XFER_PIO_0 + pio);
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}
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/**
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@ -280,26 +264,21 @@ static int scc_tune_chipset(ide_drive_t *drive, byte xferspeed)
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switch (speed) {
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case XFER_UDMA_6:
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idx = 6;
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break;
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case XFER_UDMA_5:
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idx = 5;
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break;
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case XFER_UDMA_4:
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idx = 4;
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break;
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case XFER_UDMA_3:
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idx = 3;
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break;
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case XFER_UDMA_2:
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idx = 2;
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break;
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case XFER_UDMA_1:
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idx = 1;
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break;
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case XFER_UDMA_0:
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idx = 0;
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idx = speed - XFER_UDMA_0;
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break;
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case XFER_PIO_4:
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case XFER_PIO_3:
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case XFER_PIO_2:
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case XFER_PIO_1:
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case XFER_PIO_0:
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scc_tune_pio(drive, speed - XFER_PIO_0);
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return ide_config_drive_speed(drive, speed);
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default:
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return 1;
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}
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@ -329,7 +308,7 @@ static int scc_tune_chipset(ide_drive_t *drive, byte xferspeed)
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* required.
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* If the drive isn't suitable for DMA or we hit other problems
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* then we will drop down to PIO and set up PIO appropriately.
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* (return 1)
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* (return -1)
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*/
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static int scc_config_drive_for_dma(ide_drive_t *drive)
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@ -338,7 +317,7 @@ static int scc_config_drive_for_dma(ide_drive_t *drive)
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return 0;
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if (ide_use_fast_pio(drive))
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scc_tuneproc(drive, 4);
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scc_tuneproc(drive, 255);
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return -1;
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}
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