avr32: re-instate MCI WP/CD pin assignments for ATNGW100
The MRMT1 patch mistakenly reverted commit
fe272b5bd1
.
This new patch is intended to correct this, so that both daughtercards
should be able to assign GPIO PC25 and PE0 to the MCI driver.
Signed-off-by: Peter Ma <pma@mediamatech.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This commit is contained in:
parent
1e23502cc5
commit
3fe6ad6c39
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@ -56,13 +56,8 @@ static struct spi_board_info spi0_board_info[] __initdata = {
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static struct mci_platform_data __initdata mci0_data = {
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.slot[0] = {
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.bus_width = 4,
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#if defined(CONFIG_BOARD_ATNGW100_EVKLCD10X) || defined(CONFIG_BOARD_ATNGW100_MRMT1)
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.detect_pin = GPIO_PIN_NONE,
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.wp_pin = GPIO_PIN_NONE,
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#else
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.detect_pin = GPIO_PIN_PC(25),
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.wp_pin = GPIO_PIN_PE(0),
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#endif
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},
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};
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