ARM: SoC non-critical fixes
Here's a small collection of fixes accrued during the last release that weren't considered severe enough to merge during the -rc series. A few of these are around resurrecting TI81xx support that's been broken for quite a while, the rest are smaller fixes -- most for PXA but a few across the board. There are also some updates to MAINTAINERS here, in particular for Broadcom platforms. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJU4uShAAoJEIwa5zzehBx3SW0P/1T19Tnx2D18/c2rFvyNl3N3 09emcSZZ2xPKlmt0y6kpbyvV5X8zM/0JjH61DVJGYHeMMHTuhk8evy9ptfXTXkGp GskrIla2jozSaei45lsx7uy9Cz/FtxQSQ9SqBTfOBlvL8yekEJ9/ZPsL7tqRvTQa OllOR7RztcjkO/A9FjrSqlEwY6Ckduv6lKjfuXaGmx88sMMQt7hmgM+x5sgzJnss 5BHYOhXXYODh6KHJRQqG0fi5j2vOrWSw18dro6HwZPN3TlsmeFYkkOV9bOgJiBQz TYXoFTnIwYLaBaVVzIrQO1fmyVmxlFjSRvs3BY++a142VPjxkXmh7KNWYwLKEtXH cVET4jtKHVQVOEo9pbx3E5Fjlcj/VKJDPqdnTvCXV9OjpCDLP9bT0EfXRmjmWiab oUQDW3o+VEY4INBnsRJ6yL3iXelU26U/XMTZxWuZRo3m1ArF4yTUdzMUjQGYyRW6 rGnLYZU6wO8cc61IG3It8bq58MZx1DDtP3knjf3lDfcFv62AA2dNcN75vkdeKar3 ndFqtKwr3OZ+NuSgGASxfMOGEi2uMZborI+hzaXy/aTefSN0gUSFR1Kpy05Q4aKA D0mZ+JF8gArZMqXfAqGbYD/mgT293UWKS2kIlyfAviJS9oMxT5oFE/TpTIpCT1gv pi5ydJMFmD7X5A0w6wik =YCX1 -----END PGP SIGNATURE----- Merge tag 'fixes-non-critical-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC non-critical fixes from Olof Johansson: "Here's a small collection of fixes accrued during the last release that weren't considered severe enough to merge during the -rc series. A few of these are around resurrecting TI81xx support that's been broken for quite a while, the rest are smaller fixes -- most for PXA but a few across the board. There are also some updates to MAINTAINERS here, in particular for Broadcom platforms" * tag 'fixes-non-critical-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (23 commits) MAINTAINERS: fix git repositories for Broadcom SoCs ARM: pxa: fix broken isa interrupts for zeus and viper ARM: DRA7: hwmod: Fix boot crash with DEBUG_LL enabled on UART3 ARM: OMAP: DRA7: hwmod: Make gpmc software supervised as the smart idle is broken ARM: AM43xx: hwmod: set DSS submodule parent hwmods ARM: OMAP2+: hwmod: print error if wait_target_ready() failed MAINTAINERS: add maintainer for OMAP hwmod data ARM: OMAP2+: Disable omap3 PM init for ti81xx ARM: OMAP2+: Fix reboot for 81xx ARM: OMAP2+: Fix dm814 and dm816 for clocks and timer init ARM: OMAP2+: Fix ti81xx class type ARM: OMAP2+: Fix ti81xx devtype ARM: OMAP2+: Fix error handling for omap2_clk_enable_init_clocks MAINTAINERS: add a git entry for BMIPS-based BCM7xxx SoCs MAINTAINERS: add a git entry for BCM7xxx ARM-based SoCs MAINTAINERS: update Broadcom Cygnus SoC git tree MAINTAINERS: move BCM63xx ARM-based SoCs git tree hx4700: regulator: declare full constraints ARM: pxa: add regulator_has_full_constraints to spitz board file ARM: pxa: add regulator_has_full_constraints to poodle board file ...
This commit is contained in:
commit
4025fa97ff
12
MAINTAINERS
12
MAINTAINERS
|
@ -2144,7 +2144,7 @@ F: arch/arm/boot/dts/bcm470*
|
||||||
BROADCOM BCM63XX ARM ARCHITECTURE
|
BROADCOM BCM63XX ARM ARCHITECTURE
|
||||||
M: Florian Fainelli <f.fainelli@gmail.com>
|
M: Florian Fainelli <f.fainelli@gmail.com>
|
||||||
L: linux-arm-kernel@lists.infradead.org
|
L: linux-arm-kernel@lists.infradead.org
|
||||||
T: git git://git.github.com/brcm/linux.git
|
T: git git://github.com/broadcom/arm-bcm63xx.git
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: arch/arm/mach-bcm/bcm63xx.c
|
F: arch/arm/mach-bcm/bcm63xx.c
|
||||||
F: arch/arm/include/debug/bcm63xx.S
|
F: arch/arm/include/debug/bcm63xx.S
|
||||||
|
@ -2161,6 +2161,7 @@ M: Brian Norris <computersforpeace@gmail.com>
|
||||||
M: Gregory Fong <gregory.0xf0@gmail.com>
|
M: Gregory Fong <gregory.0xf0@gmail.com>
|
||||||
M: Florian Fainelli <f.fainelli@gmail.com>
|
M: Florian Fainelli <f.fainelli@gmail.com>
|
||||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||||
|
T: git git://github.com/broadcom/stblinux.git
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: arch/arm/mach-bcm/*brcmstb*
|
F: arch/arm/mach-bcm/*brcmstb*
|
||||||
F: arch/arm/boot/dts/bcm7*.dts*
|
F: arch/arm/boot/dts/bcm7*.dts*
|
||||||
|
@ -2170,6 +2171,7 @@ BROADCOM BMIPS MIPS ARCHITECTURE
|
||||||
M: Kevin Cernekee <cernekee@gmail.com>
|
M: Kevin Cernekee <cernekee@gmail.com>
|
||||||
M: Florian Fainelli <f.fainelli@gmail.com>
|
M: Florian Fainelli <f.fainelli@gmail.com>
|
||||||
L: linux-mips@linux-mips.org
|
L: linux-mips@linux-mips.org
|
||||||
|
T: git git://github.com/broadcom/stblinux.git
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: arch/mips/bmips/*
|
F: arch/mips/bmips/*
|
||||||
F: arch/mips/include/asm/mach-bmips/*
|
F: arch/mips/include/asm/mach-bmips/*
|
||||||
|
@ -2212,7 +2214,7 @@ M: Ray Jui <rjui@broadcom.com>
|
||||||
M: Scott Branden <sbranden@broadcom.com>
|
M: Scott Branden <sbranden@broadcom.com>
|
||||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||||
L: bcm-kernel-feedback-list@broadcom.com
|
L: bcm-kernel-feedback-list@broadcom.com
|
||||||
T: git git://git.github.com/brcm/linux.git
|
T: git git://github.com/broadcom/cygnus-linux.git
|
||||||
S: Maintained
|
S: Maintained
|
||||||
N: iproc
|
N: iproc
|
||||||
N: cygnus
|
N: cygnus
|
||||||
|
@ -7044,6 +7046,12 @@ L: linux-omap@vger.kernel.org
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: arch/arm/mach-omap2/omap_hwmod.*
|
F: arch/arm/mach-omap2/omap_hwmod.*
|
||||||
|
|
||||||
|
OMAP HWMOD DATA
|
||||||
|
M: Paul Walmsley <paul@pwsan.com>
|
||||||
|
L: linux-omap@vger.kernel.org
|
||||||
|
S: Maintained
|
||||||
|
F: arch/arm/mach-omap2/omap_hwmod*data*
|
||||||
|
|
||||||
OMAP HWMOD DATA FOR OMAP4-BASED DEVICES
|
OMAP HWMOD DATA FOR OMAP4-BASED DEVICES
|
||||||
M: Benoît Cousson <bcousson@baylibre.com>
|
M: Benoît Cousson <bcousson@baylibre.com>
|
||||||
L: linux-omap@vger.kernel.org
|
L: linux-omap@vger.kernel.org
|
||||||
|
|
|
@ -58,6 +58,7 @@ AFLAGS_sram34xx.o :=-Wa,-march=armv7-a
|
||||||
# Restart code (OMAP4/5 currently in omap4-common.c)
|
# Restart code (OMAP4/5 currently in omap4-common.c)
|
||||||
obj-$(CONFIG_SOC_OMAP2420) += omap2-restart.o
|
obj-$(CONFIG_SOC_OMAP2420) += omap2-restart.o
|
||||||
obj-$(CONFIG_SOC_OMAP2430) += omap2-restart.o
|
obj-$(CONFIG_SOC_OMAP2430) += omap2-restart.o
|
||||||
|
obj-$(CONFIG_SOC_TI81XX) += ti81xx-restart.o
|
||||||
obj-$(CONFIG_SOC_AM33XX) += am33xx-restart.o
|
obj-$(CONFIG_SOC_AM33XX) += am33xx-restart.o
|
||||||
obj-$(CONFIG_SOC_AM43XX) += omap4-restart.o
|
obj-$(CONFIG_SOC_AM43XX) += omap4-restart.o
|
||||||
obj-$(CONFIG_ARCH_OMAP3) += omap3-restart.o
|
obj-$(CONFIG_ARCH_OMAP3) += omap3-restart.o
|
||||||
|
|
|
@ -620,6 +620,9 @@ void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks)
|
||||||
|
|
||||||
for (i = 0; i < num_clocks; i++) {
|
for (i = 0; i < num_clocks; i++) {
|
||||||
init_clk = clk_get(NULL, clk_names[i]);
|
init_clk = clk_get(NULL, clk_names[i]);
|
||||||
|
if (WARN(IS_ERR(init_clk), "could not find init clock %s\n",
|
||||||
|
clk_names[i]))
|
||||||
|
continue;
|
||||||
clk_prepare_enable(init_clk);
|
clk_prepare_enable(init_clk);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -118,7 +118,8 @@ void omap3630_init_early(void);
|
||||||
void omap3_init_early(void); /* Do not use this one */
|
void omap3_init_early(void); /* Do not use this one */
|
||||||
void am33xx_init_early(void);
|
void am33xx_init_early(void);
|
||||||
void am35xx_init_early(void);
|
void am35xx_init_early(void);
|
||||||
void ti81xx_init_early(void);
|
void ti814x_init_early(void);
|
||||||
|
void ti816x_init_early(void);
|
||||||
void am33xx_init_early(void);
|
void am33xx_init_early(void);
|
||||||
void am43xx_init_early(void);
|
void am43xx_init_early(void);
|
||||||
void am43xx_init_late(void);
|
void am43xx_init_late(void);
|
||||||
|
@ -171,6 +172,14 @@ static inline void omap3xxx_restart(enum reboot_mode mode, const char *cmd)
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_SOC_TI81XX
|
||||||
|
void ti81xx_restart(enum reboot_mode mode, const char *cmd);
|
||||||
|
#else
|
||||||
|
static inline void ti81xx_restart(enum reboot_mode mode, const char *cmd)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
|
#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
|
||||||
defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
|
defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
|
||||||
void omap44xx_restart(enum reboot_mode mode, const char *cmd);
|
void omap44xx_restart(enum reboot_mode mode, const char *cmd);
|
||||||
|
|
|
@ -53,6 +53,7 @@
|
||||||
#define OMAP343X_CONTROL_GENERAL_WKUP 0xa60
|
#define OMAP343X_CONTROL_GENERAL_WKUP 0xa60
|
||||||
|
|
||||||
/* TI81XX spefic control submodules */
|
/* TI81XX spefic control submodules */
|
||||||
|
#define TI81XX_CONTROL_DEVBOOT 0x040
|
||||||
#define TI81XX_CONTROL_DEVCONF 0x600
|
#define TI81XX_CONTROL_DEVCONF 0x600
|
||||||
|
|
||||||
/* Control register offsets - read/write with omap_ctrl_{read,write}{bwl}() */
|
/* Control register offsets - read/write with omap_ctrl_{read,write}{bwl}() */
|
||||||
|
@ -246,6 +247,9 @@
|
||||||
#define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250
|
#define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250
|
||||||
#define OMAP3_PADCONF_SAD2D_IDLEACK 0x254
|
#define OMAP3_PADCONF_SAD2D_IDLEACK 0x254
|
||||||
|
|
||||||
|
/* TI81XX CONTROL_DEVBOOT register offsets */
|
||||||
|
#define TI81XX_CONTROL_STATUS (TI81XX_CONTROL_DEVBOOT + 0x000)
|
||||||
|
|
||||||
/* TI81XX CONTROL_DEVCONF register offsets */
|
/* TI81XX CONTROL_DEVCONF register offsets */
|
||||||
#define TI81XX_CONTROL_DEVICE_ID (TI81XX_CONTROL_DEVCONF + 0x000)
|
#define TI81XX_CONTROL_DEVICE_ID (TI81XX_CONTROL_DEVCONF + 0x000)
|
||||||
|
|
||||||
|
|
|
@ -56,6 +56,8 @@ int omap_type(void)
|
||||||
|
|
||||||
if (cpu_is_omap24xx()) {
|
if (cpu_is_omap24xx()) {
|
||||||
val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);
|
val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);
|
||||||
|
} else if (cpu_is_ti81xx()) {
|
||||||
|
val = omap_ctrl_readl(TI81XX_CONTROL_STATUS);
|
||||||
} else if (soc_is_am33xx() || soc_is_am43xx()) {
|
} else if (soc_is_am33xx() || soc_is_am43xx()) {
|
||||||
val = omap_ctrl_readl(AM33XX_CONTROL_STATUS);
|
val = omap_ctrl_readl(AM33XX_CONTROL_STATUS);
|
||||||
} else if (cpu_is_omap34xx()) {
|
} else if (cpu_is_omap34xx()) {
|
||||||
|
|
|
@ -492,9 +492,28 @@ void __init am35xx_init_early(void)
|
||||||
omap_clk_soc_init = am35xx_dt_clk_init;
|
omap_clk_soc_init = am35xx_dt_clk_init;
|
||||||
}
|
}
|
||||||
|
|
||||||
void __init ti81xx_init_early(void)
|
void __init ti814x_init_early(void)
|
||||||
{
|
{
|
||||||
omap2_set_globals_tap(OMAP343X_CLASS,
|
omap2_set_globals_tap(TI814X_CLASS,
|
||||||
|
OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));
|
||||||
|
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
|
||||||
|
NULL);
|
||||||
|
omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE));
|
||||||
|
omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL);
|
||||||
|
omap3xxx_check_revision();
|
||||||
|
ti81xx_check_features();
|
||||||
|
omap3xxx_voltagedomains_init();
|
||||||
|
omap3xxx_powerdomains_init();
|
||||||
|
omap3xxx_clockdomains_init();
|
||||||
|
omap3xxx_hwmod_init();
|
||||||
|
omap_hwmod_init_postsetup();
|
||||||
|
if (of_have_populated_dt())
|
||||||
|
omap_clk_soc_init = ti81xx_dt_clk_init;
|
||||||
|
}
|
||||||
|
|
||||||
|
void __init ti816x_init_early(void)
|
||||||
|
{
|
||||||
|
omap2_set_globals_tap(TI816X_CLASS,
|
||||||
OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));
|
OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));
|
||||||
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
|
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
|
||||||
NULL);
|
NULL);
|
||||||
|
@ -509,8 +528,6 @@ void __init ti81xx_init_early(void)
|
||||||
omap_hwmod_init_postsetup();
|
omap_hwmod_init_postsetup();
|
||||||
if (of_have_populated_dt())
|
if (of_have_populated_dt())
|
||||||
omap_clk_soc_init = ti81xx_dt_clk_init;
|
omap_clk_soc_init = ti81xx_dt_clk_init;
|
||||||
else
|
|
||||||
omap_clk_soc_init = omap3xxx_clk_init;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void __init omap3_init_late(void)
|
void __init omap3_init_late(void)
|
||||||
|
@ -551,7 +568,6 @@ void __init am35xx_init_late(void)
|
||||||
void __init ti81xx_init_late(void)
|
void __init ti81xx_init_late(void)
|
||||||
{
|
{
|
||||||
omap_common_late_init();
|
omap_common_late_init();
|
||||||
omap3_pm_init();
|
|
||||||
omap2_clk_enable_autoidle_all();
|
omap2_clk_enable_autoidle_all();
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -2155,8 +2155,8 @@ static int _enable(struct omap_hwmod *oh)
|
||||||
if (soc_ops.disable_module)
|
if (soc_ops.disable_module)
|
||||||
soc_ops.disable_module(oh);
|
soc_ops.disable_module(oh);
|
||||||
_disable_clocks(oh);
|
_disable_clocks(oh);
|
||||||
pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
|
pr_err("omap_hwmod: %s: _wait_target_ready failed: %d\n",
|
||||||
oh->name, r);
|
oh->name, r);
|
||||||
|
|
||||||
if (oh->clkdm)
|
if (oh->clkdm)
|
||||||
clkdm_hwmod_disable(oh->clkdm, oh);
|
clkdm_hwmod_disable(oh->clkdm, oh);
|
||||||
|
|
|
@ -498,6 +498,7 @@ static struct omap_hwmod am43xx_dss_dispc_hwmod = {
|
||||||
},
|
},
|
||||||
},
|
},
|
||||||
.dev_attr = &am43xx_dss_dispc_dev_attr,
|
.dev_attr = &am43xx_dss_dispc_dev_attr,
|
||||||
|
.parent_hwmod = &am43xx_dss_core_hwmod,
|
||||||
};
|
};
|
||||||
|
|
||||||
/* rfbi */
|
/* rfbi */
|
||||||
|
@ -512,6 +513,7 @@ static struct omap_hwmod am43xx_dss_rfbi_hwmod = {
|
||||||
.clkctrl_offs = AM43XX_CM_PER_DSS_CLKCTRL_OFFSET,
|
.clkctrl_offs = AM43XX_CM_PER_DSS_CLKCTRL_OFFSET,
|
||||||
},
|
},
|
||||||
},
|
},
|
||||||
|
.parent_hwmod = &am43xx_dss_core_hwmod,
|
||||||
};
|
};
|
||||||
|
|
||||||
/* Interfaces */
|
/* Interfaces */
|
||||||
|
|
|
@ -819,7 +819,8 @@ static struct omap_hwmod dra7xx_gpmc_hwmod = {
|
||||||
.name = "gpmc",
|
.name = "gpmc",
|
||||||
.class = &dra7xx_gpmc_hwmod_class,
|
.class = &dra7xx_gpmc_hwmod_class,
|
||||||
.clkdm_name = "l3main1_clkdm",
|
.clkdm_name = "l3main1_clkdm",
|
||||||
.flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,
|
.flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET |
|
||||||
|
HWMOD_SWSUP_SIDLE),
|
||||||
.main_clk = "l3_iclk_div",
|
.main_clk = "l3_iclk_div",
|
||||||
.prcm = {
|
.prcm = {
|
||||||
.omap4 = {
|
.omap4 = {
|
||||||
|
@ -2017,7 +2018,7 @@ static struct omap_hwmod dra7xx_uart3_hwmod = {
|
||||||
.class = &dra7xx_uart_hwmod_class,
|
.class = &dra7xx_uart_hwmod_class,
|
||||||
.clkdm_name = "l4per_clkdm",
|
.clkdm_name = "l4per_clkdm",
|
||||||
.main_clk = "uart3_gfclk_mux",
|
.main_clk = "uart3_gfclk_mux",
|
||||||
.flags = HWMOD_SWSUP_SIDLE_ACT,
|
.flags = HWMOD_SWSUP_SIDLE_ACT | DEBUG_OMAP4UART3_FLAGS,
|
||||||
.prcm = {
|
.prcm = {
|
||||||
.omap4 = {
|
.omap4 = {
|
||||||
.clkctrl_offs = DRA7XX_CM_L4PER_UART3_CLKCTRL_OFFSET,
|
.clkctrl_offs = DRA7XX_CM_L4PER_UART3_CLKCTRL_OFFSET,
|
||||||
|
|
|
@ -464,7 +464,7 @@ void __init omap3xxx_powerdomains_init(void)
|
||||||
{
|
{
|
||||||
unsigned int rev;
|
unsigned int rev;
|
||||||
|
|
||||||
if (!cpu_is_omap34xx())
|
if (!cpu_is_omap34xx() && !cpu_is_ti81xx())
|
||||||
return;
|
return;
|
||||||
|
|
||||||
pwrdm_register_platform_funcs(&omap3_pwrdm_operations);
|
pwrdm_register_platform_funcs(&omap3_pwrdm_operations);
|
||||||
|
|
|
@ -581,6 +581,10 @@ static const struct of_device_id omap_prcm_dt_match_table[] = {
|
||||||
{ .compatible = "ti,am3-scrm" },
|
{ .compatible = "ti,am3-scrm" },
|
||||||
{ .compatible = "ti,am4-prcm" },
|
{ .compatible = "ti,am4-prcm" },
|
||||||
{ .compatible = "ti,am4-scrm" },
|
{ .compatible = "ti,am4-scrm" },
|
||||||
|
{ .compatible = "ti,dm814-prcm" },
|
||||||
|
{ .compatible = "ti,dm814-scrm" },
|
||||||
|
{ .compatible = "ti,dm816-prcm" },
|
||||||
|
{ .compatible = "ti,dm816-scrm" },
|
||||||
{ .compatible = "ti,omap2-prcm" },
|
{ .compatible = "ti,omap2-prcm" },
|
||||||
{ .compatible = "ti,omap2-scrm" },
|
{ .compatible = "ti,omap2-scrm" },
|
||||||
{ .compatible = "ti,omap3-prm" },
|
{ .compatible = "ti,omap3-prm" },
|
||||||
|
|
|
@ -423,13 +423,13 @@ IS_OMAP_TYPE(3430, 0x3430)
|
||||||
#define OMAP3630_REV_ES1_1 (OMAP363X_CLASS | (0x1 << 8))
|
#define OMAP3630_REV_ES1_1 (OMAP363X_CLASS | (0x1 << 8))
|
||||||
#define OMAP3630_REV_ES1_2 (OMAP363X_CLASS | (0x2 << 8))
|
#define OMAP3630_REV_ES1_2 (OMAP363X_CLASS | (0x2 << 8))
|
||||||
|
|
||||||
#define TI816X_CLASS 0x81600034
|
#define TI816X_CLASS 0x81600081
|
||||||
#define TI8168_REV_ES1_0 TI816X_CLASS
|
#define TI8168_REV_ES1_0 TI816X_CLASS
|
||||||
#define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8))
|
#define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8))
|
||||||
#define TI8168_REV_ES2_0 (TI816X_CLASS | (0x2 << 8))
|
#define TI8168_REV_ES2_0 (TI816X_CLASS | (0x2 << 8))
|
||||||
#define TI8168_REV_ES2_1 (TI816X_CLASS | (0x3 << 8))
|
#define TI8168_REV_ES2_1 (TI816X_CLASS | (0x3 << 8))
|
||||||
|
|
||||||
#define TI814X_CLASS 0x81400034
|
#define TI814X_CLASS 0x81400081
|
||||||
#define TI8148_REV_ES1_0 TI814X_CLASS
|
#define TI8148_REV_ES1_0 TI814X_CLASS
|
||||||
#define TI8148_REV_ES2_0 (TI814X_CLASS | (0x1 << 8))
|
#define TI8148_REV_ES2_0 (TI814X_CLASS | (0x1 << 8))
|
||||||
#define TI8148_REV_ES2_1 (TI814X_CLASS | (0x2 << 8))
|
#define TI8148_REV_ES2_1 (TI814X_CLASS | (0x2 << 8))
|
||||||
|
|
34
arch/arm/mach-omap2/ti81xx-restart.c
Normal file
34
arch/arm/mach-omap2/ti81xx-restart.c
Normal file
|
@ -0,0 +1,34 @@
|
||||||
|
/*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License version 2 as
|
||||||
|
* published by the Free Software Foundation.
|
||||||
|
*/
|
||||||
|
#include <linux/kernel.h>
|
||||||
|
#include <linux/init.h>
|
||||||
|
#include <linux/reboot.h>
|
||||||
|
|
||||||
|
#include "iomap.h"
|
||||||
|
#include "common.h"
|
||||||
|
#include "control.h"
|
||||||
|
#include "prm3xxx.h"
|
||||||
|
|
||||||
|
#define TI81XX_PRM_DEVICE_RSTCTRL 0x00a0
|
||||||
|
#define TI81XX_GLOBAL_RST_COLD BIT(1)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* ti81xx_restart - trigger a software restart of the SoC
|
||||||
|
* @mode: the "reboot mode", see arch/arm/kernel/{setup,process}.c
|
||||||
|
* @cmd: passed from the userspace program rebooting the system (if provided)
|
||||||
|
*
|
||||||
|
* Resets the SoC. For @cmd, see the 'reboot' syscall in
|
||||||
|
* kernel/sys.c. No return value.
|
||||||
|
*
|
||||||
|
* NOTE: Warm reset does not seem to work, may require resetting
|
||||||
|
* clocks to bypass mode.
|
||||||
|
*/
|
||||||
|
void ti81xx_restart(enum reboot_mode mode, const char *cmd)
|
||||||
|
{
|
||||||
|
omap2_prm_set_mod_reg_bits(TI81XX_GLOBAL_RST_COLD, 0,
|
||||||
|
TI81XX_PRM_DEVICE_RSTCTRL);
|
||||||
|
while (1);
|
||||||
|
}
|
|
@ -147,6 +147,8 @@ static const struct of_device_id omap_timer_match[] __initconst = {
|
||||||
{ .compatible = "ti,omap3430-timer", },
|
{ .compatible = "ti,omap3430-timer", },
|
||||||
{ .compatible = "ti,omap4430-timer", },
|
{ .compatible = "ti,omap4430-timer", },
|
||||||
{ .compatible = "ti,omap5430-timer", },
|
{ .compatible = "ti,omap5430-timer", },
|
||||||
|
{ .compatible = "ti,dm814-timer", },
|
||||||
|
{ .compatible = "ti,dm816-timer", },
|
||||||
{ .compatible = "ti,am335x-timer", },
|
{ .compatible = "ti,am335x-timer", },
|
||||||
{ .compatible = "ti,am335x-timer-1ms", },
|
{ .compatible = "ti,am335x-timer-1ms", },
|
||||||
{ }
|
{ }
|
||||||
|
|
|
@ -6,7 +6,6 @@ comment "Intel/Marvell Dev Platforms (sorted by hardware release time)"
|
||||||
|
|
||||||
config MACH_PXA27X_DT
|
config MACH_PXA27X_DT
|
||||||
bool "Support PXA27x platforms from device tree"
|
bool "Support PXA27x platforms from device tree"
|
||||||
select CPU_PXA27x
|
|
||||||
select POWER_SUPPLY
|
select POWER_SUPPLY
|
||||||
select PXA27x
|
select PXA27x
|
||||||
select USE_OF
|
select USE_OF
|
||||||
|
@ -84,14 +83,12 @@ config ARCH_VIPER
|
||||||
select I2C_GPIO if I2C=y
|
select I2C_GPIO if I2C=y
|
||||||
select ISA
|
select ISA
|
||||||
select PXA25x
|
select PXA25x
|
||||||
select PXA_HAVE_ISA_IRQS
|
|
||||||
|
|
||||||
config MACH_ARCOM_ZEUS
|
config MACH_ARCOM_ZEUS
|
||||||
bool "Arcom/Eurotech ZEUS SBC"
|
bool "Arcom/Eurotech ZEUS SBC"
|
||||||
select ARCOM_PCMCIA
|
select ARCOM_PCMCIA
|
||||||
select ISA
|
select ISA
|
||||||
select PXA27x
|
select PXA27x
|
||||||
select PXA_HAVE_ISA_IRQS
|
|
||||||
|
|
||||||
config MACH_BALLOON3
|
config MACH_BALLOON3
|
||||||
bool "Balloon 3 board"
|
bool "Balloon 3 board"
|
||||||
|
@ -691,9 +688,6 @@ config SHARPSL_PM_MAX1111
|
||||||
select SPI
|
select SPI
|
||||||
select SPI_MASTER
|
select SPI_MASTER
|
||||||
|
|
||||||
config PXA_HAVE_ISA_IRQS
|
|
||||||
bool
|
|
||||||
|
|
||||||
config PXA310_ULPI
|
config PXA310_ULPI
|
||||||
bool
|
bool
|
||||||
|
|
||||||
|
|
|
@ -26,6 +26,7 @@
|
||||||
#include <linux/i2c.h>
|
#include <linux/i2c.h>
|
||||||
#include <linux/i2c/pxa-i2c.h>
|
#include <linux/i2c/pxa-i2c.h>
|
||||||
#include <linux/io.h>
|
#include <linux/io.h>
|
||||||
|
#include <linux/regulator/machine.h>
|
||||||
#include <linux/spi/spi.h>
|
#include <linux/spi/spi.h>
|
||||||
#include <linux/spi/ads7846.h>
|
#include <linux/spi/ads7846.h>
|
||||||
#include <linux/spi/corgi_lcd.h>
|
#include <linux/spi/corgi_lcd.h>
|
||||||
|
@ -752,6 +753,8 @@ static void __init corgi_init(void)
|
||||||
sharpsl_nand_partitions[1].size = 53 * 1024 * 1024;
|
sharpsl_nand_partitions[1].size = 53 * 1024 * 1024;
|
||||||
|
|
||||||
platform_add_devices(devices, ARRAY_SIZE(devices));
|
platform_add_devices(devices, ARRAY_SIZE(devices));
|
||||||
|
|
||||||
|
regulator_has_full_constraints();
|
||||||
}
|
}
|
||||||
|
|
||||||
static void __init fixup_corgi(struct tag *tags, char **cmdline)
|
static void __init fixup_corgi(struct tag *tags, char **cmdline)
|
||||||
|
|
|
@ -893,6 +893,8 @@ static void __init hx4700_init(void)
|
||||||
mdelay(10);
|
mdelay(10);
|
||||||
gpio_set_value(GPIO71_HX4700_ASIC3_nRESET, 1);
|
gpio_set_value(GPIO71_HX4700_ASIC3_nRESET, 1);
|
||||||
mdelay(10);
|
mdelay(10);
|
||||||
|
|
||||||
|
regulator_has_full_constraints();
|
||||||
}
|
}
|
||||||
|
|
||||||
MACHINE_START(H4700, "HP iPAQ HX4700")
|
MACHINE_START(H4700, "HP iPAQ HX4700")
|
||||||
|
|
|
@ -12,14 +12,10 @@
|
||||||
#ifndef __ASM_MACH_IRQS_H
|
#ifndef __ASM_MACH_IRQS_H
|
||||||
#define __ASM_MACH_IRQS_H
|
#define __ASM_MACH_IRQS_H
|
||||||
|
|
||||||
#ifdef CONFIG_PXA_HAVE_ISA_IRQS
|
#include <asm/irq.h>
|
||||||
#define PXA_ISA_IRQ(x) (x)
|
|
||||||
#define PXA_ISA_IRQ_NUM (16)
|
|
||||||
#else
|
|
||||||
#define PXA_ISA_IRQ_NUM (0)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#define PXA_IRQ(x) (PXA_ISA_IRQ_NUM + (x))
|
#define PXA_ISA_IRQ(x) (x)
|
||||||
|
#define PXA_IRQ(x) (NR_IRQS_LEGACY + (x))
|
||||||
|
|
||||||
#define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */
|
#define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */
|
||||||
#define IRQ_MSL PXA_IRQ(1) /* MSL Interface interrupt */
|
#define IRQ_MSL PXA_IRQ(1) /* MSL Interface interrupt */
|
||||||
|
|
|
@ -25,6 +25,7 @@
|
||||||
#include <linux/gpio.h>
|
#include <linux/gpio.h>
|
||||||
#include <linux/i2c.h>
|
#include <linux/i2c.h>
|
||||||
#include <linux/i2c/pxa-i2c.h>
|
#include <linux/i2c/pxa-i2c.h>
|
||||||
|
#include <linux/regulator/machine.h>
|
||||||
#include <linux/spi/spi.h>
|
#include <linux/spi/spi.h>
|
||||||
#include <linux/spi/ads7846.h>
|
#include <linux/spi/ads7846.h>
|
||||||
#include <linux/spi/pxa2xx_spi.h>
|
#include <linux/spi/pxa2xx_spi.h>
|
||||||
|
@ -455,6 +456,7 @@ static void __init poodle_init(void)
|
||||||
pxa_set_i2c_info(NULL);
|
pxa_set_i2c_info(NULL);
|
||||||
i2c_register_board_info(0, ARRAY_AND_SIZE(poodle_i2c_devices));
|
i2c_register_board_info(0, ARRAY_AND_SIZE(poodle_i2c_devices));
|
||||||
poodle_init_spi();
|
poodle_init_spi();
|
||||||
|
regulator_has_full_constraints();
|
||||||
}
|
}
|
||||||
|
|
||||||
static void __init fixup_poodle(struct tag *tags, char **cmdline)
|
static void __init fixup_poodle(struct tag *tags, char **cmdline)
|
||||||
|
|
|
@ -979,6 +979,8 @@ static void __init spitz_init(void)
|
||||||
spitz_nand_init();
|
spitz_nand_init();
|
||||||
spitz_i2c_init();
|
spitz_i2c_init();
|
||||||
spitz_audio_init();
|
spitz_audio_init();
|
||||||
|
|
||||||
|
regulator_has_full_constraints();
|
||||||
}
|
}
|
||||||
|
|
||||||
static void __init spitz_fixup(struct tag *tags, char **cmdline)
|
static void __init spitz_fixup(struct tag *tags, char **cmdline)
|
||||||
|
|
Loading…
Reference in a new issue