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ARM SoC board specific changes

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These are 18 branches on 9 platforms with board specific changes, mostly
 for defconfig files, but nothing really exciting in here.
 
 Since the shmobile platform still uses board files for some of the newer
 machines, we get a few changes there as the result of drivers getting
 enabled for those boards. This causes some conflicts with contents getting
 added from multiple branches in sh-mobile specific files. Renesas is
 putting a lot of work into migrating to device-tree based setup, which
 will make all those files obsolete in the future and avoid both the
 conflicts and the need to have these files in the first place.
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Merge tag 'boards-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC board specific changes from Arnd Bergmann:
 "These are 18 branches on 9 platforms with board specific changes,
  mostly for defconfig files, but nothing really exciting in here.

  Since the shmobile platform still uses board files for some of the
  newer machines, we get a few changes there as the result of drivers
  getting enabled for those boards.  This causes some conflicts with
  contents getting added from multiple branches in sh-mobile specific
  files.  Renesas is putting a lot of work into migrating to device-tree
  based setup, which will make all those files obsolete in the future
  and avoid both the conflicts and the need to have these files in the
  first place."

* tag 'boards-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (49 commits)
  arm: multi_v7_defconfig: Enable initrd/initramfs support
  arm: multi_v7_defconfig: Enable Zynq UART driver
  ARM: omap2plus_defconfig: enable USB_PHY and NOP_USB_XCEIV
  ARM: OMAP1: nokia770: enable Tahvo
  ARM: OMAP3EVM: Marking omap3_evm_display_init() with CONFIG_BROKEN
  arm: omap: board-overo: reset GPIO for SMSC911x
  ARM: shmobile: BOCK-W: change Ether device name
  ARM: ux500: board-mop500: remove unused pin modes
  ARM: shmobile: bockw: add MMCIF support
  ARM: shmobile: bockw: add SPI FLASH support
  ARM: shmobile: bockw: add I2C device support
  ARM: shmobile: BOCK-W: add Ether support
  ARM: tegra: defconfig updates
  ARM: shmobile: bockw defconfig: add MMCIF support
  ARM: shmobile: bockw defconfig: add M25P80 support
  ARM: shmobile: bockw defconfig: add RTC RX8581 support
  ARM: shmobile: marzen: keep local function as static
  ARM: shmobile: bockw: add SDHI0 support
  ARM: shmobile: marzen: Use INTC External IRQ pin driver for SMSC
  ARM: shmobile: lager: support GPIO switches
  ...
This commit is contained in:
Linus Torvalds 2013-07-02 14:10:26 -07:00
parent 3883cbb6c1 f8ace40e88
commit 40e71e7015
31 changed files with 792 additions and 128 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
arch/arm/boot/dts/kirkwood-lsxl.dtsi
View file

@ -172,6 +172,10 @@
alarm-gpios = <&gpio1 8 0>;
};
restart_poweroff {
compatible = "restart-poweroff";
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;

5
arch/arm/boot/dts/kirkwood-ts219.dtsi
View file

@ -29,6 +29,11 @@
clock-frequency = <200000000>;
status = "okay";
};
poweroff@12100 {
compatible = "qnap,power-off";
reg = <0x12000 0x100>;
clocks = <&gate_clk 7>;
};
spi@10600 {
status = "okay";

2
arch/arm/configs/armadillo800eva_defconfig
View file

@ -86,7 +86,7 @@ CONFIG_TOUCHSCREEN_ST1232=y
# CONFIG_SERIO is not set
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=8
CONFIG_SERIAL_SH_SCI_NR_UARTS=9
CONFIG_SERIAL_SH_SCI_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y

19
arch/arm/configs/bcm2835_defconfig
View file

@ -55,14 +55,11 @@ CONFIG_DEVTMPFS_MOUNT=y
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_SERIO is not set
# CONFIG_VT is not set
# CONFIG_LEGACY_PTYS is not set
# CONFIG_DEVKMEM is not set
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_TTY_PRINTK=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_BCM2835=y
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_BCM2835=y
@ -70,11 +67,27 @@ CONFIG_SPI=y
CONFIG_SPI_BCM2835=y
CONFIG_GPIO_SYSFS=y
# CONFIG_HWMON is not set
CONFIG_FB=y
CONFIG_FB_SIMPLE=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
# CONFIG_USB_SUPPORT is not set
CONFIG_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_SDHCI_BCM2835=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_ONESHOT=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_CPU=y
CONFIG_LEDS_TRIGGER_GPIO=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_LEDS_TRIGGER_TRANSIENT=y
CONFIG_LEDS_TRIGGER_CAMERA=y
# CONFIG_IOMMU_SUPPORT is not set
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y

27
arch/arm/configs/bockw_defconfig
View file

@ -31,6 +31,7 @@ CONFIG_CMDLINE="console=ttySC0,115200 ignore_loglevel root=/dev/nfs ip=dhcp"
CONFIG_CMDLINE_FORCE=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
# CONFIG_SUSPEND is not set
CONFIG_PM_RUNTIME=y
CONFIG_NET=y
CONFIG_UNIX=y
CONFIG_INET=y
@ -48,6 +49,14 @@ CONFIG_DEVTMPFS_MOUNT=y
# CONFIG_STANDALONE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
# CONFIG_FW_LOADER is not set
CONFIG_MTD=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_M25P80=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_NETDEVICES=y
# CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set
@ -71,7 +80,23 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=6
CONFIG_SERIAL_SH_SCI_CONSOLE=y
# CONFIG_HW_RANDOM is not set
# CONFIG_HWMON is not set
# CONFIG_USB_SUPPORT is not set
CONFIG_I2C=y
CONFIG_I2C_RCAR=y
CONFIG_SPI=y
CONFIG_SPI_SH_HSPI=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_HCD_PLATFORM=y
CONFIG_USB_EHCI_HCD_PLATFORM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_RCAR_PHY=y
CONFIG_MMC=y
CONFIG_MMC_SDHI=y
CONFIG_MMC_SH_MMCIF=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_RX8581=y
CONFIG_UIO=y
CONFIG_UIO_PDRV_GENIRQ=y
# CONFIG_IOMMU_SUPPORT is not set

3
arch/arm/configs/kzm9g_defconfig
View file

@ -84,9 +84,12 @@ CONFIG_I2C_CHARDEV=y
CONFIG_I2C_SH_MOBILE=y
CONFIG_GPIO_PCF857X=y
# CONFIG_HWMON is not set
CONFIG_MFD_AS3711=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_AS3711=y
CONFIG_FB=y
CONFIG_FB_SH_MOBILE_LCDC=y
CONFIG_BACKLIGHT_AS3711=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_LOGO=y
CONFIG_FB_SH_MOBILE_MERAM=y

3
arch/arm/configs/multi_v7_defconfig
View file

@ -1,6 +1,7 @@
CONFIG_EXPERIMENTAL=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_ARCH_MVEBU=y
CONFIG_MACH_ARMADA_370=y
CONFIG_ARCH_SIRF=y
@ -48,6 +49,8 @@ CONFIG_SERIAL_SIRFSOC=y
CONFIG_SERIAL_SIRFSOC_CONSOLE=y
CONFIG_SERIAL_VT8500=y
CONFIG_SERIAL_VT8500_CONSOLE=y
CONFIG_SERIAL_XILINX_PS_UART=y
CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
CONFIG_IPMI_HANDLER=y
CONFIG_IPMI_SI=y
CONFIG_I2C=y

2
arch/arm/configs/omap2plus_defconfig
View file

@ -210,6 +210,8 @@ CONFIG_USB_WDM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_LIBUSUAL=y
CONFIG_USB_TEST=y
CONFIG_USB_PHY=y
CONFIG_NOP_USB_XCEIV=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DEBUG=y
CONFIG_USB_GADGET_DEBUG_FILES=y

23
arch/arm/configs/tegra_defconfig
View file

@ -21,8 +21,8 @@ CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_PARTITION_ADVANCED=y
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_TEGRA=y
CONFIG_GPIO_PCA953X=y
CONFIG_ARCH_TEGRA=y
CONFIG_ARCH_TEGRA_2x_SOC=y
CONFIG_ARCH_TEGRA_3x_SOC=y
CONFIG_ARCH_TEGRA_114_SOC=y
@ -36,7 +36,6 @@ CONFIG_HIGHMEM=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_KEXEC=y
CONFIG_AUTO_ZRELADDR=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
CONFIG_CPU_IDLE=y
@ -81,7 +80,6 @@ CONFIG_DEVTMPFS_MOUNT=y
# CONFIG_FIRMWARE_IN_KERNEL is not set
CONFIG_CMA=y
CONFIG_MTD=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_M25P80=y
CONFIG_PROC_DEVICETREE=y
CONFIG_BLK_DEV_LOOP=y
@ -105,8 +103,8 @@ CONFIG_BRCMFMAC=m
CONFIG_RT2X00=y
CONFIG_RT2800USB=m
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_TEGRA=y
CONFIG_KEYBOARD_GPIO=y
CONFIG_KEYBOARD_TEGRA=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_MPU3050=y
# CONFIG_LEGACY_PTYS is not set
@ -121,6 +119,7 @@ CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PINCTRL=y
CONFIG_I2C_TEGRA=y
CONFIG_SPI=y
CONFIG_SPI_TEGRA114=y
CONFIG_SPI_TEGRA20_SFLASH=y
CONFIG_SPI_TEGRA20_SLINK=y
CONFIG_GPIO_PCA953X_IRQ=y
@ -129,14 +128,15 @@ CONFIG_GPIO_TPS6586X=y
CONFIG_GPIO_TPS65910=y
CONFIG_POWER_SUPPLY=y
CONFIG_BATTERY_SBS=y
CONFIG_CHARGER_TPS65090=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_GPIO=y
CONFIG_SENSORS_LM90=y
CONFIG_MFD_MAX8907=y
CONFIG_MFD_PALMAS=y
CONFIG_MFD_TPS65090=y
CONFIG_MFD_TPS6586X=y
CONFIG_MFD_TPS65910=y
CONFIG_MFD_MAX8907=y
CONFIG_MFD_TPS65090=y
CONFIG_MFD_PALMAS=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_VIRTUAL_CONSUMER=y
@ -171,6 +171,7 @@ CONFIG_SND=y
# CONFIG_SND_USB is not set
CONFIG_SND_SOC=y
CONFIG_SND_SOC_TEGRA=y
CONFIG_SND_SOC_TEGRA_RT5640=y
CONFIG_SND_SOC_TEGRA_WM8753=y
CONFIG_SND_SOC_TEGRA_WM8903=y
CONFIG_SND_SOC_TEGRA_TRIMSLICE=y
@ -190,7 +191,13 @@ CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_ONESHOT=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_GPIO=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_LEDS_TRIGGER_TRANSIENT=y
CONFIG_LEDS_TRIGGER_CAMERA=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_MAX8907=y
CONFIG_RTC_DRV_PALMAS=y
@ -203,7 +210,6 @@ CONFIG_TEGRA20_APB_DMA=y
CONFIG_STAGING=y
CONFIG_SENSORS_ISL29018=y
CONFIG_SENSORS_ISL29028=y
CONFIG_AK8975=y
CONFIG_MFD_NVEC=y
CONFIG_KEYBOARD_NVEC=y
CONFIG_SERIO_NVEC_PS2=y
@ -213,6 +219,7 @@ CONFIG_TEGRA_IOMMU_GART=y
CONFIG_TEGRA_IOMMU_SMMU=y
CONFIG_MEMORY=y
CONFIG_IIO=y
CONFIG_AK8975=y
CONFIG_PWM=y
CONFIG_PWM_TEGRA=y
CONFIG_EXT2_FS=y

9
arch/arm/mach-kirkwood/Kconfig
View file

@ -227,6 +227,7 @@ config MACH_KM_KIRKWOOD_DT
config MACH_LSXL_DT
bool "Buffalo Linkstation LS-XHL, LS-CHLv2 (Flattened Device Tree)"
select ARCH_KIRKWOOD_DT
select POWER_RESET_RESTART
help
Say 'Y' here if you want your kernel to support the
Buffalo Linkstation LS-XHL & LS-CHLv2 devices, using
@ -288,6 +289,13 @@ config MACH_READYNAS_DT
Say 'Y' here if you want your kernel to support the
NETGEAR ReadyNAS Duo v2 using Fattened Device Tree.
config MACH_SHEEVAPLUG_DT
bool "Marvell (eSATA) SheevaPlug (Flattened Device Tree)"
select ARCH_KIRKWOOD_DT
help
Say 'Y' here if you want your kernel to support the
Marvell (eSATA) SheevaPlug (Flattened Device Tree).
config MACH_TOPKICK_DT
bool "USI Topkick (Flattened Device Tree)"
select ARCH_KIRKWOOD_DT
@ -300,6 +308,7 @@ config MACH_TS219_DT
select ARCH_KIRKWOOD_DT
select ARM_APPENDED_DTB
select ARM_ATAG_DTB_COMPAT
select POWER_RESET_QNAP
help
Say 'Y' here if you want your kernel to support the QNAP
TS-110, TS-119, TS-119P+, TS-210, TS-219, TS-219P and

1
arch/arm/mach-kirkwood/Makefile
View file

@ -39,5 +39,6 @@ obj-$(CONFIG_MACH_NETSPACE_MINI_V2_DT) += board-ns2.o
obj-$(CONFIG_MACH_NETSPACE_V2_DT) += board-ns2.o
obj-$(CONFIG_MACH_OPENBLOCKS_A6_DT) += board-openblocks_a6.o
obj-$(CONFIG_MACH_READYNAS_DT) += board-readynas.o
obj-$(CONFIG_MACH_SHEEVAPLUG_DT) += board-sheevaplug.o
obj-$(CONFIG_MACH_TOPKICK_DT) += board-usi_topkick.o
obj-$(CONFIG_MACH_TS219_DT) += board-ts219.o tsx1x-common.o

4
arch/arm/mach-kirkwood/board-dt.c
View file

@ -108,6 +108,9 @@ static void __init kirkwood_dt_init(void)
if (of_machine_is_compatible("globalscale,guruplug"))
guruplug_dt_init();
if (of_machine_is_compatible("globalscale,sheevaplug"))
sheevaplug_dt_init();
if (of_machine_is_compatible("dlink,dns-kirkwood"))
dnskw_init();
@ -165,6 +168,7 @@ static void __init kirkwood_dt_init(void)
static const char * const kirkwood_dt_board_compat[] = {
"globalscale,dreamplug",
"globalscale,guruplug",
"globalscale,sheevaplug",
"dlink,dns-320",
"dlink,dns-325",
"iom,iconnect",

16
arch/arm/mach-kirkwood/board-lsxl.c
View file

@ -25,19 +25,6 @@ static struct mv643xx_eth_platform_data lsxl_ge01_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(8),
};
/*
* On the LS-XHL/LS-CHLv2, the shutdown process is following:
* - Userland monitors key events until the power switch goes to off position
* - The board reboots
* - U-boot starts and goes into an idle mode waiting for the user
* to move the switch to ON position
*
*/
static void lsxl_power_off(void)
{
kirkwood_restart('h', NULL);
}
void __init lsxl_init(void)
{
/*
@ -46,7 +33,4 @@ void __init lsxl_init(void)
kirkwood_ge00_init(&lsxl_ge00_data);
kirkwood_ge01_init(&lsxl_ge01_data);
/* register power-off method */
pm_power_off = lsxl_power_off;
}

27
arch/arm/mach-kirkwood/board-sheevaplug.c Normal file
View file

@ -0,0 +1,27 @@
/*
* arch/arm/mach-kirkwood/board-sheevaplug.c
*
* Marvell Sheevaplug Reference Board Init for drivers not converted to
* flattened device tree yet.
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/mv643xx_eth.h>
#include "common.h"
static struct mv643xx_eth_platform_data sheevaplug_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(0),
};
void __init sheevaplug_dt_init(void)
{
/*
* Basic setup. Needs to be called early.
*/
kirkwood_ge00_init(&sheevaplug_ge00_data);
}

3
arch/arm/mach-kirkwood/board-ts219.c
View file

@ -23,7 +23,6 @@
#include <asm/mach/arch.h>
#include <mach/kirkwood.h>
#include "common.h"
#include "tsx1x-common.h"
static struct mv643xx_eth_platform_data qnap_ts219_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(8),
@ -38,6 +37,4 @@ void __init qnap_dt_ts219_init(void)
qnap_ts219_ge00_data.phy_addr = MV643XX_ETH_PHY_ADDR(0);
kirkwood_ge00_init(&qnap_ts219_ge00_data);
pm_power_off = qnap_tsx1x_power_off;
}

5
arch/arm/mach-kirkwood/common.h
View file

@ -67,6 +67,11 @@ void guruplug_dt_init(void);
#else
static inline void guruplug_dt_init(void) {};
#endif
#ifdef CONFIG_MACH_SHEEVAPLUG_DT
void sheevaplug_dt_init(void);
#else
static inline void sheevaplug_dt_init(void) {};
#endif
#ifdef CONFIG_MACH_TS219_DT
void qnap_dt_ts219_init(void);
#else

10
arch/arm/mach-omap1/board-nokia770.c
View file

@ -234,16 +234,26 @@ static struct i2c_board_info nokia770_i2c_board_info_2[] __initdata = {
{
I2C_BOARD_INFO("retu-mfd", 0x01),
},
{
I2C_BOARD_INFO("tahvo-mfd", 0x02),
},
};
static void __init nokia770_cbus_init(void)
{
const int retu_irq_gpio = 62;
const int tahvo_irq_gpio = 40;
if (gpio_request_one(retu_irq_gpio, GPIOF_IN, "Retu IRQ"))
return;
if (gpio_request_one(tahvo_irq_gpio, GPIOF_IN, "Tahvo IRQ")) {
gpio_free(retu_irq_gpio);
return;
}
irq_set_irq_type(gpio_to_irq(retu_irq_gpio), IRQ_TYPE_EDGE_RISING);
irq_set_irq_type(gpio_to_irq(tahvo_irq_gpio), IRQ_TYPE_EDGE_RISING);
nokia770_i2c_board_info_2[0].irq = gpio_to_irq(retu_irq_gpio);
nokia770_i2c_board_info_2[1].irq = gpio_to_irq(tahvo_irq_gpio);
i2c_register_board_info(2, nokia770_i2c_board_info_2,
ARRAY_SIZE(nokia770_i2c_board_info_2));
platform_device_register(&nokia770_cbus_device);

4
arch/arm/mach-omap2/board-omap3evm.c
View file

@ -174,6 +174,7 @@ static struct panel_sharp_ls037v7dw01_data omap3_evm_lcd_data = {
.ud_gpio = OMAP3EVM_LCD_PANEL_UD,
};
#ifdef CONFIG_BROKEN
static void __init omap3_evm_display_init(void)
{
int r;
@ -193,6 +194,7 @@ static void __init omap3_evm_display_init(void)
else
gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1);
}
#endif
static struct omap_dss_device omap3_evm_lcd_device = {
.name = "lcd",
@ -715,7 +717,9 @@ static void __init omap3_evm_init(void)
omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL);
omap3evm_init_smsc911x();
#ifdef CONFIG_BROKEN
omap3_evm_display_init();
#endif
omap3_evm_wl12xx_init();
omap_twl4030_audio_init("omap3evm", NULL);
}

3
arch/arm/mach-omap2/board-overo.c
View file

@ -68,6 +68,7 @@
#define OVERO_SMSC911X_CS 5
#define OVERO_SMSC911X_GPIO 176
#define OVERO_SMSC911X_NRESET 64
#define OVERO_SMSC911X2_CS 4
#define OVERO_SMSC911X2_GPIO 65
@ -122,7 +123,7 @@ static struct omap_smsc911x_platform_data smsc911x_cfg = {
.id = 0,
.cs = OVERO_SMSC911X_CS,
.gpio_irq = OVERO_SMSC911X_GPIO,
.gpio_reset = -EINVAL,
.gpio_reset = OVERO_SMSC911X_NRESET,
.flags = SMSC911X_USE_32BIT,
};

15
arch/arm/mach-shmobile/board-ape6evm.c
View file

@ -26,6 +26,7 @@
#include <linux/platform_device.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/sh_clk.h>
#include <linux/smsc911x.h>
#include <mach/common.h>
#include <mach/irqs.h>
@ -65,7 +66,21 @@ static const struct pinctrl_map ape6evm_pinctrl_map[] = {
static void __init ape6evm_add_standard_devices(void)
{
struct clk *parent;
struct clk *mp;
r8a73a4_clock_init();
/* MP clock parent = extal2 */
parent = clk_get(NULL, "extal2");
mp = clk_get(NULL, "mp");
BUG_ON(IS_ERR(parent) || IS_ERR(mp));
clk_set_parent(mp, parent);
clk_put(parent);
clk_put(mp);
pinctrl_register_mappings(ape6evm_pinctrl_map,
ARRAY_SIZE(ape6evm_pinctrl_map));
r8a73a4_pinmux_init();

159
arch/arm/mach-shmobile/board-bockw.c
View file

@ -18,14 +18,52 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/mfd/tmio.h>
#include <linux/mmc/host.h>
#include <linux/mtd/partitions.h>
#include <linux/pinctrl/machine.h>
#include <linux/platform_device.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/smsc911x.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/r8a7778.h>
#include <asm/mach/arch.h>
/*
* CN9(Upper side) SCIF/RCAN selection
*
* 1,4 3,6
* SW40 SCIF RCAN
* SW41 SCIF RCAN
*/
/*
* MMC (CN26) pin
*
* SW6 (D2) 3 pin
* SW7 (D5) ON
* SW8 (D3) 3 pin
* SW10 (D4) 1 pin
* SW12 (CLK) 1 pin
* SW13 (D6) 3 pin
* SW14 (CMD) ON
* SW15 (D6) 1 pin
* SW16 (D0) ON
* SW17 (D1) ON
* SW18 (D7) 3 pin
* SW19 (MMC) 1 pin
*/
/* Dummy supplies, where voltage doesn't matter */
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vddvario", "smsc911x"),
REGULATOR_SUPPLY("vdd33a", "smsc911x"),
};
static struct smsc911x_platform_config smsc911x_data = {
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
@ -38,36 +76,128 @@ static struct resource smsc911x_resources[] = {
DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
};
/* USB */
static struct rcar_phy_platform_data usb_phy_platform_data __initdata;
/* SDHI */
static struct sh_mobile_sdhi_info sdhi0_info = {
.tmio_caps = MMC_CAP_SD_HIGHSPEED,
.tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
};
static struct sh_eth_plat_data ether_platform_data __initdata = {
.phy = 0x01,
.edmac_endian = EDMAC_LITTLE_ENDIAN,
.register_type = SH_ETH_REG_FAST_RCAR,
.phy_interface = PHY_INTERFACE_MODE_RMII,
/*
* Although the LINK signal is available on the board, it's connected to
* the link/activity LED output of the PHY, thus the link disappears and
* reappears after each packet. We'd be better off ignoring such signal
* and getting the link state from the PHY indirectly.
*/
.no_ether_link = 1,
};
/* I2C */
static struct i2c_board_info i2c0_devices[] = {
{
I2C_BOARD_INFO("rx8581", 0x51),
},
};
/* HSPI*/
static struct mtd_partition m25p80_spi_flash_partitions[] = {
{
.name = "data(spi)",
.size = 0x0100000,
.offset = 0,
},
};
static struct flash_platform_data spi_flash_data = {
.name = "m25p80",
.type = "s25fl008k",
.parts = m25p80_spi_flash_partitions,
.nr_parts = ARRAY_SIZE(m25p80_spi_flash_partitions),
};
static struct spi_board_info spi_board_info[] __initdata = {
{
.modalias = "m25p80",
.max_speed_hz = 104000000,
.chip_select = 0,
.bus_num = 0,
.mode = SPI_MODE_0,
.platform_data = &spi_flash_data,
},
};
/* MMC */
static struct sh_mmcif_plat_data sh_mmcif_plat = {
.sup_pclk = 0,
.ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
.caps = MMC_CAP_4_BIT_DATA |
MMC_CAP_8_BIT_DATA |
MMC_CAP_NEEDS_POLL,
};
static const struct pinctrl_map bockw_pinctrl_map[] = {
/* Ether */
PIN_MAP_MUX_GROUP_DEFAULT("r8a777x-ether", "pfc-r8a7778",
"ether_rmii", "ether"),
/* HSPI0 */
PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7778",
"hspi0_a", "hspi0"),
/* MMC */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
"mmc_data8", "mmc"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
"mmc_ctrl", "mmc"),
/* SCIF0 */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
"scif0_data_a", "scif0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
"scif0_ctrl", "scif0"),
/* USB */
PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
"usb0", "usb0"),
PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
"usb1", "usb1"),
/* SDHI0 */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
"sdhi0", "sdhi0"),
};
#define FPGA 0x18200000
#define IRQ0MR 0x30
#define PFC 0xfffc0000
#define PUPR4 0x110
static void __init bockw_init(void)
{
void __iomem *fpga;
void __iomem *base;
r8a7778_clock_init();
r8a7778_init_irq_extpin(1);
r8a7778_add_standard_devices();
r8a7778_add_usb_phy_device(&usb_phy_platform_data);
r8a7778_add_ether_device(&ether_platform_data);
r8a7778_add_i2c_device(0);
r8a7778_add_hspi_device(0);
r8a7778_add_mmc_device(&sh_mmcif_plat);
i2c_register_board_info(0, i2c0_devices,
ARRAY_SIZE(i2c0_devices));
spi_register_board_info(spi_board_info,
ARRAY_SIZE(spi_board_info));
pinctrl_register_mappings(bockw_pinctrl_map,
ARRAY_SIZE(bockw_pinctrl_map));
r8a7778_pinmux_init();
fpga = ioremap_nocache(0x18200000, SZ_1M);
if (fpga) {
/* for SMSC */
base = ioremap_nocache(FPGA, SZ_1M);
if (base) {
/*
* CAUTION
*
@ -75,16 +205,33 @@ static void __init bockw_init(void)
* it should be cared in the future
* Now, it is assuming IRQ0 was used only from SMSC.
*/
u16 val = ioread16(fpga + IRQ0MR);
u16 val = ioread16(base + IRQ0MR);
val &= ~(1 << 4); /* enable SMSC911x */
iowrite16(val, fpga + IRQ0MR);
iounmap(fpga);
iowrite16(val, base + IRQ0MR);
iounmap(base);
regulator_register_fixed(0, dummy_supplies,
ARRAY_SIZE(dummy_supplies));
platform_device_register_resndata(
&platform_bus, "smsc911x", -1,
smsc911x_resources, ARRAY_SIZE(smsc911x_resources),
&smsc911x_data, sizeof(smsc911x_data));
}
/* for SDHI */
base = ioremap_nocache(PFC, 0x200);
if (base) {
/*
* FIXME
*
* SDHI CD/WP pin needs pull-up
*/
iowrite32(ioread32(base + PUPR4) | (3 << 26), base + PUPR4);
iounmap(base);
r8a7778_sdhi_init(0, &sdhi0_info);
}
}
static const char *bockw_boards_compat_dt[] __initdata = {

2
arch/arm/mach-shmobile/board-kzm9d.c
View file

@ -56,7 +56,7 @@ static struct smsc911x_platform_config smsc911x_platdata = {
static struct platform_device smsc91x_device = {
.name = "smsc911x",
.id = 0,
.id = -1,
.dev = {
.platform_data = &smsc911x_platdata,
},

193
arch/arm/mach-shmobile/board-kzm9g.c
View file

@ -29,6 +29,7 @@
#include <linux/mmc/host.h>
#include <linux/mmc/sh_mmcif.h>
#include <linux/mmc/sh_mobile_sdhi.h>
#include <linux/mfd/as3711.h>
#include <linux/mfd/tmio.h>
#include <linux/pinctrl/machine.h>
#include <linux/pinctrl/pinconf-generic.h>
@ -606,6 +607,140 @@ static struct platform_device fsi_ak4648_device = {
};
/* I2C */
/* StepDown1 is used to supply 1.315V to the CPU */
static struct regulator_init_data as3711_sd1 = {
.constraints = {
.name = "1.315V CPU",
.boot_on = 1,
.always_on = 1,
.min_uV = 1315000,
.max_uV = 1335000,
},
};
/* StepDown2 is used to supply 1.8V to the CPU and to the board */
static struct regulator_init_data as3711_sd2 = {
.constraints = {
.name = "1.8V",
.boot_on = 1,
.always_on = 1,
.min_uV = 1800000,
.max_uV = 1800000,
},
};
/*
* StepDown3 is switched in parallel with StepDown2, seems to be off,
* according to read-back pre-set register values
*/
/* StepDown4 is used to supply 1.215V to the CPU and to the board */
static struct regulator_init_data as3711_sd4 = {
.constraints = {
.name = "1.215V",
.boot_on = 1,
.always_on = 1,
.min_uV = 1215000,
.max_uV = 1235000,
},
};
/* LDO1 is unused and unconnected */
/* LDO2 is used to supply 2.8V to the CPU */
static struct regulator_init_data as3711_ldo2 = {
.constraints = {
.name = "2.8V CPU",
.boot_on = 1,
.always_on = 1,
.min_uV = 2800000,
.max_uV = 2800000,
},
};
/* LDO3 is used to supply 3.0V to the CPU */
static struct regulator_init_data as3711_ldo3 = {
.constraints = {
.name = "3.0V CPU",
.boot_on = 1,
.always_on = 1,
.min_uV = 3000000,
.max_uV = 3000000,
},
};
/* LDO4 is used to supply 2.8V to the board */
static struct regulator_init_data as3711_ldo4 = {
.constraints = {
.name = "2.8V",
.boot_on = 1,
.always_on = 1,
.min_uV = 2800000,
.max_uV = 2800000,
},
};
/* LDO5 is switched parallel to LDO4, also set to 2.8V */
static struct regulator_init_data as3711_ldo5 = {
.constraints = {
.name = "2.8V #2",
.boot_on = 1,
.always_on = 1,
.min_uV = 2800000,
.max_uV = 2800000,
},
};
/* LDO6 is unused and unconnected */
/* LDO7 is used to supply 1.15V to the CPU */
static struct regulator_init_data as3711_ldo7 = {
.constraints = {
.name = "1.15V CPU",
.boot_on = 1,
.always_on = 1,
.min_uV = 1150000,
.max_uV = 1150000,
},
};
/* LDO8 is switched parallel to LDO7, also set to 1.15V */
static struct regulator_init_data as3711_ldo8 = {
.constraints = {
.name = "1.15V CPU #2",
.boot_on = 1,
.always_on = 1,
.min_uV = 1150000,
.max_uV = 1150000,
},
};
static struct as3711_platform_data as3711_pdata = {
.regulator = {
.init_data = {
[AS3711_REGULATOR_SD_1] = &as3711_sd1,
[AS3711_REGULATOR_SD_2] = &as3711_sd2,
[AS3711_REGULATOR_SD_4] = &as3711_sd4,
[AS3711_REGULATOR_LDO_2] = &as3711_ldo2,
[AS3711_REGULATOR_LDO_3] = &as3711_ldo3,
[AS3711_REGULATOR_LDO_4] = &as3711_ldo4,
[AS3711_REGULATOR_LDO_5] = &as3711_ldo5,
[AS3711_REGULATOR_LDO_7] = &as3711_ldo7,
[AS3711_REGULATOR_LDO_8] = &as3711_ldo8,
},
},
.backlight = {
.su2_fb = "sh_mobile_lcdc_fb.0",
.su2_max_uA = 36000,
.su2_feedback = AS3711_SU2_CURR_AUTO,
.su2_fbprot = AS3711_SU2_GPIO4,
.su2_auto_curr1 = true,
.su2_auto_curr2 = true,
.su2_auto_curr3 = true,
},
};
static struct pcf857x_platform_data pcf8575_pdata = {
.gpio_base = GPIO_PCF8575_BASE,
};
@ -625,6 +760,11 @@ static struct i2c_board_info i2c0_devices[] = {
I2C_BOARD_INFO("adxl34x", 0x1d),
.irq = irq_pin(26), /* IRQ26 */
},
{
I2C_BOARD_INFO("as3711", 0x40),
.irq = intcs_evt2irq(0x3300), /* IRQ24 */
.platform_data = &as3711_pdata,
},
};
static struct i2c_board_info i2c1_devices[] = {
@ -715,59 +855,6 @@ static const struct pinctrl_map kzm_pinctrl_map[] = {
"usb_vbus", "usb"),
};
/*
* FIXME
*
* This is quick hack for enabling LCDC backlight
*/
static int __init as3711_enable_lcdc_backlight(void)
{
struct i2c_adapter *a = i2c_get_adapter(0);
struct i2c_msg msg;
int i, ret;
__u8 magic[] = {
0x40, 0x2a,
0x43, 0x3c,
0x44, 0x3c,
0x45, 0x3c,
0x54, 0x03,
0x51, 0x00,
0x51, 0x01,
0xff, 0x00, /* wait */
0x43, 0xf0,
0x44, 0xf0,
0x45, 0xf0,
};
if (!of_machine_is_compatible("renesas,kzm9g"))
return 0;
if (!a)
return 0;
msg.addr = 0x40;
msg.len = 2;
msg.flags = 0;
for (i = 0; i < ARRAY_SIZE(magic); i += 2) {
msg.buf = magic + i;
if (0xff == msg.buf[0]) {
udelay(500);
continue;
}
ret = i2c_transfer(a, &msg, 1);
if (ret < 0) {
pr_err("i2c transfer fail\n");
break;
}
}
return 0;
}
device_initcall(as3711_enable_lcdc_backlight);
static void __init kzm_init(void)
{
regulator_register_always_on(2, "fixed-1.8V", fixed1v8_power_consumers,

49
arch/arm/mach-shmobile/board-lager.c
View file

@ -18,16 +18,59 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/gpio.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <linux/interrupt.h>
#include <linux/irqchip.h>
#include <linux/kernel.h>
#include <linux/leds.h>
#include <linux/pinctrl/machine.h>
#include <linux/platform_data/gpio-rcar.h>
#include <linux/platform_device.h>
#include <mach/common.h>
#include <mach/r8a7790.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
/* LEDS */
static struct gpio_led lager_leds[] = {
{
.name = "led8",
.gpio = RCAR_GP_PIN(5, 17),
.default_state = LEDS_GPIO_DEFSTATE_ON,
}, {
.name = "led7",
.gpio = RCAR_GP_PIN(4, 23),
.default_state = LEDS_GPIO_DEFSTATE_ON,
}, {
.name = "led6",
.gpio = RCAR_GP_PIN(4, 22),
.default_state = LEDS_GPIO_DEFSTATE_ON,
},
};
static __initdata struct gpio_led_platform_data lager_leds_pdata = {
.leds = lager_leds,
.num_leds = ARRAY_SIZE(lager_leds),
};
/* GPIO KEY */
#define GPIO_KEY(c, g, d, ...) \
{ .code = c, .gpio = g, .desc = d, .active_low = 1 }
static __initdata struct gpio_keys_button gpio_buttons[] = {
GPIO_KEY(KEY_4, RCAR_GP_PIN(1, 28), "SW2-pin4"),
GPIO_KEY(KEY_3, RCAR_GP_PIN(1, 26), "SW2-pin3"),
GPIO_KEY(KEY_2, RCAR_GP_PIN(1, 24), "SW2-pin2"),
GPIO_KEY(KEY_1, RCAR_GP_PIN(1, 14), "SW2-pin1"),
};
static __initdata struct gpio_keys_platform_data lager_keys_pdata = {
.buttons = gpio_buttons,
.nbuttons = ARRAY_SIZE(gpio_buttons),
};
static const struct pinctrl_map lager_pinctrl_map[] = {
/* SCIF0 (CN19: DEBUG SERIAL0) */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
@ -46,6 +89,12 @@ static void __init lager_add_standard_devices(void)
r8a7790_pinmux_init();
r8a7790_add_standard_devices();
platform_device_register_data(&platform_bus, "leds-gpio", -1,
&lager_leds_pdata,
sizeof(lager_leds_pdata));
platform_device_register_data(&platform_bus, "gpio-keys", -1,
&lager_keys_pdata,
sizeof(lager_keys_pdata));
}
static const char *lager_boards_compat_dt[] __initdata = {

3
arch/arm/mach-shmobile/board-marzen.c
View file

@ -67,7 +67,7 @@ static struct resource smsc911x_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = gic_iid(0x3c), /* IRQ 1 */
.start = irq_pin(1), /* IRQ 1 */
.flags = IORESOURCE_IRQ,
},
};
@ -231,6 +231,7 @@ static void __init marzen_init(void)
pinctrl_register_mappings(marzen_pinctrl_map,
ARRAY_SIZE(marzen_pinctrl_map));
r8a7779_pinmux_init();
r8a7779_init_irq_extpin(1); /* IRQ1 as individual interrupt */
r8a7779_add_standard_devices();
r8a7779_add_usb_phy_device(&usb_phy_platform_data);

283
arch/arm/mach-ux500/board-mop500-pins.c
View file

@ -9,6 +9,7 @@
#include <linux/bug.h>
#include <linux/string.h>
#include <linux/pinctrl/machine.h>
#include <linux/pinctrl/pinconf-generic.h>
#include <linux/platform_data/pinctrl-nomadik.h>
#include <asm/mach-types.h>
@ -34,6 +35,11 @@ BIAS(in_pd, PIN_INPUT_PULLDOWN);
BIAS(out_hi, PIN_OUTPUT_HIGH);
BIAS(out_lo, PIN_OUTPUT_LOW);
BIAS(out_lo_slpm_nowkup, PIN_OUTPUT_LOW|PIN_SLPM_WAKEUP_DISABLE);
BIAS(abx500_out_lo, PIN_CONF_PACKED(PIN_CONFIG_OUTPUT, 0));
BIAS(abx500_in_pd, PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_DOWN, 1));
BIAS(abx500_in_nopull, PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_DOWN, 0));
/* These also force them into GPIO mode */
BIAS(gpio_in_pu, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED);
BIAS(gpio_in_pd, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED);
@ -42,8 +48,6 @@ BIAS(gpio_in_pd_slpm_gpio_nopull, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED|PIN_SL
BIAS(gpio_out_hi, PIN_OUTPUT_HIGH|PIN_GPIOMODE_ENABLED);
BIAS(gpio_out_lo, PIN_OUTPUT_LOW|PIN_GPIOMODE_ENABLED);
/* Sleep modes */
BIAS(slpm_in_nopull_wkup, PIN_SLEEPMODE_ENABLED|
PIN_SLPM_DIR_INPUT|PIN_SLPM_PULL_NONE|PIN_SLPM_WAKEUP_ENABLE);
BIAS(slpm_in_wkup_pdis, PIN_SLEEPMODE_ENABLED|
PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
BIAS(slpm_in_wkup_pdis_en, PIN_SLEEPMODE_ENABLED|
@ -54,8 +58,6 @@ BIAS(slpm_wkup_pdis_en, PIN_SLEEPMODE_ENABLED|
PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_ENABLED);
BIAS(slpm_out_lo_pdis, PIN_SLEEPMODE_ENABLED|
PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_DISABLE|PIN_SLPM_PDIS_DISABLED);
BIAS(slpm_out_lo_wkup, PIN_SLEEPMODE_ENABLED|
PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE);
BIAS(slpm_out_lo_wkup_pdis, PIN_SLEEPMODE_ENABLED|
PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
BIAS(slpm_out_hi_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_OUTPUT_HIGH|
@ -97,6 +99,252 @@ BIAS(out_wkup_pdis, PIN_SLPM_DIR_OUTPUT|PIN_SLPM_WAKEUP_ENABLE|
#define DB8500_PIN_STATE(pin, conf, dev, state) \
PIN_MAP_CONFIGS_PIN(dev, state, "pinctrl-db8500", pin, conf)
#define AB8500_MUX_HOG(group, func) \
PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-ab8500.0", group, func)
#define AB8500_PIN_HOG(pin, conf) \
PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-ab8500.0", pin, abx500_##conf)
#define AB8500_MUX_STATE(group, func, dev, state) \
PIN_MAP_MUX_GROUP(dev, state, "pinctrl-ab8500.0", group, func)
#define AB8500_PIN_STATE(pin, conf, dev, state) \
PIN_MAP_CONFIGS_PIN(dev, state, "pinctrl-ab8500.0", pin, abx500_##conf)
#define AB8505_MUX_HOG(group, func) \
PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-ab8505.0", group, func)
#define AB8505_PIN_HOG(pin, conf) \
PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-ab8505.0", pin, abx500_##conf)
#define AB8505_MUX_STATE(group, func, dev, state) \
PIN_MAP_MUX_GROUP(dev, state, "pinctrl-ab8505.0", group, func)
#define AB8505_PIN_STATE(pin, conf, dev, state) \
PIN_MAP_CONFIGS_PIN(dev, state, "pinctrl-ab8505.0", pin, abx500_##conf)
static struct pinctrl_map __initdata ab8500_pinmap[] = {
/* Sysclkreq2 */
AB8500_MUX_STATE("sysclkreq2_d_1", "sysclkreq", "regulator.35", PINCTRL_STATE_DEFAULT),
AB8500_PIN_STATE("GPIO1_T10", in_nopull, "regulator.35", PINCTRL_STATE_DEFAULT),
/* sysclkreq2 disable, mux in gpio configured in input pulldown */
AB8500_MUX_STATE("gpio1_a_1", "gpio", "regulator.35", PINCTRL_STATE_SLEEP),
AB8500_PIN_STATE("GPIO1_T10", in_pd, "regulator.35", PINCTRL_STATE_SLEEP),
/* pins 2 is muxed in GPIO, configured in INPUT PULL DOWN */
AB8500_MUX_HOG("gpio2_a_1", "gpio"),
AB8500_PIN_HOG("GPIO2_T9", in_pd),
/* Sysclkreq4 */
AB8500_MUX_STATE("sysclkreq4_d_1", "sysclkreq", "regulator.36", PINCTRL_STATE_DEFAULT),
AB8500_PIN_STATE("GPIO3_U9", in_nopull, "regulator.36", PINCTRL_STATE_DEFAULT),
/* sysclkreq4 disable, mux in gpio configured in input pulldown */
AB8500_MUX_STATE("gpio3_a_1", "gpio", "regulator.36", PINCTRL_STATE_SLEEP),
AB8500_PIN_STATE("GPIO3_U9", in_pd, "regulator.36", PINCTRL_STATE_SLEEP),
/* pins 4 is muxed in GPIO, configured in INPUT PULL DOWN */
AB8500_MUX_HOG("gpio4_a_1", "gpio"),
AB8500_PIN_HOG("GPIO4_W2", in_pd),
/*
* pins 6,7,8 and 9 are muxed in YCBCR0123
* configured in INPUT PULL UP
*/
AB8500_MUX_HOG("ycbcr0123_d_1", "ycbcr"),
AB8500_PIN_HOG("GPIO6_Y18", in_nopull),
AB8500_PIN_HOG("GPIO7_AA20", in_nopull),
AB8500_PIN_HOG("GPIO8_W18", in_nopull),
AB8500_PIN_HOG("GPIO9_AA19", in_nopull),
/*
* pins 10,11,12 and 13 are muxed in GPIO
* configured in INPUT PULL DOWN
*/
AB8500_MUX_HOG("gpio10_d_1", "gpio"),
AB8500_PIN_HOG("GPIO10_U17", in_pd),
AB8500_MUX_HOG("gpio11_d_1", "gpio"),
AB8500_PIN_HOG("GPIO11_AA18", in_pd),
AB8500_MUX_HOG("gpio12_d_1", "gpio"),
AB8500_PIN_HOG("GPIO12_U16", in_pd),
AB8500_MUX_HOG("gpio13_d_1", "gpio"),
AB8500_PIN_HOG("GPIO13_W17", in_pd),
/*
* pins 14,15 are muxed in PWM1 and PWM2
* configured in INPUT PULL DOWN
*/
AB8500_MUX_HOG("pwmout1_d_1", "pwmout"),
AB8500_PIN_HOG("GPIO14_F14", in_pd),
AB8500_MUX_HOG("pwmout2_d_1", "pwmout"),
AB8500_PIN_HOG("GPIO15_B17", in_pd),
/*
* pins 16 is muxed in GPIO
* configured in INPUT PULL DOWN
*/
AB8500_MUX_HOG("gpio16_a_1", "gpio"),
AB8500_PIN_HOG("GPIO14_F14", in_pd),
/*
* pins 17,18,19 and 20 are muxed in AUDIO interface 1
* configured in INPUT PULL DOWN
*/
AB8500_MUX_HOG("adi1_d_1", "adi1"),
AB8500_PIN_HOG("GPIO17_P5", in_pd),
AB8500_PIN_HOG("GPIO18_R5", in_pd),
AB8500_PIN_HOG("GPIO19_U5", in_pd),
AB8500_PIN_HOG("GPIO20_T5", in_pd),
/*
* pins 21,22 and 23 are muxed in USB UICC
* configured in INPUT PULL DOWN
*/
AB8500_MUX_HOG("usbuicc_d_1", "usbuicc"),
AB8500_PIN_HOG("GPIO21_H19", in_pd),
AB8500_PIN_HOG("GPIO22_G20", in_pd),
AB8500_PIN_HOG("GPIO23_G19", in_pd),
/*
* pins 24,25 are muxed in GPIO
* configured in INPUT PULL DOWN
*/
AB8500_MUX_HOG("gpio24_a_1", "gpio"),
AB8500_PIN_HOG("GPIO24_T14", in_pd),
AB8500_MUX_HOG("gpio25_a_1", "gpio"),
AB8500_PIN_HOG("GPIO25_R16", in_pd),
/*
* pins 26 is muxed in GPIO
* configured in OUTPUT LOW
*/
AB8500_MUX_HOG("gpio26_d_1", "gpio"),
AB8500_PIN_HOG("GPIO26_M16", out_lo),
/*
* pins 27,28 are muxed in DMIC12
* configured in INPUT PULL DOWN
*/
AB8500_MUX_HOG("dmic12_d_1", "dmic"),
AB8500_PIN_HOG("GPIO27_J6", in_pd),
AB8500_PIN_HOG("GPIO28_K6", in_pd),
/*
* pins 29,30 are muxed in DMIC34
* configured in INPUT PULL DOWN
*/
AB8500_MUX_HOG("dmic34_d_1", "dmic"),
AB8500_PIN_HOG("GPIO29_G6", in_pd),
AB8500_PIN_HOG("GPIO30_H6", in_pd),
/*
* pins 31,32 are muxed in DMIC56
* configured in INPUT PULL DOWN
*/
AB8500_MUX_HOG("dmic56_d_1", "dmic"),
AB8500_PIN_HOG("GPIO31_F5", in_pd),
AB8500_PIN_HOG("GPIO32_G5", in_pd),
/*
* pins 34 is muxed in EXTCPENA
* configured INPUT PULL DOWN
*/
AB8500_MUX_HOG("extcpena_d_1", "extcpena"),
AB8500_PIN_HOG("GPIO34_R17", in_pd),
/*
* pins 35 is muxed in GPIO
* configured in OUTPUT LOW
*/
AB8500_MUX_HOG("gpio35_d_1", "gpio"),
AB8500_PIN_HOG("GPIO35_W15", in_pd),
/*
* pins 36,37,38 and 39 are muxed in GPIO
* configured in INPUT PULL DOWN
*/
AB8500_MUX_HOG("gpio36_a_1", "gpio"),
AB8500_PIN_HOG("GPIO36_A17", in_pd),
AB8500_MUX_HOG("gpio37_a_1", "gpio"),
AB8500_PIN_HOG("GPIO37_E15", in_pd),
AB8500_MUX_HOG("gpio38_a_1", "gpio"),
AB8500_PIN_HOG("GPIO38_C17", in_pd),
AB8500_MUX_HOG("gpio39_a_1", "gpio"),
AB8500_PIN_HOG("GPIO39_E16", in_pd),
/*
* pins 40 and 41 are muxed in MODCSLSDA
* configured INPUT PULL DOWN
*/
AB8500_MUX_HOG("modsclsda_d_1", "modsclsda"),
AB8500_PIN_HOG("GPIO40_T19", in_pd),
AB8500_PIN_HOG("GPIO41_U19", in_pd),
/*
* pins 42 is muxed in GPIO
* configured INPUT PULL DOWN
*/
AB8500_MUX_HOG("gpio42_a_1", "gpio"),
AB8500_PIN_HOG("GPIO42_U2", in_pd),
};
static struct pinctrl_map __initdata ab8505_pinmap[] = {
/* Sysclkreq2 */
AB8505_MUX_STATE("sysclkreq2_d_1", "sysclkreq", "regulator.36", PINCTRL_STATE_DEFAULT),
AB8505_PIN_STATE("GPIO1_N4", in_nopull, "regulator.36", PINCTRL_STATE_DEFAULT),
/* sysclkreq2 disable, mux in gpio configured in input pulldown */
AB8505_MUX_STATE("gpio1_a_1", "gpio", "regulator.36", PINCTRL_STATE_SLEEP),
AB8505_PIN_STATE("GPIO1_N4", in_pd, "regulator.36", PINCTRL_STATE_SLEEP),
/* pins 2 is muxed in GPIO, configured in INPUT PULL DOWN */
AB8505_MUX_HOG("gpio2_a_1", "gpio"),
AB8505_PIN_HOG("GPIO2_R5", in_pd),
/* Sysclkreq4 */
AB8505_MUX_STATE("sysclkreq4_d_1", "sysclkreq", "regulator.37", PINCTRL_STATE_DEFAULT),
AB8505_PIN_STATE("GPIO3_P5", in_nopull, "regulator.37", PINCTRL_STATE_DEFAULT),
/* sysclkreq4 disable, mux in gpio configured in input pulldown */
AB8505_MUX_STATE("gpio3_a_1", "gpio", "regulator.37", PINCTRL_STATE_SLEEP),
AB8505_PIN_STATE("GPIO3_P5", in_pd, "regulator.37", PINCTRL_STATE_SLEEP),
AB8505_MUX_HOG("gpio10_d_1", "gpio"),
AB8505_PIN_HOG("GPIO10_B16", in_pd),
AB8505_MUX_HOG("gpio11_d_1", "gpio"),
AB8505_PIN_HOG("GPIO11_B17", in_pd),
AB8505_MUX_HOG("gpio13_d_1", "gpio"),
AB8505_PIN_HOG("GPIO13_D17", in_nopull),
AB8505_MUX_HOG("pwmout1_d_1", "pwmout"),
AB8505_PIN_HOG("GPIO14_C16", in_pd),
AB8505_MUX_HOG("adi2_d_1", "adi2"),
AB8505_PIN_HOG("GPIO17_P2", in_pd),
AB8505_PIN_HOG("GPIO18_N3", in_pd),
AB8505_PIN_HOG("GPIO19_T1", in_pd),
AB8505_PIN_HOG("GPIO20_P3", in_pd),
AB8505_MUX_HOG("gpio34_a_1", "gpio"),
AB8505_PIN_HOG("GPIO34_H14", in_pd),
AB8505_MUX_HOG("modsclsda_d_1", "modsclsda"),
AB8505_PIN_HOG("GPIO40_J15", in_pd),
AB8505_PIN_HOG("GPIO41_J14", in_pd),
AB8505_MUX_HOG("gpio50_d_1", "gpio"),
AB8505_PIN_HOG("GPIO50_L4", in_nopull),
AB8505_MUX_HOG("resethw_d_1", "resethw"),
AB8505_PIN_HOG("GPIO52_D16", in_pd),
AB8505_MUX_HOG("service_d_1", "service"),
AB8505_PIN_HOG("GPIO53_D15", in_pd),
};
/* Pin control settings */
static struct pinctrl_map __initdata mop500_family_pinmap[] = {
/*
@ -174,17 +422,12 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = {
DB8500_PIN_SLEEP("GPIO4_AH6", slpm_in_wkup_pdis, "uart1"),
DB8500_PIN_SLEEP("GPIO5_AG6", slpm_out_wkup_pdis, "uart1"),
/* MSP1 for ALSA codec */
DB8500_MUX("msp1txrx_a_1", "msp1", "ux500-msp-i2s.1"),
DB8500_MUX("msp1_a_1", "msp1", "ux500-msp-i2s.1"),
DB8500_PIN("GPIO33_AF2", out_lo_slpm_nowkup, "ux500-msp-i2s.1"),
DB8500_PIN("GPIO34_AE1", in_nopull_slpm_nowkup, "ux500-msp-i2s.1"),
DB8500_PIN("GPIO35_AE2", in_nopull_slpm_nowkup, "ux500-msp-i2s.1"),
DB8500_PIN("GPIO36_AG2", in_nopull_slpm_nowkup, "ux500-msp-i2s.1"),
/* MSP1 sleep state */
DB8500_PIN_SLEEP("GPIO33_AF2", slpm_out_lo_wkup, "ux500-msp-i2s.1"),
DB8500_PIN_SLEEP("GPIO34_AE1", slpm_in_nopull_wkup, "ux500-msp-i2s.1"),
DB8500_PIN_SLEEP("GPIO35_AE2", slpm_in_nopull_wkup, "ux500-msp-i2s.1"),
DB8500_PIN_SLEEP("GPIO36_AG2", slpm_in_nopull_wkup, "ux500-msp-i2s.1"),
DB8500_MUX_HOG("msp1txrx_a_1", "msp1"),
DB8500_MUX_HOG("msp1_a_1", "msp1"),
DB8500_PIN_HOG("GPIO33_AF2", out_lo_slpm_nowkup),
DB8500_PIN_HOG("GPIO34_AE1", in_nopull_slpm_nowkup),
DB8500_PIN_HOG("GPIO35_AE2", in_nopull_slpm_nowkup),
DB8500_PIN_HOG("GPIO36_AG2", in_nopull_slpm_nowkup),
/* Mux in LCD data lines 8 thru 11 and LCDA CLK for MCDE TVOUT */
DB8500_MUX("lcd_d8_d11_a_1", "lcd", "mcde-tvout"),
DB8500_MUX("lcdaclk_b_1", "lcda", "mcde-tvout"),
@ -821,6 +1064,12 @@ void __init mop500_pinmaps_init(void)
pinctrl_register_mappings(mop500_pinmap,
ARRAY_SIZE(mop500_pinmap));
mop500_href_family_pinmaps_init();
if (machine_is_u8520())
pinctrl_register_mappings(ab8505_pinmap,
ARRAY_SIZE(ab8505_pinmap));
else
pinctrl_register_mappings(ab8500_pinmap,
ARRAY_SIZE(ab8500_pinmap));
}
void __init snowball_pinmaps_init(void)
@ -831,6 +1080,8 @@ void __init snowball_pinmaps_init(void)
ARRAY_SIZE(snowball_pinmap));
pinctrl_register_mappings(u8500_pinmap,
ARRAY_SIZE(u8500_pinmap));
pinctrl_register_mappings(ab8500_pinmap,
ARRAY_SIZE(ab8500_pinmap));
}
void __init hrefv60_pinmaps_init(void)
@ -840,4 +1091,6 @@ void __init hrefv60_pinmaps_init(void)
pinctrl_register_mappings(hrefv60_pinmap,
ARRAY_SIZE(hrefv60_pinmap));
mop500_href_family_pinmaps_init();
pinctrl_register_mappings(ab8500_pinmap,
ARRAY_SIZE(ab8500_pinmap));
}

1
arch/arm/mach-ux500/board-mop500-regulators.c
View file

@ -999,7 +999,6 @@ struct ab8500_regulator_platform_data ab8500_regulator_plat_data = {
.num_ext_regulator = ARRAY_SIZE(ab8500_ext_regulators),
};
/* Use the AB8500 init settings for AB8505 as they are the same right now */
struct ab8500_regulator_platform_data ab8505_regulator_plat_data = {
.reg_init = ab8505_reg_init,
.num_reg_init = ARRAY_SIZE(ab8505_reg_init),

34
arch/arm/mach-ux500/board-mop500-sdi.c
View file

@ -52,11 +52,13 @@ static struct stedma40_chan_cfg mop500_sdi0_dma_cfg_tx = {
#endif
struct mmci_platform_data mop500_sdi0_data = {
.ocr_mask = MMC_VDD_29_30,
.f_max = 50000000,
.f_max = 100000000,
.capabilities = MMC_CAP_4_BIT_DATA |
MMC_CAP_SD_HIGHSPEED |
MMC_CAP_MMC_HIGHSPEED,
MMC_CAP_MMC_HIGHSPEED |
MMC_CAP_ERASE |
MMC_CAP_UHS_SDR12 |
MMC_CAP_UHS_SDR25,
.gpio_wp = -1,
.sigdir = MCI_ST_FBCLKEN |
MCI_ST_CMDDIREN |
@ -106,8 +108,9 @@ static struct stedma40_chan_cfg sdi1_dma_cfg_tx = {
struct mmci_platform_data mop500_sdi1_data = {
.ocr_mask = MMC_VDD_29_30,
.f_max = 50000000,
.capabilities = MMC_CAP_4_BIT_DATA,
.f_max = 100000000,
.capabilities = MMC_CAP_4_BIT_DATA |
MMC_CAP_NONREMOVABLE,
.gpio_cd = -1,
.gpio_wp = -1,
#ifdef CONFIG_STE_DMA40
@ -143,9 +146,13 @@ static struct stedma40_chan_cfg mop500_sdi2_dma_cfg_tx = {
struct mmci_platform_data mop500_sdi2_data = {
.ocr_mask = MMC_VDD_165_195,
.f_max = 50000000,
.capabilities = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA |
MMC_CAP_MMC_HIGHSPEED,
.f_max = 100000000,
.capabilities = MMC_CAP_4_BIT_DATA |
MMC_CAP_8_BIT_DATA |
MMC_CAP_NONREMOVABLE |
MMC_CAP_MMC_HIGHSPEED |
MMC_CAP_ERASE |
MMC_CAP_CMD23,
.gpio_cd = -1,
.gpio_wp = -1,
#ifdef CONFIG_STE_DMA40
@ -180,10 +187,13 @@ static struct stedma40_chan_cfg mop500_sdi4_dma_cfg_tx = {
#endif
struct mmci_platform_data mop500_sdi4_data = {
.ocr_mask = MMC_VDD_29_30,
.f_max = 50000000,
.capabilities = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA |
MMC_CAP_MMC_HIGHSPEED,
.f_max = 100000000,
.capabilities = MMC_CAP_4_BIT_DATA |
MMC_CAP_8_BIT_DATA |
MMC_CAP_NONREMOVABLE |
MMC_CAP_MMC_HIGHSPEED |
MMC_CAP_ERASE |
MMC_CAP_CMD23,
.gpio_cd = -1,
.gpio_wp = -1,
#ifdef CONFIG_STE_DMA40

3
arch/arm/mach-ux500/db8500-regs.h
View file

@ -102,7 +102,6 @@
#define U8500_PRCMU_BASE (U8500_PER4_BASE + 0x07000)
#define U9540_DMC1_BASE (U8500_PER4_BASE + 0x0A000)
#define U8500_PRCMU_TCDM_BASE (U8500_PER4_BASE + 0x68000)
#define U9540_PRCMU_TCDM_BASE (U8500_PER4_BASE + 0x6A000)
#define U8500_PRCMU_TCPM_BASE (U8500_PER4_BASE + 0x60000)
#define U8500_PRCMU_TIMER_3_BASE (U8500_PER4_BASE + 0x07338)
#define U8500_PRCMU_TIMER_4_BASE (U8500_PER4_BASE + 0x07450)
@ -184,7 +183,7 @@
#define U8500_IO_VIRTUAL 0xf0000000
#define U8500_IO_PHYSICAL 0xa0000000
/* This is where we map in the ROM to check ASIC IDs */
#define UX500_VIRT_ROM 0xf0000000
#define UX500_VIRT_ROM IOMEM(0xf0000000)
/* This macro is used in assembly, so no cast */
#define IO_ADDRESS(x) \

2
arch/arm/mach-ux500/devices-db8500.c
View file

@ -227,7 +227,7 @@ static struct resource db8500_prcmu_res[] = {
{
.name = "prcmu-tcpm",
.start = U8500_PRCMU_TCPM_BASE,
.end = U8500_PRCMU_TCPM_BASE + SZ_4K - 1,
.end = U8500_PRCMU_TCPM_BASE + SZ_32K - 1,
.flags = IORESOURCE_MEM,
},
};

6
arch/arm/mach-ux500/id.c
View file

@ -21,11 +21,11 @@
struct dbx500_asic_id dbx500_id;
static unsigned int ux500_read_asicid(phys_addr_t addr)
static unsigned int __init ux500_read_asicid(phys_addr_t addr)
{
phys_addr_t base = addr & ~0xfff;
struct map_desc desc = {
.virtual = UX500_VIRT_ROM,
.virtual = (unsigned long)UX500_VIRT_ROM,
.pfn = __phys_to_pfn(base),
.length = SZ_16K,
.type = MT_DEVICE,
@ -37,7 +37,7 @@ static unsigned int ux500_read_asicid(phys_addr_t addr)
local_flush_tlb_all();
flush_cache_all();
return readl(IOMEM(UX500_VIRT_ROM + (addr & 0xfff)));
return readl(UX500_VIRT_ROM + (addr & 0xfff));
}
static void ux500_print_soc_info(unsigned int asicid)