net/mlx4_en: Pass user MTU value to Firmware at set port command
When starting the port, driver will inform Firmware about the actual MTU which does not include implicit headers, such as FCS or VLAN tags. Signed-off-by: Shaker Daibes <shakerd@mellanox.com> Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -1695,6 +1695,14 @@ int mlx4_en_start_port(struct net_device *dev)
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priv->port, err);
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goto tx_err;
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}
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err = mlx4_SET_PORT_user_mtu(mdev->dev, priv->port, dev->mtu);
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if (err) {
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en_err(priv, "Failed to pass user MTU(%d) to Firmware for port %d, with error %d\n",
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dev->mtu, priv->port, err);
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goto tx_err;
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}
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/* Set default qp number */
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err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
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if (err) {
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@ -2983,7 +2983,7 @@ static int mlx4_SET_PORT_phv_bit(struct mlx4_dev *dev, u8 port, u8 phv_bit)
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return PTR_ERR(mailbox);
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context = mailbox->buf;
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context->v_ignore_fcs |= SET_PORT_GEN_PHV_VALID;
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context->flags2 |= SET_PORT_GEN_PHV_VALID;
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if (phv_bit)
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context->phv_en |= SET_PORT_GEN_PHV_EN;
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@ -487,6 +487,7 @@ struct mlx4_slave_state {
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bool vst_qinq_supported;
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u8 function;
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dma_addr_t vhcr_dma;
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u16 user_mtu[MLX4_MAX_PORTS + 1];
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u16 mtu[MLX4_MAX_PORTS + 1];
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__be32 ib_cap_mask[MLX4_MAX_PORTS + 1];
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struct mlx4_slave_eqe eq[MLX4_MFUNC_MAX_EQES];
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@ -590,6 +591,7 @@ struct mlx4_mfunc_master_ctx {
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struct mlx4_master_qp0_state qp0_state[MLX4_MAX_PORTS + 1];
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int init_port_ref[MLX4_MAX_PORTS + 1];
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u16 max_mtu[MLX4_MAX_PORTS + 1];
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u16 max_user_mtu[MLX4_MAX_PORTS + 1];
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u8 pptx;
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u8 pprx;
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int disable_mcast_ref[MLX4_MAX_PORTS + 1];
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@ -787,7 +789,7 @@ enum {
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struct mlx4_set_port_general_context {
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u16 reserved1;
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u8 v_ignore_fcs;
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u8 flags2;
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u8 flags;
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union {
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u8 ignore_fcs;
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@ -803,7 +805,8 @@ struct mlx4_set_port_general_context {
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u16 reserved4;
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u32 reserved5;
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u8 phv_en;
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u8 reserved6[3];
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u8 reserved6[5];
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__be16 user_mtu;
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};
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struct mlx4_set_port_rqp_calc_context {
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@ -50,7 +50,8 @@
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#define MLX4_STATS_ERROR_COUNTERS_MASK 0x1ffc30ULL
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#define MLX4_STATS_PORT_COUNTERS_MASK 0x1fe00000ULL
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#define MLX4_FLAG_V_IGNORE_FCS_MASK 0x2
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#define MLX4_FLAG2_V_IGNORE_FCS_MASK BIT(1)
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#define MLX4_FLAG2_V_USER_MTU_MASK BIT(5)
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#define MLX4_IGNORE_FCS_MASK 0x1
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#define MLX4_TC_MAX_NUMBER 8
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@ -1239,6 +1240,38 @@ void mlx4_reset_roce_gids(struct mlx4_dev *dev, int slave)
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return;
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}
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static void
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mlx4_en_set_port_user_mtu(struct mlx4_dev *dev, int slave, int port,
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struct mlx4_set_port_general_context *gen_context)
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{
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struct mlx4_priv *priv = mlx4_priv(dev);
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struct mlx4_mfunc_master_ctx *master = &priv->mfunc.master;
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struct mlx4_slave_state *slave_st = &master->slave_state[slave];
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u16 user_mtu, prev_user_mtu;
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/* User Mtu is configured as the max USER_MTU among all
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* the functions on the port.
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*/
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user_mtu = be16_to_cpu(gen_context->user_mtu);
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user_mtu = min_t(int, user_mtu, dev->caps.eth_mtu_cap[port]);
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prev_user_mtu = slave_st->user_mtu[port];
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slave_st->user_mtu[port] = user_mtu;
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if (user_mtu > master->max_user_mtu[port])
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master->max_user_mtu[port] = user_mtu;
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if (user_mtu < prev_user_mtu &&
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prev_user_mtu == master->max_user_mtu[port]) {
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int i;
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slave_st->user_mtu[port] = user_mtu;
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master->max_user_mtu[port] = user_mtu;
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for (i = 0; i < dev->num_slaves; i++)
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master->max_user_mtu[port] =
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max_t(u16, master->max_user_mtu[port],
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master->slave_state[i].user_mtu[port]);
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}
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gen_context->user_mtu = cpu_to_be16(master->max_user_mtu[port]);
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}
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static int mlx4_common_set_port(struct mlx4_dev *dev, int slave, u32 in_mod,
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u8 op_mod, struct mlx4_cmd_mailbox *inbox)
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{
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@ -1269,7 +1302,9 @@ static int mlx4_common_set_port(struct mlx4_dev *dev, int slave, u32 in_mod,
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is_eth = op_mod;
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port_info = &priv->port[port];
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/* Slaves cannot perform SET_PORT operations except changing MTU */
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/* Slaves cannot perform SET_PORT operations,
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* except for changing MTU and USER_MTU.
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*/
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if (is_eth) {
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if (slave != dev->caps.function &&
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in_modifier != MLX4_SET_PORT_GENERAL &&
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@ -1316,8 +1351,12 @@ static int mlx4_common_set_port(struct mlx4_dev *dev, int slave, u32 in_mod,
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master->slave_state[i].mtu[port]);
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}
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}
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gen_context->mtu = cpu_to_be16(master->max_mtu[port]);
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if (gen_context->flags2 & MLX4_FLAG2_V_USER_MTU_MASK)
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mlx4_en_set_port_user_mtu(dev, slave, port,
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gen_context);
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/* Slave cannot change Global Pause configuration */
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if (slave != mlx4_master_func_num(dev) &&
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((gen_context->pptx != master->pptx) ||
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@ -1608,6 +1647,30 @@ int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn,
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}
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EXPORT_SYMBOL(mlx4_SET_PORT_qpn_calc);
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int mlx4_SET_PORT_user_mtu(struct mlx4_dev *dev, u8 port, u16 user_mtu)
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{
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struct mlx4_cmd_mailbox *mailbox;
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struct mlx4_set_port_general_context *context;
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u32 in_mod;
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int err;
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mailbox = mlx4_alloc_cmd_mailbox(dev);
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if (IS_ERR(mailbox))
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return PTR_ERR(mailbox);
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context = mailbox->buf;
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context->flags2 |= MLX4_FLAG2_V_USER_MTU_MASK;
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context->user_mtu = cpu_to_be16(user_mtu);
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in_mod = MLX4_SET_PORT_GENERAL << 8 | port;
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err = mlx4_cmd(dev, mailbox->dma, in_mod, MLX4_SET_PORT_ETH_OPCODE,
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MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
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MLX4_CMD_WRAPPED);
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mlx4_free_cmd_mailbox(dev, mailbox);
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return err;
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}
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EXPORT_SYMBOL(mlx4_SET_PORT_user_mtu);
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int mlx4_SET_PORT_fcs_check(struct mlx4_dev *dev, u8 port, u8 ignore_fcs_value)
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{
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struct mlx4_cmd_mailbox *mailbox;
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@ -1619,7 +1682,7 @@ int mlx4_SET_PORT_fcs_check(struct mlx4_dev *dev, u8 port, u8 ignore_fcs_value)
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if (IS_ERR(mailbox))
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return PTR_ERR(mailbox);
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context = mailbox->buf;
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context->v_ignore_fcs |= MLX4_FLAG_V_IGNORE_FCS_MASK;
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context->flags2 |= MLX4_FLAG2_V_IGNORE_FCS_MASK;
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if (ignore_fcs_value)
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context->ignore_fcs |= MLX4_IGNORE_FCS_MASK;
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else
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@ -1374,6 +1374,7 @@ int mlx4_get_base_qpn(struct mlx4_dev *dev, u8 port);
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int __mlx4_replace_mac(struct mlx4_dev *dev, u8 port, int qpn, u64 new_mac);
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int mlx4_SET_PORT_general(struct mlx4_dev *dev, u8 port, int mtu,
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u8 pptx, u8 pfctx, u8 pprx, u8 pfcrx);
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int mlx4_SET_PORT_user_mtu(struct mlx4_dev *dev, u8 port, u16 user_mtu);
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int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn,
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u8 promisc);
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int mlx4_SET_PORT_BEACON(struct mlx4_dev *dev, u8 port, u16 time);
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