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drm/nouveau/gr/gm206: initial init+ctx code

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Uncertain whether the GPC pack change is due to a newer driver version,
or a legitimate difference from GM204.  My GM204 has broken vram, so
can't currently try a newer binary driver on it to confirm.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs 2015-04-14 12:06:44 +10:00
parent 985826bccd
commit 426b20e42e
9 changed files with 162 additions and 16 deletions
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1
drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h
View file

@ -73,6 +73,7 @@ extern struct nvkm_oclass *gk110b_gr_oclass;
extern struct nvkm_oclass *gk208_gr_oclass;
extern struct nvkm_oclass *gm107_gr_oclass;
extern struct nvkm_oclass *gm204_gr_oclass;
extern struct nvkm_oclass *gm206_gr_oclass;
#include <core/enum.h>

4
drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
View file

@ -170,9 +170,7 @@ gm100_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = gm204_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
#if 0
device->oclass[NVDEV_ENGINE_GR ] = gm107_gr_oclass;
#endif
device->oclass[NVDEV_ENGINE_GR ] = gm206_gr_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gm204_disp_oclass;
device->oclass[NVDEV_ENGINE_CE0 ] = &gm204_ce0_oclass;
device->oclass[NVDEV_ENGINE_CE1 ] = &gm204_ce1_oclass;

2
drivers/gpu/drm/nouveau/nvkm/engine/gr/Kbuild
View file

@ -13,6 +13,7 @@ nvkm-y += nvkm/engine/gr/ctxgk110b.o
nvkm-y += nvkm/engine/gr/ctxgk208.o
nvkm-y += nvkm/engine/gr/ctxgm107.o
nvkm-y += nvkm/engine/gr/ctxgm204.o
nvkm-y += nvkm/engine/gr/ctxgm206.o
nvkm-y += nvkm/engine/gr/nv04.o
nvkm-y += nvkm/engine/gr/nv10.o
nvkm-y += nvkm/engine/gr/nv20.o
@ -36,3 +37,4 @@ nvkm-y += nvkm/engine/gr/gk110b.o
nvkm-y += nvkm/engine/gr/gk208.o
nvkm-y += nvkm/engine/gr/gm107.o
nvkm-y += nvkm/engine/gr/gm204.o
nvkm-y += nvkm/engine/gr/gm206.o

18
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.h
View file

@ -101,6 +101,9 @@ void gm107_grctx_generate_pagepool(struct gf100_grctx *);
void gm107_grctx_generate_attrib(struct gf100_grctx *);
extern struct nvkm_oclass *gm204_grctx_oclass;
void gm204_grctx_generate_main(struct gf100_gr_priv *, struct gf100_grctx *);
extern struct nvkm_oclass *gm206_grctx_oclass;
/* context init value lists */
@ -207,4 +210,19 @@ extern const struct gf100_gr_init gk208_grctx_init_crstr_0[];
extern const struct gf100_gr_init gm107_grctx_init_gpc_unk_0[];
extern const struct gf100_gr_init gm107_grctx_init_wwdx_0[];
extern const struct gf100_gr_pack gm204_grctx_pack_icmd[];
extern const struct gf100_gr_pack gm204_grctx_pack_mthd[];
extern const struct gf100_gr_pack gm204_grctx_pack_hub[];
extern const struct gf100_gr_init gm204_grctx_init_prop_0[];
extern const struct gf100_gr_init gm204_grctx_init_setup_0[];
extern const struct gf100_gr_init gm204_grctx_init_gpm_0[];
extern const struct gf100_gr_init gm204_grctx_init_gpc_unk_2[];
extern const struct gf100_gr_pack gm204_grctx_pack_tpc[];
extern const struct gf100_gr_pack gm204_grctx_pack_ppc[];
#endif

20
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm204.c
View file

@ -294,7 +294,7 @@ gm204_grctx_init_icmd_0[] = {
{}
};
static const struct gf100_gr_pack
const struct gf100_gr_pack
gm204_grctx_pack_icmd[] = {
{ gm204_grctx_init_icmd_0 },
{}
@ -642,7 +642,7 @@ gm204_grctx_init_b197_0[] = {
{}
};
static const struct gf100_gr_pack
const struct gf100_gr_pack
gm204_grctx_pack_mthd[] = {
{ gm204_grctx_init_b197_0, 0xb197 },
{ gf100_grctx_init_902d_0, 0x902d },
@ -723,7 +723,7 @@ gm204_grctx_init_be_0[] = {
{}
};
static const struct gf100_gr_pack
const struct gf100_gr_pack
gm204_grctx_pack_hub[] = {
{ gf100_grctx_init_main_0 },
{ gm204_grctx_init_fe_0 },
@ -738,7 +738,7 @@ gm204_grctx_pack_hub[] = {
{}
};
static const struct gf100_gr_init
const struct gf100_gr_init
gm204_grctx_init_prop_0[] = {
{ 0x418400, 1, 0x04, 0x38e01e00 },
{ 0x418404, 1, 0x04, 0x70001fff },
@ -764,7 +764,7 @@ gm204_grctx_init_gpc_unk_1[] = {
{}
};
static const struct gf100_gr_init
const struct gf100_gr_init
gm204_grctx_init_setup_0[] = {
{ 0x418800, 1, 0x04, 0x7006863a },
{ 0x418808, 1, 0x04, 0x00000000 },
@ -778,7 +778,7 @@ gm204_grctx_init_setup_0[] = {
{}
};
static const struct gf100_gr_init
const struct gf100_gr_init
gm204_grctx_init_gpm_0[] = {
{ 0x418c10, 8, 0x04, 0x00000000 },
{ 0x418c40, 1, 0x04, 0xffffffff },
@ -787,7 +787,7 @@ gm204_grctx_init_gpm_0[] = {
{}
};
static const struct gf100_gr_init
const struct gf100_gr_init
gm204_grctx_init_gpc_unk_2[] = {
{ 0x418e00, 1, 0x04, 0x90040000 },
{ 0x418e24, 1, 0x04, 0x00000000 },
@ -880,7 +880,7 @@ gm204_grctx_init_sm_0[] = {
{}
};
static const struct gf100_gr_pack
const struct gf100_gr_pack
gm204_grctx_pack_tpc[] = {
{ gm204_grctx_init_pe_0 },
{ gm204_grctx_init_tex_0 },
@ -906,7 +906,7 @@ gm204_grctx_init_cbm_0[] = {
{}
};
static const struct gf100_gr_pack
const struct gf100_gr_pack
gm204_grctx_pack_ppc[] = {
{ gm204_grctx_init_pes_0 },
{ gm204_grctx_init_cbm_0 },
@ -974,7 +974,7 @@ gm204_grctx_generate_405b60(struct gf100_gr_priv *priv)
nv_wr32(priv, 0x405ba0 + (i * 4), gpcs[i]);
}
static void
void
gm204_grctx_generate_main(struct gf100_gr_priv *priv, struct gf100_grctx *info)
{
struct gf100_grctx_oclass *oclass = (void *)nv_engine(priv)->cclass;

83
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm206.c Normal file
View file

@ -0,0 +1,83 @@
/*
* Copyright 2015 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include "ctxgf100.h"
static const struct gf100_gr_init
gm206_grctx_init_gpc_unk_1[] = {
{ 0x418600, 1, 0x04, 0x0000007f },
{ 0x418684, 1, 0x04, 0x0000001f },
{ 0x418700, 1, 0x04, 0x00000002 },
{ 0x418704, 1, 0x04, 0x00000080 },
{ 0x418708, 1, 0x04, 0x40000000 },
{ 0x41870c, 2, 0x04, 0x00000000 },
{ 0x418728, 1, 0x04, 0x00300020 },
{}
};
static const struct gf100_gr_pack
gm206_grctx_pack_gpc[] = {
{ gm107_grctx_init_gpc_unk_0 },
{ gm204_grctx_init_prop_0 },
{ gm206_grctx_init_gpc_unk_1 },
{ gm204_grctx_init_setup_0 },
{ gf100_grctx_init_zcull_0 },
{ gk208_grctx_init_crstr_0 },
{ gm204_grctx_init_gpm_0 },
{ gm204_grctx_init_gpc_unk_2 },
{ gf100_grctx_init_gcc_0 },
{}
};
struct nvkm_oclass *
gm206_grctx_oclass = &(struct gf100_grctx_oclass) {
.base.handle = NV_ENGCTX(GR, 0x26),
.base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = gf100_gr_context_ctor,
.dtor = gf100_gr_context_dtor,
.init = _nvkm_gr_context_init,
.fini = _nvkm_gr_context_fini,
.rd32 = _nvkm_gr_context_rd32,
.wr32 = _nvkm_gr_context_wr32,
},
.main = gm204_grctx_generate_main,
.unkn = gk104_grctx_generate_unkn,
.hub = gm204_grctx_pack_hub,
.gpc = gm206_grctx_pack_gpc,
.zcull = gf100_grctx_pack_zcull,
.tpc = gm204_grctx_pack_tpc,
.ppc = gm204_grctx_pack_ppc,
.icmd = gm204_grctx_pack_icmd,
.mthd = gm204_grctx_pack_mthd,
.bundle = gm107_grctx_generate_bundle,
.bundle_size = 0x3000,
.bundle_min_gpm_fifo_depth = 0x180,
.bundle_token_limit = 0x780,
.pagepool = gm107_grctx_generate_pagepool,
.pagepool_size = 0x20000,
.attrib = gm107_grctx_generate_attrib,
.attrib_nr_max = 0x600,
.attrib_nr = 0x400,
.alpha_nr_max = 0x1800,
.alpha_nr = 0x1000,
}.base;

4
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h
View file

@ -129,6 +129,8 @@ int gk104_gr_ctor(struct nvkm_object *, struct nvkm_object *,
struct nvkm_object **);
int gk104_gr_init(struct nvkm_object *);
int gm204_gr_init(struct nvkm_object *);
extern struct nvkm_ofuncs gf100_fermi_ofuncs;
extern struct nvkm_oclass gf100_gr_sclass[];
@ -136,6 +138,7 @@ extern struct nvkm_omthds gf100_gr_9097_omthds[];
extern struct nvkm_omthds gf100_gr_90c0_omthds[];
extern struct nvkm_oclass gf110_gr_sclass[];
extern struct nvkm_oclass gk110_gr_sclass[];
extern struct nvkm_oclass gm204_gr_sclass[];
struct gf100_gr_init {
u32 addr;
@ -259,4 +262,5 @@ extern const struct gf100_gr_init gm107_gr_init_wwdx_0[];
extern const struct gf100_gr_init gm107_gr_init_cbm_0[];
void gm107_gr_init_bios(struct gf100_gr_priv *);
extern const struct gf100_gr_pack gm204_gr_pack_mmio[];
#endif

6
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm204.c
View file

@ -30,7 +30,7 @@
* Graphics object classes
******************************************************************************/
static struct nvkm_oclass
struct nvkm_oclass
gm204_gr_sclass[] = {
{ FERMI_TWOD_A, &nvkm_object_ofuncs },
{ KEPLER_INLINE_TO_MEMORY_B, &nvkm_object_ofuncs },
@ -196,7 +196,7 @@ gm204_gr_init_be_0[] = {
{}
};
static const struct gf100_gr_pack
const struct gf100_gr_pack
gm204_gr_pack_mmio[] = {
{ gm204_gr_init_main_0 },
{ gm204_gr_init_fe_0 },
@ -248,7 +248,7 @@ gm204_gr_init_ctxctl(struct gf100_gr_priv *priv)
return 0;
}
static int
int
gm204_gr_init(struct nvkm_object *object)
{
struct gf100_gr_oclass *oclass = (void *)object->oclass;

40
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm206.c Normal file
View file

@ -0,0 +1,40 @@
/*
* Copyright 2015 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include "gf100.h"
#include "ctxgf100.h"
struct nvkm_oclass *
gm206_gr_oclass = &(struct gf100_gr_oclass) {
.base.handle = NV_ENGINE(GR, 0x26),
.base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = gf100_gr_ctor,
.dtor = gf100_gr_dtor,
.init = gm204_gr_init,
.fini = _nvkm_gr_fini,
},
.cclass = &gm206_grctx_oclass,
.sclass = gm204_gr_sclass,
.mmio = gm204_gr_pack_mmio,
.ppc_nr = 2,
}.base;