ASoC: Intel: Skylake: Parse vendor tokens to build A-State table
A-State table is a power management table which allows the driver to configure the DSP clock source corresponding to various load thresholds. The table contains upto 3 A-State entries. The patch adds and parses the corresponding A-State tokens to build the table. Signed-off-by: Pradeep Tewani <pradeep.d.tewani@intel.com> Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -221,6 +221,17 @@
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* %SKL_TKN_MM_U32_NUM_IN_FMT: Number of input formats
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* %SKL_TKN_MM_U32_NUM_OUT_FMT: Number of output formats
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*
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* %SKL_TKN_U32_ASTATE_IDX: Table Index for the A-State entry to be filled
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* with kcps and clock source
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*
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* %SKL_TKN_U32_ASTATE_COUNT: Number of valid entries in A-State table
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*
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* %SKL_TKN_U32_ASTATE_KCPS: Specifies the core load threshold (in kilo
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* cycles per second) below which DSP is clocked
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* from source specified by clock source.
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*
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* %SKL_TKN_U32_ASTATE_CLK_SRC: Clock source for A-State entry
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*
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* module_id and loadable flags dont have tokens as these values will be
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* read from the DSP FW manifest
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*
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@ -308,7 +319,11 @@ enum SKL_TKNS {
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SKL_TKN_MM_U32_NUM_IN_FMT,
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SKL_TKN_MM_U32_NUM_OUT_FMT,
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SKL_TKN_MAX = SKL_TKN_MM_U32_NUM_OUT_FMT,
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SKL_TKN_U32_ASTATE_IDX,
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SKL_TKN_U32_ASTATE_COUNT,
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SKL_TKN_U32_ASTATE_KCPS,
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SKL_TKN_U32_ASTATE_CLK_SRC,
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SKL_TKN_MAX = SKL_TKN_U32_ASTATE_CLK_SRC,
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};
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#endif
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@ -3037,11 +3037,13 @@ static int skl_tplg_get_int_tkn(struct device *dev,
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struct snd_soc_tplg_vendor_value_elem *tkn_elem,
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struct skl *skl)
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{
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int tkn_count = 0, ret;
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int tkn_count = 0, ret, size;
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static int mod_idx, res_val_idx, intf_val_idx, dir, pin_idx;
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struct skl_module_res *res = NULL;
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struct skl_module_iface *fmt = NULL;
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struct skl_module *mod = NULL;
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static struct skl_astate_param *astate_table;
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static int astate_cfg_idx, count;
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int i;
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if (skl->modules) {
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@ -3074,6 +3076,46 @@ static int skl_tplg_get_int_tkn(struct device *dev,
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mod_idx = tkn_elem->value;
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break;
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case SKL_TKN_U32_ASTATE_COUNT:
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if (astate_table != NULL) {
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dev_err(dev, "More than one entry for A-State count");
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return -EINVAL;
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}
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if (tkn_elem->value > SKL_MAX_ASTATE_CFG) {
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dev_err(dev, "Invalid A-State count %d\n",
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tkn_elem->value);
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return -EINVAL;
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}
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size = tkn_elem->value * sizeof(struct skl_astate_param) +
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sizeof(count);
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skl->cfg.astate_cfg = devm_kzalloc(dev, size, GFP_KERNEL);
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if (!skl->cfg.astate_cfg)
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return -ENOMEM;
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astate_table = skl->cfg.astate_cfg->astate_table;
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count = skl->cfg.astate_cfg->count = tkn_elem->value;
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break;
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case SKL_TKN_U32_ASTATE_IDX:
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if (tkn_elem->value >= count) {
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dev_err(dev, "Invalid A-State index %d\n",
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tkn_elem->value);
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return -EINVAL;
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}
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astate_cfg_idx = tkn_elem->value;
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break;
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case SKL_TKN_U32_ASTATE_KCPS:
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astate_table[astate_cfg_idx].kcps = tkn_elem->value;
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break;
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case SKL_TKN_U32_ASTATE_CLK_SRC:
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astate_table[astate_cfg_idx].clk_src = tkn_elem->value;
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break;
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case SKL_TKN_U8_IN_PIN_TYPE:
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case SKL_TKN_U8_OUT_PIN_TYPE:
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case SKL_TKN_U8_IN_QUEUE_COUNT:
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@ -29,6 +29,8 @@
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#define SKL_SUSPEND_DELAY 2000
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#define SKL_MAX_ASTATE_CFG 3
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#define AZX_PCIREG_PGCTL 0x44
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#define AZX_PGCTL_LSRMD_MASK (1 << 4)
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#define AZX_PCIREG_CGCTL 0x48
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@ -46,6 +48,20 @@ struct skl_dsp_resource {
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struct skl_debug;
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struct skl_astate_param {
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u32 kcps;
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u32 clk_src;
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};
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struct skl_astate_config {
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u32 count;
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struct skl_astate_param astate_table[0];
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};
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struct skl_fw_config {
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struct skl_astate_config *astate_cfg;
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};
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struct skl {
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struct hdac_ext_bus ebus;
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struct pci_dev *pci;
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@ -77,6 +93,7 @@ struct skl {
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u8 nr_modules;
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struct skl_module **modules;
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bool use_tplg_pcm;
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struct skl_fw_config cfg;
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};
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#define skl_to_ebus(s) (&(s)->ebus)
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