ARM: moxart: add MOXA ART SoC device tree files
Add a generic (dtsi) include file for MOXA ART SoCs. Also add a file for UC-7112-LX. Signed-off-by: Jonas Jensen <jonas.jensen@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Olof Johansson <olof@lixom.net>wifi-calibration
Jonas Jensen
Olof Johansson
parent
31d95612cb
commit
448e7edefa
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@ -0,0 +1,12 @@
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MOXA ART device tree bindings
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Boards with the MOXA ART SoC shall have the following properties:
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Required root node property:
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compatible = "moxa,moxart";
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Boards:
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- UC-7112-LX: embedded computer
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compatible = "moxa,moxart-uc-7112-lx", "moxa,moxart"
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@ -108,6 +108,7 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \
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kirkwood-ts219-6281.dtb \
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kirkwood-ts219-6282.dtb
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dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
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dtb-$(CONFIG_ARCH_MOXART) += moxart-uc7112lx.dtb
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dtb-$(CONFIG_ARCH_MSM) += qcom-msm8660-surf.dtb \
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qcom-msm8960-cdp.dtb
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dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
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@ -0,0 +1,109 @@
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/* moxart-uc7112lx.dts - Device Tree file for MOXA UC-7112-LX
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*
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* Copyright (C) 2013 Jonas Jensen <jonas.jensen@gmail.com>
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*
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* Licensed under GPLv2 or later.
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*/
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/dts-v1/;
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/include/ "moxart.dtsi"
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/ {
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model = "MOXA UC-7112-LX";
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compatible = "moxa,moxart-uc-7112-lx", "moxa,moxart";
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memory {
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device_type = "memory";
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reg = <0x0 0x2000000>;
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};
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flash@80000000,0 {
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compatible = "numonyx,js28f128", "cfi-flash";
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reg = <0x80000000 0x1000000>;
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bank-width = <2>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "bootloader";
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reg = <0x0 0x40000>;
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};
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partition@40000 {
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label = "linux kernel";
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reg = <0x40000 0x1C0000>;
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};
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partition@200000 {
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label = "root filesystem";
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reg = <0x200000 0x800000>;
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};
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partition@a00000 {
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label = "user filesystem";
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reg = <0xa00000 0x600000>;
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};
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};
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leds {
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compatible = "gpio-leds";
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user-led {
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label = "ready-led";
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gpios = <&gpio 27 0x1>;
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default-state = "on";
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linux,default-trigger = "default-on";
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};
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};
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gpio_keys_polled {
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compatible = "gpio-keys-polled";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <500>;
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button@25 {
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label = "GPIO Reset";
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linux,code = <116>;
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gpios = <&gpio 25 1>;
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};
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};
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chosen {
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bootargs = "console=ttyS0,115200n8 earlyprintk root=/dev/mmcblk0p1 rw rootwait";
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};
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};
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&clk_pll {
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clocks = <&ref12>;
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};
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&sdhci {
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status = "okay";
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};
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&mdio0 {
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status = "okay";
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ethphy0: ethernet-phy@1 {
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device_type = "ethernet-phy";
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compatible = "moxa,moxart-rtl8201cp", "ethernet-phy-ieee802.3-c22";
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reg = <1>;
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};
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};
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&mdio1 {
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status = "okay";
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ethphy1: ethernet-phy@1 {
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device_type = "ethernet-phy";
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compatible = "moxa,moxart-rtl8201cp", "ethernet-phy-ieee802.3-c22";
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reg = <1>;
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};
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};
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&mac0 {
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status = "okay";
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};
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&mac1 {
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status = "okay";
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};
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&uart0 {
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status = "okay";
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};
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@ -0,0 +1,154 @@
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/* moxart.dtsi - Device Tree Include file for MOXA ART family SoC
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*
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* Copyright (C) 2013 Jonas Jensen <jonas.jensen@gmail.com>
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*
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* Licensed under GPLv2 or later.
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*/
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/include/ "skeleton.dtsi"
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/ {
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compatible = "moxa,moxart";
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model = "MOXART";
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interrupt-parent = <&intc>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "faraday,fa526";
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reg = <0>;
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};
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};
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clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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ref12: ref12M {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <12000000>;
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};
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x90000000 0x10000000>;
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ranges;
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intc: interrupt-controller@98800000 {
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compatible = "moxa,moxart-ic";
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reg = <0x98800000 0x38>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-mask = <0x00080000>;
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};
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clk_pll: clk_pll@98100000 {
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compatible = "moxa,moxart-pll-clock";
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#clock-cells = <0>;
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reg = <0x98100000 0x34>;
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};
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clk_apb: clk_apb@98100000 {
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compatible = "moxa,moxart-apb-clock";
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#clock-cells = <0>;
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reg = <0x98100000 0x34>;
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clocks = <&clk_pll>;
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};
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timer: timer@98400000 {
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compatible = "moxa,moxart-timer";
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reg = <0x98400000 0x42>;
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interrupts = <19 1>;
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clocks = <&clk_apb>;
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};
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gpio: gpio@98700000 {
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gpio-controller;
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#gpio-cells = <2>;
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compatible = "moxa,moxart-gpio";
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reg = <0x98700000 0xC>;
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};
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rtc: rtc {
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compatible = "moxa,moxart-rtc";
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gpio-rtc-sclk = <&gpio 5 0>;
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gpio-rtc-data = <&gpio 6 0>;
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gpio-rtc-reset = <&gpio 7 0>;
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};
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dma: dma@90500000 {
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compatible = "moxa,moxart-dma";
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reg = <0x90500080 0x40>;
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interrupts = <24 0>;
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#dma-cells = <1>;
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};
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watchdog: watchdog@98500000 {
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compatible = "moxa,moxart-watchdog";
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reg = <0x98500000 0x10>;
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clocks = <&clk_apb>;
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};
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sdhci: sdhci@98e00000 {
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compatible = "moxa,moxart-sdhci";
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reg = <0x98e00000 0x5C>;
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interrupts = <5 0>;
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clocks = <&clk_apb>;
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dmas = <&dma 5>,
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<&dma 5>;
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dma-names = "tx", "rx";
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status = "disabled";
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};
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mdio0: mdio@90900090 {
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compatible = "moxa,moxart-mdio";
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reg = <0x90900090 0x8>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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mdio1: mdio@92000090 {
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compatible = "moxa,moxart-mdio";
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reg = <0x92000090 0x8>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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mac0: mac@90900000 {
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compatible = "moxa,moxart-mac";
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reg = <0x90900000 0x90>;
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interrupts = <25 0>;
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phy-handle = <ðphy0>;
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phy-mode = "mii";
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status = "disabled";
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};
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mac1: mac@92000000 {
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compatible = "moxa,moxart-mac";
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reg = <0x92000000 0x90>;
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interrupts = <27 0>;
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phy-handle = <ðphy1>;
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phy-mode = "mii";
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status = "disabled";
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};
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uart0: uart@98200000 {
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compatible = "ns16550a";
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reg = <0x98200000 0x20>;
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interrupts = <31 8>;
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reg-shift = <2>;
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reg-io-width = <4>;
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clock-frequency = <14745600>;
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status = "disabled";
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};
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};
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};
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