Blackfin arch: dma add some API and cleanup bf54x DMA definition
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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780431e397
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452af71f36
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@ -420,6 +420,32 @@ unsigned short get_dma_curr_ycount(unsigned int channel)
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}
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EXPORT_SYMBOL(get_dma_curr_ycount);
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unsigned long get_dma_next_desc_ptr(unsigned int channel)
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{
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BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
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&& channel < MAX_BLACKFIN_DMA_CHANNEL));
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return dma_ch[channel].regs->next_desc_ptr;
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}
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EXPORT_SYMBOL(get_dma_next_desc_ptr);
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unsigned long get_dma_curr_desc_ptr(unsigned int channel)
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{
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BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
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&& channel < MAX_BLACKFIN_DMA_CHANNEL));
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return dma_ch[channel].regs->curr_desc_ptr;
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}
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unsigned long get_dma_curr_addr(unsigned int channel)
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{
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BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
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&& channel < MAX_BLACKFIN_DMA_CHANNEL));
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return dma_ch[channel].regs->curr_addr_ptr;
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}
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EXPORT_SYMBOL(get_dma_curr_addr);
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static void *__dma_memcpy(void *dest, const void *src, size_t size)
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{
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int direction; /* 1 - address decrease, 0 - address increase */
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@ -64,6 +64,7 @@
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(struct dma_register *) MDMA_D3_NEXT_DESC_PTR,
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(struct dma_register *) MDMA_S3_NEXT_DESC_PTR,
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};
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EXPORT_SYMBOL(base_addr);
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int channel2irq(unsigned int channel)
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{
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@ -109,9 +109,7 @@ struct dma_register {
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unsigned long curr_desc_ptr; /* DMA Current Descriptor Pointer
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register */
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unsigned short curr_addr_ptr_lo; /* DMA Current Address Pointer
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register */
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unsigned short curr_addr_ptr_hi; /* DMA Current Address Pointer
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unsigned long curr_addr_ptr; /* DMA Current Address Pointer
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register */
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unsigned short irq_status; /* DMA irq status register */
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unsigned short dummy6;
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@ -166,6 +164,9 @@ void set_dma_curr_addr(unsigned int channel, unsigned long addr);
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unsigned short get_dma_curr_irqstat(unsigned int channel);
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unsigned short get_dma_curr_xcount(unsigned int channel);
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unsigned short get_dma_curr_ycount(unsigned int channel);
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unsigned long get_dma_next_desc_ptr(unsigned int channel);
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unsigned long get_dma_curr_desc_ptr(unsigned int channel);
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unsigned long get_dma_curr_addr(unsigned int channel);
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/* set large DMA mode descriptor */
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void set_dma_sg(unsigned int channel, struct dmasg *sg, int nr_sg);
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@ -1178,7 +1178,7 @@
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/* Bit masks for HOST_STATUS */
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#define READY 0x1 /* DMA Ready */
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#define DMA_READY 0x1 /* DMA Ready */
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#define FIFOFULL 0x2 /* FIFO Full */
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#define FIFOEMPTY 0x4 /* FIFO Empty */
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#define DMA_COMPLETE 0x8 /* DMA Complete */
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@ -3303,7 +3303,7 @@
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#define MFD 0xf000 /* Multi channel Frame Delay */
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#define FSDR 0x80 /* Frame Sync to Data Relationship */
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#define MCMEM 0x10 /* Multi channel Frame Mode Enable */
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#define MCMEN 0x10 /* Multi channel Frame Mode Enable */
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#define MCDRXPE 0x8 /* Multi channel DMA Receive Packing */
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#define MCDTXPE 0x4 /* Multi channel DMA Transmit Packing */
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#define MCCRM 0x3 /* 2X Clock Recovery Mode */
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@ -70,5 +70,5 @@
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#define MAX_BLACKFIN_DMA_CHANNEL 32
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extern int channel2irq(unsigned int channel);
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extern struct dma_register *base_addr[];
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extern struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL];
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#endif
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