Merge branches 'pci/hotplug' and 'pci/resource' into next
* pci/hotplug: PCI: Use cached copy of PCI_EXP_SLTCAP_HPC bit * pci/resource: PCI: Disable all BAR sizing for devices with non-compliant BARs x86/PCI: Mark Broadwell-EP Home Agent 1 as having non-compliant BARs PCI: Identify Enhanced Allocation (EA) BAR Equivalent resources in sysfs
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commit
45604e68ed
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@ -552,9 +552,16 @@ static void twinhead_reserve_killing_zone(struct pci_dev *dev)
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}
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x27B9, twinhead_reserve_killing_zone);
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x27B9, twinhead_reserve_killing_zone);
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/*
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* Broadwell EP Home Agent BARs erroneously return non-zero values when read.
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*
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* See http://www.intel.com/content/www/us/en/processors/xeon/xeon-e5-v4-spec-update.html
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* entry BDF2.
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*/
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static void pci_bdwep_bar(struct pci_dev *dev)
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static void pci_bdwep_bar(struct pci_dev *dev)
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{
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{
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dev->non_compliant_bars = 1;
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dev->non_compliant_bars = 1;
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}
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}
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x6f60, pci_bdwep_bar);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x6fa0, pci_bdwep_bar);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x6fa0, pci_bdwep_bar);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x6fc0, pci_bdwep_bar);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x6fc0, pci_bdwep_bar);
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@ -2228,7 +2228,7 @@ void pci_pm_init(struct pci_dev *dev)
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static unsigned long pci_ea_flags(struct pci_dev *dev, u8 prop)
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static unsigned long pci_ea_flags(struct pci_dev *dev, u8 prop)
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{
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{
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unsigned long flags = IORESOURCE_PCI_FIXED;
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unsigned long flags = IORESOURCE_PCI_FIXED | IORESOURCE_PCI_EA_BEI;
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switch (prop) {
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switch (prop) {
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case PCI_EA_P_MEM:
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case PCI_EA_P_MEM:
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@ -254,7 +254,6 @@ static void cleanup_service_irqs(struct pci_dev *dev)
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static int get_port_device_capability(struct pci_dev *dev)
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static int get_port_device_capability(struct pci_dev *dev)
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{
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{
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int services = 0;
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int services = 0;
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u32 reg32;
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int cap_mask = 0;
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int cap_mask = 0;
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if (pcie_ports_disabled)
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if (pcie_ports_disabled)
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@ -269,20 +268,15 @@ static int get_port_device_capability(struct pci_dev *dev)
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pcie_port_platform_notify(dev, &cap_mask);
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pcie_port_platform_notify(dev, &cap_mask);
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/* Hot-Plug Capable */
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/* Hot-Plug Capable */
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if ((cap_mask & PCIE_PORT_SERVICE_HP) &&
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if ((cap_mask & PCIE_PORT_SERVICE_HP) && dev->is_hotplug_bridge) {
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pcie_caps_reg(dev) & PCI_EXP_FLAGS_SLOT) {
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pcie_capability_read_dword(dev, PCI_EXP_SLTCAP, ®32);
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if (reg32 & PCI_EXP_SLTCAP_HPC) {
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services |= PCIE_PORT_SERVICE_HP;
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services |= PCIE_PORT_SERVICE_HP;
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/*
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/*
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* Disable hot-plug interrupts in case they have been
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* Disable hot-plug interrupts in case they have been enabled
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* enabled by the BIOS and the hot-plug service driver
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* by the BIOS and the hot-plug service driver is not loaded.
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* is not loaded.
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*/
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*/
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pcie_capability_clear_word(dev, PCI_EXP_SLTCTL,
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pcie_capability_clear_word(dev, PCI_EXP_SLTCTL,
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PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE);
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PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE);
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}
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}
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}
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/* AER capable */
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/* AER capable */
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if ((cap_mask & PCIE_PORT_SERVICE_AER)
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if ((cap_mask & PCIE_PORT_SERVICE_AER)
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&& pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR)) {
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&& pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR)) {
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@ -179,9 +179,6 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
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u16 orig_cmd;
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u16 orig_cmd;
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struct pci_bus_region region, inverted_region;
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struct pci_bus_region region, inverted_region;
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if (dev->non_compliant_bars)
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return 0;
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mask = type ? PCI_ROM_ADDRESS_MASK : ~0;
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mask = type ? PCI_ROM_ADDRESS_MASK : ~0;
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/* No printks while decoding is disabled! */
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/* No printks while decoding is disabled! */
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@ -322,6 +319,9 @@ static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom)
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{
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{
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unsigned int pos, reg;
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unsigned int pos, reg;
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if (dev->non_compliant_bars)
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return;
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for (pos = 0; pos < howmany; pos++) {
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for (pos = 0; pos < howmany; pos++) {
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struct resource *res = &dev->resource[pos];
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struct resource *res = &dev->resource[pos];
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reg = PCI_BASE_ADDRESS_0 + (pos << 2);
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reg = PCI_BASE_ADDRESS_0 + (pos << 2);
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@ -26,6 +26,9 @@ struct resource {
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/*
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/*
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* IO resources have these defined flags.
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* IO resources have these defined flags.
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*
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* PCI devices expose these flags to userspace in the "resource" sysfs file,
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* so don't move them.
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*/
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*/
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#define IORESOURCE_BITS 0x000000ff /* Bus-specific bits */
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#define IORESOURCE_BITS 0x000000ff /* Bus-specific bits */
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@ -110,6 +113,7 @@ struct resource {
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/* PCI control bits. Shares IORESOURCE_BITS with above PCI ROM. */
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/* PCI control bits. Shares IORESOURCE_BITS with above PCI ROM. */
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#define IORESOURCE_PCI_FIXED (1<<4) /* Do not move resource */
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#define IORESOURCE_PCI_FIXED (1<<4) /* Do not move resource */
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#define IORESOURCE_PCI_EA_BEI (1<<5) /* BAR Equivalent Indicator */
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/*
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/*
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* I/O Resource Descriptors
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* I/O Resource Descriptors
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