Merge remote-tracking branch 'spi/topic/bpw' into spi-next
This commit is contained in:
commit
4581949d52
|
@ -103,16 +103,6 @@ static void altera_spi_chipsel(struct spi_device *spi, int value)
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}
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}
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static int altera_spi_setupxfer(struct spi_device *spi, struct spi_transfer *t)
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{
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return 0;
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}
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static int altera_spi_setup(struct spi_device *spi)
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{
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return 0;
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}
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static inline unsigned int hw_txbyte(struct altera_spi *hw, int count)
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{
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if (hw->tx) {
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@ -231,7 +221,6 @@ static int altera_spi_probe(struct platform_device *pdev)
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master->bus_num = pdev->id;
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master->num_chipselect = 16;
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master->mode_bits = SPI_CS_HIGH;
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master->setup = altera_spi_setup;
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hw = spi_master_get_devdata(master);
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platform_set_drvdata(pdev, hw);
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@ -240,7 +229,6 @@ static int altera_spi_probe(struct platform_device *pdev)
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hw->bitbang.master = spi_master_get(master);
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if (!hw->bitbang.master)
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return err;
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hw->bitbang.setup_transfer = altera_spi_setupxfer;
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hw->bitbang.chipselect = altera_spi_chipsel;
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hw->bitbang.txrx_bufs = altera_spi_txrx;
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@ -155,9 +155,6 @@ static int ath79_spi_setup(struct spi_device *spi)
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{
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int status = 0;
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if (spi->bits_per_word > 32)
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return -EINVAL;
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if (!spi->controller_state) {
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status = ath79_spi_setup_cs(spi);
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if (status)
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@ -226,6 +223,7 @@ static int ath79_spi_probe(struct platform_device *pdev)
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pdata = pdev->dev.platform_data;
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master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
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master->setup = ath79_spi_setup;
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master->cleanup = ath79_spi_cleanup;
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if (pdata) {
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@ -1280,13 +1280,6 @@ static int atmel_spi_setup(struct spi_device *spi)
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return -EINVAL;
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}
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if (bits < 8 || bits > 16) {
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dev_dbg(&spi->dev,
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"setup: invalid bits_per_word %u (8 to 16)\n",
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bits);
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return -EINVAL;
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}
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/* see notes above re chipselect */
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if (!atmel_spi_is_v2(as)
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&& spi->chip_select == 0
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@ -1527,7 +1520,7 @@ static int atmel_spi_probe(struct platform_device *pdev)
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/* the spi->mode bits understood by this driver: */
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master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
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master->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 16);
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master->dev.of_node = pdev->dev.of_node;
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master->bus_num = pdev->id;
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master->num_chipselect = master->dev.of_node ? 0 : 4;
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@ -248,11 +248,6 @@ static int au1550_spi_setupxfer(struct spi_device *spi, struct spi_transfer *t)
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hz = t->speed_hz;
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}
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if (bpw < 4 || bpw > 24) {
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dev_err(&spi->dev, "setupxfer: invalid bits_per_word=%d\n",
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bpw);
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return -EINVAL;
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}
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if (hz > spi->max_speed_hz || hz > hw->freq_max || hz < hw->freq_min) {
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dev_err(&spi->dev, "setupxfer: clock rate=%d out of range\n",
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hz);
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@ -296,12 +291,6 @@ static int au1550_spi_setup(struct spi_device *spi)
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{
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struct au1550_spi *hw = spi_master_get_devdata(spi->master);
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if (spi->bits_per_word < 4 || spi->bits_per_word > 24) {
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dev_err(&spi->dev, "setup: invalid bits_per_word=%d\n",
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spi->bits_per_word);
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return -EINVAL;
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}
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if (spi->max_speed_hz == 0)
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spi->max_speed_hz = hw->freq_max;
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if (spi->max_speed_hz > hw->freq_max
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@ -782,6 +771,7 @@ static int au1550_spi_probe(struct platform_device *pdev)
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/* the spi->mode bits understood by this driver: */
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master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST;
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master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 24);
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hw = spi_master_get_devdata(master);
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@ -124,17 +124,6 @@ static void bcm63xx_spi_setup_transfer(struct spi_device *spi,
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/* the spi->mode bits understood by this driver: */
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#define MODEBITS (SPI_CPOL | SPI_CPHA)
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static int bcm63xx_spi_setup(struct spi_device *spi)
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{
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if (spi->bits_per_word != 8) {
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dev_err(&spi->dev, "%s, unsupported bits_per_word=%d\n",
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__func__, spi->bits_per_word);
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return -EINVAL;
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}
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return 0;
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}
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static int bcm63xx_txrx_bufs(struct spi_device *spi, struct spi_transfer *first,
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unsigned int num_transfers)
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{
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@ -277,13 +266,6 @@ static int bcm63xx_spi_transfer_one(struct spi_master *master,
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* full-duplex transfers.
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*/
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list_for_each_entry(t, &m->transfers, transfer_list) {
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if (t->bits_per_word != 8) {
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dev_err(&spi->dev, "%s, unsupported bits_per_word=%d\n",
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__func__, t->bits_per_word);
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status = -EINVAL;
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goto exit;
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}
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if (!first)
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first = t;
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@ -430,11 +412,11 @@ static int bcm63xx_spi_probe(struct platform_device *pdev)
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master->bus_num = pdata->bus_num;
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master->num_chipselect = pdata->num_chipselect;
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master->setup = bcm63xx_spi_setup;
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master->prepare_transfer_hardware = bcm63xx_spi_prepare_transfer;
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master->unprepare_transfer_hardware = bcm63xx_spi_unprepare_transfer;
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master->transfer_one_message = bcm63xx_spi_transfer_one;
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master->mode_bits = MODEBITS;
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master->bits_per_word_mask = SPI_BPW_MASK(8);
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bs->msg_type_shift = pdata->msg_type_shift;
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bs->msg_ctl_width = pdata->msg_ctl_width;
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bs->tx_io = (u8 *)(bs->regs + bcm63xx_spireg(SPI_MSG_DATA));
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@ -417,7 +417,7 @@ bfin_sport_spi_pump_transfers(unsigned long data)
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/* Bits per word setup */
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bits_per_word = transfer->bits_per_word;
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if (bits_per_word % 16 == 0)
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if (bits_per_word == 16)
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drv_data->ops = &bfin_sport_transfer_ops_u16;
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else
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drv_data->ops = &bfin_sport_transfer_ops_u8;
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@ -600,13 +600,6 @@ bfin_sport_spi_setup(struct spi_device *spi)
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}
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}
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if (spi->bits_per_word % 8) {
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dev_err(&spi->dev, "%d bits_per_word is not supported\n",
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spi->bits_per_word);
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ret = -EINVAL;
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goto error;
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}
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/* translate common spi framework into our register
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* following configure contents are same for tx and rx.
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*/
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@ -778,6 +771,7 @@ static int bfin_sport_spi_probe(struct platform_device *pdev)
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drv_data->pin_req = platform_info->pin_req;
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master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST;
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master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16);
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master->bus_num = pdev->id;
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master->num_chipselect = platform_info->num_chipselect;
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master->cleanup = bfin_sport_spi_cleanup;
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@ -643,21 +643,16 @@ static void bfin_spi_pump_transfers(unsigned long data)
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/* Bits per word setup */
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bits_per_word = transfer->bits_per_word;
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if (bits_per_word % 16 == 0) {
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if (bits_per_word == 16) {
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drv_data->n_bytes = bits_per_word/8;
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drv_data->len = (transfer->len) >> 1;
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cr_width = BIT_CTL_WORDSIZE;
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drv_data->ops = &bfin_bfin_spi_transfer_ops_u16;
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} else if (bits_per_word % 8 == 0) {
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} else if (bits_per_word == 8) {
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drv_data->n_bytes = bits_per_word/8;
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drv_data->len = transfer->len;
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cr_width = 0;
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drv_data->ops = &bfin_bfin_spi_transfer_ops_u8;
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} else {
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dev_err(&drv_data->pdev->dev, "transfer: unsupported bits_per_word\n");
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message->status = -EINVAL;
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bfin_spi_giveback(drv_data);
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return;
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}
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cr = bfin_read(&drv_data->regs->ctl) & ~(BIT_CTL_TIMOD | BIT_CTL_WORDSIZE);
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cr |= cr_width;
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@ -808,13 +803,13 @@ static void bfin_spi_pump_transfers(unsigned long data)
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bfin_write(&drv_data->regs->tdbr, chip->idle_tx_val);
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else {
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int loop;
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if (bits_per_word % 16 == 0) {
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if (bits_per_word == 16) {
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u16 *buf = (u16 *)drv_data->tx;
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for (loop = 0; loop < bits_per_word / 16;
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loop++) {
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bfin_write(&drv_data->regs->tdbr, *buf++);
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}
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} else if (bits_per_word % 8 == 0) {
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} else if (bits_per_word == 8) {
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u8 *buf = (u8 *)drv_data->tx;
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for (loop = 0; loop < bits_per_word / 8; loop++)
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bfin_write(&drv_data->regs->tdbr, *buf++);
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@ -1033,12 +1028,6 @@ static int bfin_spi_setup(struct spi_device *spi)
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chip->ctl_reg &= bfin_ctl_reg;
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}
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if (spi->bits_per_word % 8) {
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dev_err(&spi->dev, "%d bits_per_word is not supported\n",
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spi->bits_per_word);
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goto error;
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}
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/* translate common spi framework into our register */
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if (spi->mode & ~(SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST)) {
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dev_err(&spi->dev, "unsupported spi modes detected\n");
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@ -1299,7 +1288,7 @@ static int bfin_spi_probe(struct platform_device *pdev)
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/* the spi->mode bits supported by this driver: */
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master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST;
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master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16);
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master->bus_num = pdev->id;
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master->num_chipselect = platform_info->num_chipselect;
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master->cleanup = bfin_spi_cleanup;
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|
|
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@ -42,12 +42,6 @@ static int spi_clps711x_setup(struct spi_device *spi)
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{
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struct spi_clps711x_data *hw = spi_master_get_devdata(spi->master);
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if (spi->bits_per_word != 8) {
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dev_err(&spi->dev, "Unsupported master bus width %i\n",
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spi->bits_per_word);
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return -EINVAL;
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}
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|
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/* We are expect that SPI-device is not selected */
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gpio_direction_output(hw->chipselect[spi->chip_select],
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!(spi->mode & SPI_CS_HIGH));
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|
@ -190,6 +184,7 @@ static int spi_clps711x_probe(struct platform_device *pdev)
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master->bus_num = pdev->id;
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master->mode_bits = SPI_CPHA | SPI_CS_HIGH;
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master->bits_per_word_mask = SPI_BPW_MASK(8);
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master->num_chipselect = pdata->num_chipselect;
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master->setup = spi_clps711x_setup;
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master->transfer_one_message = spi_clps711x_transfer_one_message;
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|
|
|
@ -312,10 +312,7 @@ static int mcfqspi_transfer_one_message(struct spi_master *master,
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bool cs_high = spi->mode & SPI_CS_HIGH;
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u16 qmr = MCFQSPI_QMR_MSTR;
|
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|
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if (t->bits_per_word)
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qmr |= t->bits_per_word << 10;
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else
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qmr |= spi->bits_per_word << 10;
|
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qmr |= t->bits_per_word << 10;
|
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if (spi->mode & SPI_CPHA)
|
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qmr |= MCFQSPI_QMR_CPHA;
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if (spi->mode & SPI_CPOL)
|
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|
@ -377,11 +374,6 @@ static int mcfqspi_unprepare_transfer_hw(struct spi_master *master)
|
|||
|
||||
static int mcfqspi_setup(struct spi_device *spi)
|
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{
|
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if ((spi->bits_per_word < 8) || (spi->bits_per_word > 16)) {
|
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dev_dbg(&spi->dev, "%d bits per word is not supported\n",
|
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spi->bits_per_word);
|
||||
return -EINVAL;
|
||||
}
|
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if (spi->chip_select >= spi->master->num_chipselect) {
|
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dev_dbg(&spi->dev, "%d chip select is out of range\n",
|
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spi->chip_select);
|
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|
@ -477,6 +469,7 @@ static int mcfqspi_probe(struct platform_device *pdev)
|
|||
mcfqspi->dev = &pdev->dev;
|
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|
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master->mode_bits = SPI_CS_HIGH | SPI_CPOL | SPI_CPHA;
|
||||
master->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 16);
|
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master->setup = mcfqspi_setup;
|
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master->transfer_one_message = mcfqspi_transfer_one_message;
|
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master->prepare_transfer_hardware = mcfqspi_prepare_transfer_hw;
|
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|
|
|
@ -299,16 +299,15 @@ static int davinci_spi_setup_transfer(struct spi_device *spi,
|
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* Assign function pointer to appropriate transfer method
|
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* 8bit, 16bit or 32bit transfer
|
||||
*/
|
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if (bits_per_word <= 8 && bits_per_word >= 2) {
|
||||
if (bits_per_word <= 8) {
|
||||
dspi->get_rx = davinci_spi_rx_buf_u8;
|
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dspi->get_tx = davinci_spi_tx_buf_u8;
|
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dspi->bytes_per_word[spi->chip_select] = 1;
|
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} else if (bits_per_word <= 16 && bits_per_word >= 2) {
|
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} else {
|
||||
dspi->get_rx = davinci_spi_rx_buf_u16;
|
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dspi->get_tx = davinci_spi_tx_buf_u16;
|
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dspi->bytes_per_word[spi->chip_select] = 2;
|
||||
} else
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (!hz)
|
||||
hz = spi->max_speed_hz;
|
||||
|
@ -933,6 +932,7 @@ static int davinci_spi_probe(struct platform_device *pdev)
|
|||
master->dev.of_node = pdev->dev.of_node;
|
||||
master->bus_num = pdev->id;
|
||||
master->num_chipselect = pdata->num_chipselect;
|
||||
master->bits_per_word_mask = SPI_BPW_RANGE_MASK(2, 16);
|
||||
master->setup = davinci_spi_setup;
|
||||
|
||||
dspi->bitbang.chipselect = davinci_spi_chipselect;
|
||||
|
|
|
@ -457,19 +457,7 @@ static void pump_transfers(unsigned long data)
|
|||
}
|
||||
if (transfer->bits_per_word) {
|
||||
bits = transfer->bits_per_word;
|
||||
|
||||
switch (bits) {
|
||||
case 8:
|
||||
case 16:
|
||||
dws->n_bytes = dws->dma_width = bits >> 3;
|
||||
break;
|
||||
default:
|
||||
printk(KERN_ERR "MRST SPI0: unsupported bits:"
|
||||
"%db\n", bits);
|
||||
message->status = -EIO;
|
||||
goto early_exit;
|
||||
}
|
||||
|
||||
dws->n_bytes = dws->dma_width = bits >> 3;
|
||||
cr0 = (bits - 1)
|
||||
| (chip->type << SPI_FRF_OFFSET)
|
||||
| (spi->mode << SPI_MODE_OFFSET)
|
||||
|
@ -629,9 +617,6 @@ static int dw_spi_setup(struct spi_device *spi)
|
|||
struct dw_spi_chip *chip_info = NULL;
|
||||
struct chip_data *chip;
|
||||
|
||||
if (spi->bits_per_word != 8 && spi->bits_per_word != 16)
|
||||
return -EINVAL;
|
||||
|
||||
/* Only alloc on first setup */
|
||||
chip = spi_get_ctldata(spi);
|
||||
if (!chip) {
|
||||
|
@ -660,16 +645,12 @@ static int dw_spi_setup(struct spi_device *spi)
|
|||
chip->enable_dma = chip_info->enable_dma;
|
||||
}
|
||||
|
||||
if (spi->bits_per_word <= 8) {
|
||||
if (spi->bits_per_word == 8) {
|
||||
chip->n_bytes = 1;
|
||||
chip->dma_width = 1;
|
||||
} else if (spi->bits_per_word <= 16) {
|
||||
} else if (spi->bits_per_word == 16) {
|
||||
chip->n_bytes = 2;
|
||||
chip->dma_width = 2;
|
||||
} else {
|
||||
/* Never take >16b case for MRST SPIC */
|
||||
dev_err(&spi->dev, "invalid wordsize\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
chip->bits_per_word = spi->bits_per_word;
|
||||
|
||||
|
@ -824,6 +805,7 @@ int dw_spi_add_host(struct dw_spi *dws)
|
|||
}
|
||||
|
||||
master->mode_bits = SPI_CPOL | SPI_CPHA;
|
||||
master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16);
|
||||
master->bus_num = dws->bus_num;
|
||||
master->num_chipselect = dws->num_cs;
|
||||
master->cleanup = dw_spi_cleanup;
|
||||
|
|
|
@ -296,12 +296,6 @@ static int ep93xx_spi_setup(struct spi_device *spi)
|
|||
struct ep93xx_spi *espi = spi_master_get_devdata(spi->master);
|
||||
struct ep93xx_spi_chip *chip;
|
||||
|
||||
if (spi->bits_per_word < 4 || spi->bits_per_word > 16) {
|
||||
dev_err(&espi->pdev->dev, "invalid bits per word %d\n",
|
||||
spi->bits_per_word);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
chip = spi_get_ctldata(spi);
|
||||
if (!chip) {
|
||||
dev_dbg(&espi->pdev->dev, "initial setup for %s\n",
|
||||
|
@ -365,10 +359,6 @@ static int ep93xx_spi_transfer(struct spi_device *spi, struct spi_message *msg)
|
|||
|
||||
/* first validate each transfer */
|
||||
list_for_each_entry(t, &msg->transfers, transfer_list) {
|
||||
if (t->bits_per_word) {
|
||||
if (t->bits_per_word < 4 || t->bits_per_word > 16)
|
||||
return -EINVAL;
|
||||
}
|
||||
if (t->speed_hz && t->speed_hz < espi->min_rate)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
@ -1046,6 +1036,7 @@ static int ep93xx_spi_probe(struct platform_device *pdev)
|
|||
master->bus_num = pdev->id;
|
||||
master->num_chipselect = info->num_chipselect;
|
||||
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
|
||||
master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16);
|
||||
|
||||
platform_set_drvdata(pdev, master);
|
||||
|
||||
|
|
|
@ -144,10 +144,6 @@ static int fsl_espi_setup_transfer(struct spi_device *spi,
|
|||
if (!bits_per_word)
|
||||
bits_per_word = spi->bits_per_word;
|
||||
|
||||
/* Make sure its a bit width we support [4..16] */
|
||||
if ((bits_per_word < 4) || (bits_per_word > 16))
|
||||
return -EINVAL;
|
||||
|
||||
if (!hz)
|
||||
hz = spi->max_speed_hz;
|
||||
|
||||
|
@ -157,12 +153,10 @@ static int fsl_espi_setup_transfer(struct spi_device *spi,
|
|||
cs->get_tx = mpc8xxx_spi_tx_buf_u32;
|
||||
if (bits_per_word <= 8) {
|
||||
cs->rx_shift = 8 - bits_per_word;
|
||||
} else if (bits_per_word <= 16) {
|
||||
} else {
|
||||
cs->rx_shift = 16 - bits_per_word;
|
||||
if (spi->mode & SPI_LSB_FIRST)
|
||||
cs->get_tx = fsl_espi_tx_buf_lsb;
|
||||
} else {
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
mpc8xxx_spi->rx_shift = cs->rx_shift;
|
||||
|
@ -609,6 +603,7 @@ static struct spi_master * fsl_espi_probe(struct device *dev,
|
|||
if (ret)
|
||||
goto err_probe;
|
||||
|
||||
master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16);
|
||||
master->setup = fsl_espi_setup;
|
||||
|
||||
mpc8xxx_spi = spi_master_get_devdata(master);
|
||||
|
|
|
@ -239,9 +239,6 @@ static int spi_gpio_setup(struct spi_device *spi)
|
|||
struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
|
||||
struct device_node *np = spi->master->dev.of_node;
|
||||
|
||||
if (spi->bits_per_word > 32)
|
||||
return -EINVAL;
|
||||
|
||||
if (np) {
|
||||
/*
|
||||
* In DT environments, the CS GPIOs have already been
|
||||
|
@ -446,6 +443,7 @@ static int spi_gpio_probe(struct platform_device *pdev)
|
|||
if (pdata)
|
||||
spi_gpio->pdata = *pdata;
|
||||
|
||||
master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
|
||||
master->flags = master_flags;
|
||||
master->bus_num = pdev->id;
|
||||
master->num_chipselect = SPI_N_CHIPSEL;
|
||||
|
|
|
@ -698,11 +698,10 @@ static int spi_imx_setupxfer(struct spi_device *spi,
|
|||
} else if (config.bpw <= 16) {
|
||||
spi_imx->rx = spi_imx_buf_rx_u16;
|
||||
spi_imx->tx = spi_imx_buf_tx_u16;
|
||||
} else if (config.bpw <= 32) {
|
||||
} else {
|
||||
spi_imx->rx = spi_imx_buf_rx_u32;
|
||||
spi_imx->tx = spi_imx_buf_tx_u32;
|
||||
} else
|
||||
BUG();
|
||||
}
|
||||
|
||||
spi_imx->devtype_data->config(spi_imx, &config);
|
||||
|
||||
|
@ -783,6 +782,7 @@ static int spi_imx_probe(struct platform_device *pdev)
|
|||
|
||||
platform_set_drvdata(pdev, master);
|
||||
|
||||
master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
|
||||
master->bus_num = pdev->id;
|
||||
master->num_chipselect = num_cs;
|
||||
|
||||
|
|
|
@ -75,12 +75,6 @@ static int mxs_spi_setup_transfer(struct spi_device *dev,
|
|||
if (t && t->bits_per_word)
|
||||
bits_per_word = t->bits_per_word;
|
||||
|
||||
if (bits_per_word != 8) {
|
||||
dev_err(&dev->dev, "%s, unsupported bits_per_word=%d\n",
|
||||
__func__, bits_per_word);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
hz = dev->max_speed_hz;
|
||||
if (t && t->speed_hz)
|
||||
hz = min(hz, t->speed_hz);
|
||||
|
@ -548,6 +542,7 @@ static int mxs_spi_probe(struct platform_device *pdev)
|
|||
|
||||
master->transfer_one_message = mxs_spi_transfer_one;
|
||||
master->setup = mxs_spi_setup;
|
||||
master->bits_per_word_mask = SPI_BPW_MASK(8);
|
||||
master->mode_bits = SPI_CPOL | SPI_CPHA;
|
||||
master->num_chipselect = 3;
|
||||
master->dev.of_node = np;
|
||||
|
|
|
@ -174,17 +174,6 @@ static void nuc900_spi_gobusy(struct nuc900_spi *hw)
|
|||
spin_unlock_irqrestore(&hw->lock, flags);
|
||||
}
|
||||
|
||||
static int nuc900_spi_setupxfer(struct spi_device *spi,
|
||||
struct spi_transfer *t)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int nuc900_spi_setup(struct spi_device *spi)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline unsigned int hw_txbyte(struct nuc900_spi *hw, int count)
|
||||
{
|
||||
return hw->tx ? hw->tx[count] : 0;
|
||||
|
@ -377,10 +366,8 @@ static int nuc900_spi_probe(struct platform_device *pdev)
|
|||
master->num_chipselect = hw->pdata->num_cs;
|
||||
master->bus_num = hw->pdata->bus_num;
|
||||
hw->bitbang.master = hw->master;
|
||||
hw->bitbang.setup_transfer = nuc900_spi_setupxfer;
|
||||
hw->bitbang.chipselect = nuc900_spi_chipsel;
|
||||
hw->bitbang.txrx_bufs = nuc900_spi_txrx;
|
||||
hw->bitbang.master->setup = nuc900_spi_setup;
|
||||
|
||||
hw->res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (hw->res == NULL) {
|
||||
|
|
|
@ -298,12 +298,6 @@ static int omap1_spi100k_setup(struct spi_device *spi)
|
|||
struct omap1_spi100k *spi100k;
|
||||
struct omap1_spi100k_cs *cs = spi->controller_state;
|
||||
|
||||
if (spi->bits_per_word < 4 || spi->bits_per_word > 32) {
|
||||
dev_dbg(&spi->dev, "setup: unsupported %d bit words\n",
|
||||
spi->bits_per_word);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
spi100k = spi_master_get_devdata(spi->master);
|
||||
|
||||
if (!cs) {
|
||||
|
@ -451,10 +445,7 @@ static int omap1_spi100k_transfer(struct spi_device *spi, struct spi_message *m)
|
|||
unsigned len = t->len;
|
||||
|
||||
if (t->speed_hz > OMAP1_SPI100K_MAX_FREQ
|
||||
|| (len && !(rx_buf || tx_buf))
|
||||
|| (t->bits_per_word &&
|
||||
( t->bits_per_word < 4
|
||||
|| t->bits_per_word > 32))) {
|
||||
|| (len && !(rx_buf || tx_buf))) {
|
||||
dev_dbg(&spi->dev, "transfer: %d Hz, %d %s%s, %d bpw\n",
|
||||
t->speed_hz,
|
||||
len,
|
||||
|
@ -509,6 +500,7 @@ static int omap1_spi100k_probe(struct platform_device *pdev)
|
|||
master->cleanup = NULL;
|
||||
master->num_chipselect = 2;
|
||||
master->mode_bits = MODEBITS;
|
||||
master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);
|
||||
|
||||
dev_set_drvdata(&pdev->dev, master);
|
||||
|
||||
|
|
|
@ -857,12 +857,6 @@ static int omap2_mcspi_setup(struct spi_device *spi)
|
|||
struct omap2_mcspi_dma *mcspi_dma;
|
||||
struct omap2_mcspi_cs *cs = spi->controller_state;
|
||||
|
||||
if (spi->bits_per_word < 4 || spi->bits_per_word > 32) {
|
||||
dev_dbg(&spi->dev, "setup: unsupported %d bit words\n",
|
||||
spi->bits_per_word);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
mcspi_dma = &mcspi->dma_channels[spi->chip_select];
|
||||
|
||||
if (!cs) {
|
||||
|
@ -1072,10 +1066,7 @@ static int omap2_mcspi_transfer_one_message(struct spi_master *master,
|
|||
unsigned len = t->len;
|
||||
|
||||
if (t->speed_hz > OMAP2_MCSPI_MAX_FREQ
|
||||
|| (len && !(rx_buf || tx_buf))
|
||||
|| (t->bits_per_word &&
|
||||
( t->bits_per_word < 4
|
||||
|| t->bits_per_word > 32))) {
|
||||
|| (len && !(rx_buf || tx_buf))) {
|
||||
dev_dbg(mcspi->dev, "transfer: %d Hz, %d %s%s, %d bpw\n",
|
||||
t->speed_hz,
|
||||
len,
|
||||
|
@ -1196,7 +1187,7 @@ static int omap2_mcspi_probe(struct platform_device *pdev)
|
|||
|
||||
/* the spi->mode bits understood by this driver: */
|
||||
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
|
||||
|
||||
master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);
|
||||
master->setup = omap2_mcspi_setup;
|
||||
master->prepare_transfer_hardware = omap2_prepare_transfer;
|
||||
master->unprepare_transfer_hardware = omap2_unprepare_transfer;
|
||||
|
|
|
@ -190,12 +190,6 @@ static int spi_ppc4xx_setupxfer(struct spi_device *spi, struct spi_transfer *t)
|
|||
speed = min(t->speed_hz, spi->max_speed_hz);
|
||||
}
|
||||
|
||||
if (bits_per_word != 8) {
|
||||
dev_err(&spi->dev, "invalid bits-per-word (%d)\n",
|
||||
bits_per_word);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (!speed || (speed > spi->max_speed_hz)) {
|
||||
dev_err(&spi->dev, "invalid speed_hz (%d)\n", speed);
|
||||
return -EINVAL;
|
||||
|
@ -229,12 +223,6 @@ static int spi_ppc4xx_setup(struct spi_device *spi)
|
|||
{
|
||||
struct spi_ppc4xx_cs *cs = spi->controller_state;
|
||||
|
||||
if (spi->bits_per_word != 8) {
|
||||
dev_err(&spi->dev, "invalid bits-per-word (%d)\n",
|
||||
spi->bits_per_word);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (!spi->max_speed_hz) {
|
||||
dev_err(&spi->dev, "invalid max_speed_hz (must be non-zero)\n");
|
||||
return -EINVAL;
|
||||
|
@ -465,6 +453,7 @@ static int spi_ppc4xx_of_probe(struct platform_device *op)
|
|||
bbp->use_dma = 0;
|
||||
bbp->master->setup = spi_ppc4xx_setup;
|
||||
bbp->master->cleanup = spi_ppc4xx_cleanup;
|
||||
bbp->master->bits_per_word_mask = SPI_BPW_MASK(8);
|
||||
|
||||
/* the spi->mode bits understood by this driver: */
|
||||
bbp->master->mode_bits =
|
||||
|
|
|
@ -881,21 +881,6 @@ static int setup(struct spi_device *spi)
|
|||
rx_thres = RX_THRESH_DFLT;
|
||||
}
|
||||
|
||||
if (!pxa25x_ssp_comp(drv_data)
|
||||
&& (spi->bits_per_word < 4 || spi->bits_per_word > 32)) {
|
||||
dev_err(&spi->dev, "failed setup: ssp_type=%d, bits/wrd=%d "
|
||||
"b/w not 4-32 for type non-PXA25x_SSP\n",
|
||||
drv_data->ssp_type, spi->bits_per_word);
|
||||
return -EINVAL;
|
||||
} else if (pxa25x_ssp_comp(drv_data)
|
||||
&& (spi->bits_per_word < 4
|
||||
|| spi->bits_per_word > 16)) {
|
||||
dev_err(&spi->dev, "failed setup: ssp_type=%d, bits/wrd=%d "
|
||||
"b/w not 4-16 for type PXA25x_SSP\n",
|
||||
drv_data->ssp_type, spi->bits_per_word);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* Only alloc on first setup */
|
||||
chip = spi_get_ctldata(spi);
|
||||
if (!chip) {
|
||||
|
@ -1011,9 +996,6 @@ static int setup(struct spi_device *spi)
|
|||
chip->n_bytes = 4;
|
||||
chip->read = u32_reader;
|
||||
chip->write = u32_writer;
|
||||
} else {
|
||||
dev_err(&spi->dev, "invalid wordsize\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
chip->bits_per_word = spi->bits_per_word;
|
||||
|
||||
|
@ -1190,11 +1172,13 @@ static int pxa2xx_spi_probe(struct platform_device *pdev)
|
|||
drv_data->ioaddr = ssp->mmio_base;
|
||||
drv_data->ssdr_physical = ssp->phys_base + SSDR;
|
||||
if (pxa25x_ssp_comp(drv_data)) {
|
||||
master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16);
|
||||
drv_data->int_cr1 = SSCR1_TIE | SSCR1_RIE;
|
||||
drv_data->dma_cr1 = 0;
|
||||
drv_data->clear_sr = SSSR_ROR;
|
||||
drv_data->mask_sr = SSSR_RFS | SSSR_TFS | SSSR_ROR;
|
||||
} else {
|
||||
master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);
|
||||
drv_data->int_cr1 = SSCR1_TIE | SSCR1_RIE | SSCR1_TINTE;
|
||||
drv_data->dma_cr1 = DEFAULT_DMA_CR1;
|
||||
drv_data->clear_sr = SSSR_ROR | SSSR_TINT;
|
||||
|
|
|
@ -1314,7 +1314,8 @@ static int s3c64xx_spi_probe(struct platform_device *pdev)
|
|||
master->unprepare_transfer_hardware = s3c64xx_spi_unprepare_transfer;
|
||||
master->num_chipselect = sci->num_cs;
|
||||
master->dma_alignment = 8;
|
||||
master->bits_per_word_mask = BIT(32 - 1) | BIT(16 - 1) | BIT(8 - 1);
|
||||
master->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(16) |
|
||||
SPI_BPW_MASK(8);
|
||||
/* the spi->mode bits understood by this driver: */
|
||||
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
|
||||
|
||||
|
|
|
@ -426,9 +426,7 @@ spi_sirfsoc_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
|
|||
SIRFSOC_SPI_FIFO_WIDTH_DWORD;
|
||||
break;
|
||||
default:
|
||||
dev_err(&spi->dev, "Bits per word %d not supported\n",
|
||||
bits_per_word);
|
||||
return -EINVAL;
|
||||
BUG();
|
||||
}
|
||||
|
||||
if (!(spi->mode & SPI_CS_HIGH))
|
||||
|
@ -556,6 +554,8 @@ static int spi_sirfsoc_probe(struct platform_device *pdev)
|
|||
sspi->bitbang.txrx_bufs = spi_sirfsoc_transfer;
|
||||
sspi->bitbang.master->setup = spi_sirfsoc_setup;
|
||||
master->bus_num = pdev->id;
|
||||
master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(12) |
|
||||
SPI_BPW_MASK(16) | SPI_BPW_MASK(32);
|
||||
sspi->bitbang.master->dev.of_node = pdev->dev.of_node;
|
||||
|
||||
sspi->p = pinctrl_get_select_default(&pdev->dev);
|
||||
|
|
|
@ -237,14 +237,6 @@ static void ti_ssp_spi_work(struct work_struct *work)
|
|||
spin_unlock(&hw->lock);
|
||||
}
|
||||
|
||||
static int ti_ssp_spi_setup(struct spi_device *spi)
|
||||
{
|
||||
if (spi->bits_per_word > 32)
|
||||
return -EINVAL;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ti_ssp_spi_transfer(struct spi_device *spi, struct spi_message *m)
|
||||
{
|
||||
struct ti_ssp_spi *hw;
|
||||
|
@ -269,12 +261,6 @@ static int ti_ssp_spi_transfer(struct spi_device *spi, struct spi_message *m)
|
|||
dev_err(&spi->dev, "invalid xfer, full duplex\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (t->bits_per_word > 32) {
|
||||
dev_err(&spi->dev, "invalid xfer width %d\n",
|
||||
t->bits_per_word);
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
spin_lock(&hw->lock);
|
||||
|
@ -337,8 +323,8 @@ static int ti_ssp_spi_probe(struct platform_device *pdev)
|
|||
master->bus_num = pdev->id;
|
||||
master->num_chipselect = pdata->num_cs;
|
||||
master->mode_bits = MODE_BITS;
|
||||
master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
|
||||
master->flags = SPI_MASTER_HALF_DUPLEX;
|
||||
master->setup = ti_ssp_spi_setup;
|
||||
master->transfer = ti_ssp_spi_transfer;
|
||||
|
||||
error = spi_register_master(master);
|
||||
|
|
|
@ -472,11 +472,6 @@ static int pch_spi_setup(struct spi_device *pspi)
|
|||
dev_dbg(&pspi->dev, "%s 8 bits per word\n", __func__);
|
||||
}
|
||||
|
||||
if ((pspi->bits_per_word != 8) && (pspi->bits_per_word != 16)) {
|
||||
dev_err(&pspi->dev, "%s Invalid bits per word\n", __func__);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* Check baud rate setting */
|
||||
/* if baud rate of chip is greater than
|
||||
max we can support,return error */
|
||||
|
@ -537,17 +532,6 @@ static int pch_spi_transfer(struct spi_device *pspi, struct spi_message *pmsg)
|
|||
/* if baud rate has been specified validate the same */
|
||||
if (transfer->speed_hz > PCH_MAX_BAUDRATE)
|
||||
transfer->speed_hz = PCH_MAX_BAUDRATE;
|
||||
|
||||
/* if bits per word has been specified validate the same */
|
||||
if (transfer->bits_per_word) {
|
||||
if ((transfer->bits_per_word != 8)
|
||||
&& (transfer->bits_per_word != 16)) {
|
||||
retval = -EINVAL;
|
||||
dev_err(&pspi->dev,
|
||||
"%s Invalid bits per word\n", __func__);
|
||||
goto err_return_spinlock;
|
||||
}
|
||||
}
|
||||
}
|
||||
spin_unlock_irqrestore(&data->lock, flags);
|
||||
|
||||
|
@ -1442,6 +1426,7 @@ static int pch_spi_pd_probe(struct platform_device *plat_dev)
|
|||
master->setup = pch_spi_setup;
|
||||
master->transfer = pch_spi_transfer;
|
||||
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST;
|
||||
master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16);
|
||||
|
||||
data->board_dat = board_dat;
|
||||
data->plat_dev = plat_dev;
|
||||
|
|
|
@ -116,17 +116,12 @@ static void txx9spi_cs_func(struct spi_device *spi, struct txx9spi *c,
|
|||
static int txx9spi_setup(struct spi_device *spi)
|
||||
{
|
||||
struct txx9spi *c = spi_master_get_devdata(spi->master);
|
||||
u8 bits_per_word;
|
||||
|
||||
if (!spi->max_speed_hz
|
||||
|| spi->max_speed_hz > c->max_speed_hz
|
||||
|| spi->max_speed_hz < c->min_speed_hz)
|
||||
return -EINVAL;
|
||||
|
||||
bits_per_word = spi->bits_per_word;
|
||||
if (bits_per_word != 8 && bits_per_word != 16)
|
||||
return -EINVAL;
|
||||
|
||||
if (gpio_direction_output(spi->chip_select,
|
||||
!(spi->mode & SPI_CS_HIGH))) {
|
||||
dev_err(&spi->dev, "Cannot setup GPIO for chipselect.\n");
|
||||
|
@ -319,8 +314,6 @@ static int txx9spi_transfer(struct spi_device *spi, struct spi_message *m)
|
|||
|
||||
if (!t->tx_buf && !t->rx_buf && t->len)
|
||||
return -EINVAL;
|
||||
if (bits_per_word != 8 && bits_per_word != 16)
|
||||
return -EINVAL;
|
||||
if (t->len & ((bits_per_word >> 3) - 1))
|
||||
return -EINVAL;
|
||||
if (speed_hz < c->min_speed_hz || speed_hz > c->max_speed_hz)
|
||||
|
@ -411,6 +404,7 @@ static int txx9spi_probe(struct platform_device *dev)
|
|||
master->setup = txx9spi_setup;
|
||||
master->transfer = txx9spi_transfer;
|
||||
master->num_chipselect = (u16)UINT_MAX; /* any GPIO numbers */
|
||||
master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16);
|
||||
|
||||
ret = spi_register_master(master);
|
||||
if (ret)
|
||||
|
|
|
@ -76,7 +76,7 @@ static int spi_xcomm_setup_transfer(struct spi_xcomm *spi_xcomm,
|
|||
{
|
||||
unsigned int speed;
|
||||
|
||||
if ((t->bits_per_word && t->bits_per_word != 8) || t->len > 62)
|
||||
if (t->len > 62)
|
||||
return -EINVAL;
|
||||
|
||||
speed = t->speed_hz ? t->speed_hz : spi->max_speed_hz;
|
||||
|
@ -209,14 +209,6 @@ static int spi_xcomm_transfer_one(struct spi_master *master,
|
|||
return status;
|
||||
}
|
||||
|
||||
static int spi_xcomm_setup(struct spi_device *spi)
|
||||
{
|
||||
if (spi->bits_per_word != 8)
|
||||
return -EINVAL;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int spi_xcomm_probe(struct i2c_client *i2c,
|
||||
const struct i2c_device_id *id)
|
||||
{
|
||||
|
@ -233,8 +225,8 @@ static int spi_xcomm_probe(struct i2c_client *i2c,
|
|||
|
||||
master->num_chipselect = 16;
|
||||
master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_3WIRE;
|
||||
master->bits_per_word_mask = SPI_BPW_MASK(8);
|
||||
master->flags = SPI_MASTER_HALF_DUPLEX;
|
||||
master->setup = spi_xcomm_setup;
|
||||
master->transfer_one_message = spi_xcomm_transfer_one;
|
||||
master->dev.of_node = i2c->dev.of_node;
|
||||
i2c_set_clientdata(i2c, master);
|
||||
|
|
|
@ -232,21 +232,6 @@ static int xilinx_spi_setup_transfer(struct spi_device *spi,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int xilinx_spi_setup(struct spi_device *spi)
|
||||
{
|
||||
/* always return 0, we can not check the number of bits.
|
||||
* There are cases when SPI setup is called before any driver is
|
||||
* there, in that case the SPI core defaults to 8 bits, which we
|
||||
* do not support in some cases. But if we return an error, the
|
||||
* SPI device would not be registered and no driver can get hold of it
|
||||
* When the driver is there, it will call SPI setup again with the
|
||||
* correct number of bits per transfer.
|
||||
* If a driver setups with the wrong bit number, it will fail when
|
||||
* it tries to do a transfer
|
||||
*/
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void xilinx_spi_fill_tx_fifo(struct xilinx_spi *xspi)
|
||||
{
|
||||
u8 sr;
|
||||
|
@ -373,7 +358,6 @@ struct spi_master *xilinx_spi_init(struct device *dev, struct resource *mem,
|
|||
xspi->bitbang.chipselect = xilinx_spi_chipselect;
|
||||
xspi->bitbang.setup_transfer = xilinx_spi_setup_transfer;
|
||||
xspi->bitbang.txrx_bufs = xilinx_spi_txrx_bufs;
|
||||
xspi->bitbang.master->setup = xilinx_spi_setup;
|
||||
init_completion(&xspi->done);
|
||||
|
||||
if (!request_mem_region(mem->start, resource_size(mem),
|
||||
|
|
|
@ -308,6 +308,9 @@ struct spi_master {
|
|||
|
||||
/* bitmask of supported bits_per_word for transfers */
|
||||
u32 bits_per_word_mask;
|
||||
#define SPI_BPW_MASK(bits) BIT((bits) - 1)
|
||||
#define SPI_BIT_MASK(bits) (((bits) == 32) ? ~0UL : (BIT(bits) - 1))
|
||||
#define SPI_BPW_RANGE_MASK(min, max) (SPI_BIT_MASK(max) - SPI_BIT_MASK(min - 1))
|
||||
|
||||
/* other constraints relevant to this driver */
|
||||
u16 flags;
|
||||
|
|
Loading…
Reference in a new issue