mach-ux500: factor out l2x0 handling code
Following mach-imx we break out the l2x0 handling into its own file, avoiding some ifdefs. Also remove unnecessary creation of local pointers when there is already one file-local readily available. Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>wifi-calibration
Linus Walleij
parent
fb0225871e
commit
458eef2f4d
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@ -4,6 +4,7 @@
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obj-y := clock.o cpu.o devices.o devices-common.o \
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id.o usb.o
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obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
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obj-$(CONFIG_UX500_SOC_DB5500) += cpu-db5500.o dma-db5500.o
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obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o devices-db8500.o
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obj-$(CONFIG_MACH_U8500) += board-mop500.o board-mop500-sdi.o \
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@ -0,0 +1,72 @@
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/*
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* Copyright (C) ST-Ericsson SA 2011
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*
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* License terms: GNU General Public License (GPL) version 2
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*/
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#include <linux/io.h>
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#include <asm/cacheflush.h>
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#include <asm/hardware/cache-l2x0.h>
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#include <mach/hardware.h>
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#include <mach/id.h>
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static void __iomem *l2x0_base;
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static inline void ux500_cache_wait(void __iomem *reg, unsigned long mask)
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{
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/* wait for the operation to complete */
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while (readl_relaxed(reg) & mask)
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cpu_relax();
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}
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static inline void ux500_cache_sync(void)
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{
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writel_relaxed(0, l2x0_base + L2X0_CACHE_SYNC);
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ux500_cache_wait(l2x0_base + L2X0_CACHE_SYNC, 1);
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}
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/*
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* The L2 cache cannot be turned off in the non-secure world.
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* Dummy until a secure service is in place.
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*/
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static void ux500_l2x0_disable(void)
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{
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}
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/*
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* This is only called when doing a kexec, just after turning off the L2
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* and L1 cache, and it is surrounded by a spinlock in the generic version.
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* However, we're not really turning off the L2 cache right now and the
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* PL310 does not support exclusive accesses (used to implement the spinlock).
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* So, the invalidation needs to be done without the spinlock.
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*/
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static void ux500_l2x0_inv_all(void)
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{
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uint32_t l2x0_way_mask = (1<<16) - 1; /* Bitmask of active ways */
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/* invalidate all ways */
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writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_INV_WAY);
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ux500_cache_wait(l2x0_base + L2X0_INV_WAY, l2x0_way_mask);
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ux500_cache_sync();
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}
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static int ux500_l2x0_init(void)
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{
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if (cpu_is_u5500())
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l2x0_base = __io_address(U5500_L2CC_BASE);
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else if (cpu_is_u8500())
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l2x0_base = __io_address(U8500_L2CC_BASE);
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else
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ux500_unknown_soc();
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/* 64KB way size, 8 way associativity, force WA */
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l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);
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/* Override invalidate function */
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outer_cache.disable = ux500_l2x0_disable;
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outer_cache.inv_all = ux500_l2x0_inv_all;
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return 0;
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}
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early_initcall(ux500_l2x0_init);
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@ -11,8 +11,6 @@
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#include <linux/mfd/db8500-prcmu.h>
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#include <linux/mfd/db5500-prcmu.h>
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#include <asm/cacheflush.h>
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#include <asm/hardware/cache-l2x0.h>
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#include <asm/hardware/gic.h>
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#include <asm/mach/map.h>
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#include <asm/localtimer.h>
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@ -26,10 +24,6 @@
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void __iomem *_PRCMU_BASE;
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#ifdef CONFIG_CACHE_L2X0
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static void __iomem *l2x0_base;
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#endif
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void __init ux500_init_irq(void)
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{
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void __iomem *dist_base;
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@ -57,69 +51,6 @@ void __init ux500_init_irq(void)
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clk_init();
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}
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#ifdef CONFIG_CACHE_L2X0
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static inline void ux500_cache_wait(void __iomem *reg, unsigned long mask)
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{
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/* wait for the operation to complete */
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while (readl_relaxed(reg) & mask)
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cpu_relax();
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}
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static inline void ux500_cache_sync(void)
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{
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void __iomem *base = l2x0_base;
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writel_relaxed(0, base + L2X0_CACHE_SYNC);
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ux500_cache_wait(base + L2X0_CACHE_SYNC, 1);
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}
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/*
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* The L2 cache cannot be turned off in the non-secure world.
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* Dummy until a secure service is in place.
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*/
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static void ux500_l2x0_disable(void)
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{
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}
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/*
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* This is only called when doing a kexec, just after turning off the L2
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* and L1 cache, and it is surrounded by a spinlock in the generic version.
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* However, we're not really turning off the L2 cache right now and the
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* PL310 does not support exclusive accesses (used to implement the spinlock).
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* So, the invalidation needs to be done without the spinlock.
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*/
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static void ux500_l2x0_inv_all(void)
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{
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void __iomem *base = l2x0_base;
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uint32_t l2x0_way_mask = (1<<16) - 1; /* Bitmask of active ways */
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/* invalidate all ways */
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writel_relaxed(l2x0_way_mask, base + L2X0_INV_WAY);
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ux500_cache_wait(base + L2X0_INV_WAY, l2x0_way_mask);
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ux500_cache_sync();
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}
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static int ux500_l2x0_init(void)
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{
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if (cpu_is_u5500())
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l2x0_base = __io_address(U5500_L2CC_BASE);
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else if (cpu_is_u8500())
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l2x0_base = __io_address(U8500_L2CC_BASE);
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else
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ux500_unknown_soc();
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/* 64KB way size, 8 way associativity, force WA */
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l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);
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/* Override invalidate function */
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outer_cache.disable = ux500_l2x0_disable;
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outer_cache.inv_all = ux500_l2x0_inv_all;
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return 0;
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}
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early_initcall(ux500_l2x0_init);
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#endif
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static void __init ux500_timer_init(void)
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{
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#ifdef CONFIG_LOCAL_TIMERS
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