regmap: add MMIO bus support
This is a basic memory-mapped-IO bus for regmap. It has the following features and limitations: * Registers themselves may be 8, 16, 32, or 64-bit. 64-bit is only supported on 64-bit platforms. * Register offsets are limited to precisely 32-bit. * IO is performed using readl/writel, with no provision for using the __raw_readl or readl_relaxed variants. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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bacdbe0773
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@ -14,5 +14,8 @@ config REGMAP_I2C
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config REGMAP_SPI
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tristate
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config REGMAP_MMIO
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tristate
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config REGMAP_IRQ
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bool
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@ -3,4 +3,5 @@ obj-$(CONFIG_REGMAP) += regcache-rbtree.o regcache-lzo.o
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obj-$(CONFIG_DEBUG_FS) += regmap-debugfs.o
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obj-$(CONFIG_REGMAP_I2C) += regmap-i2c.o
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obj-$(CONFIG_REGMAP_SPI) += regmap-spi.o
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obj-$(CONFIG_REGMAP_MMIO) += regmap-mmio.o
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obj-$(CONFIG_REGMAP_IRQ) += regmap-irq.o
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217
drivers/base/regmap/regmap-mmio.c
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217
drivers/base/regmap/regmap-mmio.c
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@ -0,0 +1,217 @@
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/*
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* Register map access API - MMIO support
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*
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* Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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struct regmap_mmio_context {
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void __iomem *regs;
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unsigned val_bytes;
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};
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static int regmap_mmio_gather_write(void *context,
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const void *reg, size_t reg_size,
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const void *val, size_t val_size)
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{
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struct regmap_mmio_context *ctx = context;
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u32 offset;
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if (reg_size != 4)
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return -EIO;
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if (val_size % ctx->val_bytes)
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return -EIO;
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offset = be32_to_cpup(reg);
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while (val_size) {
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switch (ctx->val_bytes) {
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case 1:
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writeb(*(u8 *)val, ctx->regs + offset);
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break;
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case 2:
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writew(be16_to_cpup(val), ctx->regs + offset);
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break;
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case 4:
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writel(be32_to_cpup(val), ctx->regs + offset);
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break;
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#ifdef CONFIG_64BIT
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case 8:
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writeq(be64_to_cpup(val), ctx->regs + offset);
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break;
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#endif
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default:
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/* Should be caught by regmap_mmio_check_config */
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return -EIO;
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}
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val_size -= ctx->val_bytes;
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val += ctx->val_bytes;
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offset += ctx->val_bytes;
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}
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return 0;
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}
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static int regmap_mmio_write(void *context, const void *data, size_t count)
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{
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if (count < 4)
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return -EIO;
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return regmap_mmio_gather_write(context, data, 4, data + 4, count - 4);
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}
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static int regmap_mmio_read(void *context,
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const void *reg, size_t reg_size,
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void *val, size_t val_size)
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{
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struct regmap_mmio_context *ctx = context;
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u32 offset;
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if (reg_size != 4)
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return -EIO;
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if (val_size % ctx->val_bytes)
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return -EIO;
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offset = be32_to_cpup(reg);
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while (val_size) {
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switch (ctx->val_bytes) {
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case 1:
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*(u8 *)val = readb(ctx->regs + offset);
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break;
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case 2:
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*(u16 *)val = cpu_to_be16(readw(ctx->regs + offset));
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break;
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case 4:
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*(u32 *)val = cpu_to_be32(readl(ctx->regs + offset));
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break;
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#ifdef CONFIG_64BIT
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case 8:
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*(u64 *)val = cpu_to_be32(readq(ctx->regs + offset));
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break;
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#endif
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default:
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/* Should be caught by regmap_mmio_check_config */
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return -EIO;
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}
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val_size -= ctx->val_bytes;
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val += ctx->val_bytes;
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offset += ctx->val_bytes;
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}
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return 0;
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}
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static void regmap_mmio_free_context(void *context)
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{
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kfree(context);
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}
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static struct regmap_bus regmap_mmio = {
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.fast_io = true,
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.write = regmap_mmio_write,
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.gather_write = regmap_mmio_gather_write,
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.read = regmap_mmio_read,
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.free_context = regmap_mmio_free_context,
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};
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struct regmap_mmio_context *regmap_mmio_gen_context(void __iomem *regs,
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const struct regmap_config *config)
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{
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struct regmap_mmio_context *ctx;
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if (config->reg_bits != 32)
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return ERR_PTR(-EINVAL);
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if (config->pad_bits)
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return ERR_PTR(-EINVAL);
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switch (config->val_bits) {
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case 8:
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case 16:
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case 32:
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#ifdef CONFIG_64BIT
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case 64:
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#endif
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break;
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default:
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return ERR_PTR(-EINVAL);
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}
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ctx = kzalloc(GFP_KERNEL, sizeof(*ctx));
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if (!ctx)
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return ERR_PTR(-ENOMEM);
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ctx->regs = regs;
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ctx->val_bytes = config->val_bits / 8;
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return ctx;
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}
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/**
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* regmap_init_mmio(): Initialise register map
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*
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* @dev: Device that will be interacted with
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* @regs: Pointer to memory-mapped IO region
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* @config: Configuration for register map
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*
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* The return value will be an ERR_PTR() on error or a valid pointer to
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* a struct regmap.
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*/
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struct regmap *regmap_init_mmio(struct device *dev,
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void __iomem *regs,
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const struct regmap_config *config)
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{
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struct regmap_mmio_context *ctx;
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ctx = regmap_mmio_gen_context(regs, config);
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if (IS_ERR(ctx))
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return ERR_CAST(ctx);
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return regmap_init(dev, ®map_mmio, ctx, config);
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}
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EXPORT_SYMBOL_GPL(regmap_init_mmio);
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/**
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* devm_regmap_init_mmio(): Initialise managed register map
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*
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* @dev: Device that will be interacted with
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* @regs: Pointer to memory-mapped IO region
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* @config: Configuration for register map
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*
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* The return value will be an ERR_PTR() on error or a valid pointer
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* to a struct regmap. The regmap will be automatically freed by the
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* device management code.
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*/
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struct regmap *devm_regmap_init_mmio(struct device *dev,
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void __iomem *regs,
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const struct regmap_config *config)
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{
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struct regmap_mmio_context *ctx;
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ctx = regmap_mmio_gen_context(regs, config);
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if (IS_ERR(ctx))
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return ERR_CAST(ctx);
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return devm_regmap_init(dev, ®map_mmio, ctx, config);
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}
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EXPORT_SYMBOL_GPL(devm_regmap_init_mmio);
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MODULE_LICENSE("GPL v2");
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@ -137,6 +137,9 @@ struct regmap *regmap_init_i2c(struct i2c_client *i2c,
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const struct regmap_config *config);
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struct regmap *regmap_init_spi(struct spi_device *dev,
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const struct regmap_config *config);
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struct regmap *regmap_init_mmio(struct device *dev,
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void __iomem *regs,
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const struct regmap_config *config);
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struct regmap *devm_regmap_init(struct device *dev,
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const struct regmap_bus *bus,
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const struct regmap_config *config);
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struct regmap *devm_regmap_init_spi(struct spi_device *dev,
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const struct regmap_config *config);
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struct regmap *devm_regmap_init_mmio(struct device *dev,
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void __iomem *regs,
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const struct regmap_config *config);
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void regmap_exit(struct regmap *map);
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int regmap_reinit_cache(struct regmap *map,
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