clk/exynos5420: add hdmi mux to change parents in hdmi driver
hdmi driver needs to change the parent of hdmi clock to pixel clock or hdmiphy clock, based on the stability of hdmiphy. This patch is exposing the mux for changing the parent. Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com> Acked-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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@ -182,6 +182,11 @@ clock which they consume.
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g3d 501
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smmu_mixer 502
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Mux ID
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----------------------------
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mout_hdmi 640
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Example 1: An example of a clock controller node is listed below.
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clock: clock-controller@0x10010000 {
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@ -140,6 +140,9 @@ enum exynos5420_clks {
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aclk333_g2d = 480, g2d, aclk333_432_gscl = 490, smmu_3aa, smmu_fimcl0,
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smmu_fimcl1, smmu_fimcl3, fimc_lite3, aclk_g3d = 500, g3d, smmu_mixer,
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/* mux clocks */
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mout_hdmi = 640,
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nr_clks,
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};
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@ -400,7 +403,7 @@ static struct samsung_mux_clock exynos5420_mux_clks[] __initdata = {
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MUX(none, "mout_mipi1", group2_p, SRC_DISP10, 16, 3),
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MUX(none, "mout_dp1", group2_p, SRC_DISP10, 20, 3),
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MUX(none, "mout_pixel", group2_p, SRC_DISP10, 24, 3),
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MUX(none, "mout_hdmi", hdmi_p, SRC_DISP10, 28, 1),
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MUX(mout_hdmi, "mout_hdmi", hdmi_p, SRC_DISP10, 28, 1),
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/* MAU Block */
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MUX(none, "mout_maudio0", maudio0_p, SRC_MAU, 28, 3),
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