[SCSI] hpsa: do not attempt PCI power management reset method if we know it won't work.
Just go straight to the soft-reset method instead. Signed-off-by: Stephen M. Cameron <scameron@beardog.cce.hp.com> Signed-off-by: James Bottomley <jbottomley@parallels.com> Signed-off-by: James Bottomley <James.Bottomley@suse.de>
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dfc2224828
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4638078697
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@ -273,7 +273,7 @@ static ssize_t host_show_transport_mode(struct device *dev,
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"performant" : "simple");
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}
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/* List of controllers which cannot be reset on kexec with reset_devices */
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/* List of controllers which cannot be hard reset on kexec with reset_devices */
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static u32 unresettable_controller[] = {
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0x324a103C, /* Smart Array P712m */
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0x324b103C, /* SmartArray P711m */
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@ -291,16 +291,45 @@ static u32 unresettable_controller[] = {
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0x409D0E11, /* Smart Array 6400 EM */
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};
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static int ctlr_is_resettable(struct ctlr_info *h)
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/* List of controllers which cannot even be soft reset */
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static u32 soft_unresettable_controller[] = {
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/* Exclude 640x boards. These are two pci devices in one slot
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* which share a battery backed cache module. One controls the
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* cache, the other accesses the cache through the one that controls
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* it. If we reset the one controlling the cache, the other will
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* likely not be happy. Just forbid resetting this conjoined mess.
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* The 640x isn't really supported by hpsa anyway.
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*/
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0x409C0E11, /* Smart Array 6400 */
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0x409D0E11, /* Smart Array 6400 EM */
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};
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static int ctlr_is_hard_resettable(u32 board_id)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
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if (unresettable_controller[i] == h->board_id)
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if (unresettable_controller[i] == board_id)
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return 0;
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return 1;
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}
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static int ctlr_is_soft_resettable(u32 board_id)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
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if (soft_unresettable_controller[i] == board_id)
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return 0;
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return 1;
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}
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static int ctlr_is_resettable(u32 board_id)
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{
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return ctlr_is_hard_resettable(board_id) ||
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ctlr_is_soft_resettable(board_id);
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}
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static ssize_t host_show_resettable(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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@ -308,7 +337,7 @@ static ssize_t host_show_resettable(struct device *dev,
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struct Scsi_Host *shost = class_to_shost(dev);
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h = shost_to_hba(shost);
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return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h));
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return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
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}
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static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
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@ -3334,20 +3363,15 @@ static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
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* using the doorbell register.
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*/
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/* Exclude 640x boards. These are two pci devices in one slot
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* which share a battery backed cache module. One controls the
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* cache, the other accesses the cache through the one that controls
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* it. If we reset the one controlling the cache, the other will
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* likely not be happy. Just forbid resetting this conjoined mess.
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* The 640x isn't really supported by hpsa anyway.
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*/
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rc = hpsa_lookup_board_id(pdev, &board_id);
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if (rc < 0) {
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if (rc < 0 || !ctlr_is_resettable(board_id)) {
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dev_warn(&pdev->dev, "Not resetting device.\n");
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return -ENODEV;
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}
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if (board_id == 0x409C0E11 || board_id == 0x409D0E11)
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return -ENOTSUPP;
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/* if controller is soft- but not hard resettable... */
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if (!ctlr_is_hard_resettable(board_id))
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return -ENOTSUPP; /* try soft reset later. */
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/* Save the PCI command register */
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pci_read_config_word(pdev, 4, &command_register);
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