usb: phy: mxs: Add sync time after controller clear phcd
After clear portsc.phcd, PHY needs 200us stable time for switch 32K clock to AHB clock. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
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@ -151,6 +151,15 @@ static inline bool is_imx6sl_phy(struct mxs_phy *mxs_phy)
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return mxs_phy->data == &imx6sl_phy_data;
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}
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/*
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* PHY needs some 32K cycles to switch from 32K clock to
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* bus (such as AHB/AXI, etc) clock.
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*/
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static void mxs_phy_clock_switch_delay(void)
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{
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usleep_range(300, 400);
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}
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static int mxs_phy_hw_init(struct mxs_phy *mxs_phy)
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{
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int ret;
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@ -261,6 +270,7 @@ static int mxs_phy_init(struct usb_phy *phy)
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int ret;
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struct mxs_phy *mxs_phy = to_mxs_phy(phy);
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mxs_phy_clock_switch_delay();
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ret = clk_prepare_enable(mxs_phy->clk);
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if (ret)
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return ret;
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@ -289,6 +299,7 @@ static int mxs_phy_suspend(struct usb_phy *x, int suspend)
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x->io_priv + HW_USBPHY_CTRL_SET);
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clk_disable_unprepare(mxs_phy->clk);
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} else {
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mxs_phy_clock_switch_delay();
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ret = clk_prepare_enable(mxs_phy->clk);
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if (ret)
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return ret;
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