Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: powerpc/pseries: Fix build without CONFIG_HOTPLUG_CPU powerpc: Set nr_cpu_ids early and use it to free PACAs powerpc/pseries: Don't register global initcall powerpc/kexec: Fix mismatched ifdefs for PPC64/SMP. edac/mpc85xx: Limit setting/clearing of HID1[RFXE] to e500v1/v2 cores powerpc/85xx: Update dts for PCIe memory maps to match u-boot of Px020RDB
This commit is contained in:
commit
47e89798e7
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@ -1,7 +1,7 @@
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/*
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* P1020 RDB Device Tree Source
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*
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* Copyright 2009 Freescale Semiconductor Inc.
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* Copyright 2009-2011 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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@ -553,7 +553,7 @@
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reg = <0 0xffe09000 0 0x1000>;
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bus-range = <0 255>;
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ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
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0x1000000 0x0 0x00000000 0 0xffc30000 0x0 0x10000>;
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0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
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clock-frequency = <33333333>;
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interrupt-parent = <&mpic>;
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interrupts = <16 2>;
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@ -580,8 +580,8 @@
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#address-cells = <3>;
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reg = <0 0xffe0a000 0 0x1000>;
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bus-range = <0 255>;
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ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
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0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
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ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
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0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
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clock-frequency = <33333333>;
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interrupt-parent = <&mpic>;
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interrupts = <16 2>;
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@ -590,8 +590,8 @@
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#size-cells = <2>;
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#address-cells = <3>;
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device_type = "pci";
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ranges = <0x2000000 0x0 0xc0000000
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0x2000000 0x0 0xc0000000
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ranges = <0x2000000 0x0 0x80000000
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0x2000000 0x0 0x80000000
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0x0 0x20000000
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0x1000000 0x0 0x0
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@ -1,7 +1,7 @@
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/*
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* P2020 RDB Device Tree Source
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*
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* Copyright 2009 Freescale Semiconductor Inc.
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* Copyright 2009-2011 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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@ -537,7 +537,7 @@
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reg = <0 0xffe09000 0 0x1000>;
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bus-range = <0 255>;
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ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
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0x1000000 0x0 0x00000000 0 0xffc30000 0x0 0x10000>;
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0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
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clock-frequency = <33333333>;
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interrupt-parent = <&mpic>;
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interrupts = <25 2>;
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@ -564,8 +564,8 @@
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#address-cells = <3>;
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reg = <0 0xffe0a000 0 0x1000>;
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bus-range = <0 255>;
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ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
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0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
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ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
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0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
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clock-frequency = <33333333>;
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interrupt-parent = <&mpic>;
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interrupts = <26 2>;
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@ -574,8 +574,8 @@
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#size-cells = <2>;
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#address-cells = <3>;
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device_type = "pci";
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ranges = <0x2000000 0x0 0xc0000000
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0x2000000 0x0 0xc0000000
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ranges = <0x2000000 0x0 0x80000000
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0x2000000 0x0 0x80000000
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0x0 0x20000000
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0x1000000 0x0 0x0
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@ -6,7 +6,7 @@
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* This dts file allows core0 to have memory, l2, i2c, spi, gpio, dma1, usb,
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* eth1, eth2, sdhc, crypto, global-util, pci0.
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*
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* Copyright 2009 Freescale Semiconductor Inc.
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* Copyright 2009-2011 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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@ -342,7 +342,7 @@
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reg = <0 0xffe09000 0 0x1000>;
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bus-range = <0 255>;
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ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
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0x1000000 0x0 0x00000000 0 0xffc30000 0x0 0x10000>;
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0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
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clock-frequency = <33333333>;
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interrupt-parent = <&mpic>;
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interrupts = <25 2>;
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@ -7,7 +7,7 @@
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*
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* Please note to add "-b 1" for core1's dts compiling.
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*
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* Copyright 2009 Freescale Semiconductor Inc.
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* Copyright 2009-2011 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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@ -162,8 +162,8 @@
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#address-cells = <3>;
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reg = <0 0xffe0a000 0 0x1000>;
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bus-range = <0 255>;
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ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
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0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
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ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
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0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
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clock-frequency = <33333333>;
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interrupt-parent = <&mpic>;
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interrupts = <26 2>;
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@ -172,8 +172,8 @@
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#size-cells = <2>;
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#address-cells = <3>;
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device_type = "pci";
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ranges = <0x2000000 0x0 0xc0000000
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0x2000000 0x0 0xc0000000
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ranges = <0x2000000 0x0 0x80000000
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0x2000000 0x0 0x80000000
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0x0 0x20000000
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0x1000000 0x0 0x0
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@ -163,7 +163,7 @@ static void crash_kexec_prepare_cpus(int cpu)
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}
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/* wait for all the CPUs to hit real mode but timeout if they don't come in */
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#ifdef CONFIG_PPC_STD_MMU_64
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#if defined(CONFIG_PPC_STD_MMU_64) && defined(CONFIG_SMP)
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static void crash_kexec_wait_realmode(int cpu)
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{
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unsigned int msecs;
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}
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mb();
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}
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#else
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static inline void crash_kexec_wait_realmode(int cpu) {}
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#endif
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/*
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crash_save_cpu(regs, crashing_cpu);
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crash_kexec_prepare_cpus(crashing_cpu);
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cpu_set(crashing_cpu, cpus_in_crash);
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#if defined(CONFIG_PPC_STD_MMU_64) && defined(CONFIG_SMP)
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crash_kexec_wait_realmode(crashing_cpu);
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#endif
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machine_kexec_mask_interrupts();
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@ -203,7 +203,7 @@ void __init free_unused_pacas(void)
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{
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int new_size;
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new_size = PAGE_ALIGN(sizeof(struct paca_struct) * num_possible_cpus());
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new_size = PAGE_ALIGN(sizeof(struct paca_struct) * nr_cpu_ids);
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if (new_size >= paca_size)
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return;
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*/
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cpu_init_thread_core_maps(nthreads);
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/* Now that possible cpus are set, set nr_cpu_ids for later use */
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nr_cpu_ids = find_last_bit(cpumask_bits(cpu_possible_mask),NR_CPUS) + 1;
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free_unused_pacas();
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}
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#endif /* CONFIG_SMP */
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@ -378,7 +378,7 @@ static int __init pSeries_init_panel(void)
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return 0;
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}
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arch_initcall(pSeries_init_panel);
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machine_arch_initcall(pseries, pSeries_init_panel);
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static int pseries_set_dabr(unsigned long dabr)
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{
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@ -112,10 +112,10 @@ static inline int __devinit smp_startup_cpu(unsigned int lcpu)
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/* Fixup atomic count: it exited inside IRQ handler. */
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task_thread_info(paca[lcpu].__current)->preempt_count = 0;
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#ifdef CONFIG_HOTPLUG_CPU
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if (get_cpu_current_state(lcpu) == CPU_STATE_INACTIVE)
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goto out;
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#endif
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/*
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* If the RTAS start-cpu token does not exist then presume the
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* cpu is already spinning.
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return 0;
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}
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#ifdef CONFIG_HOTPLUG_CPU
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out:
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#endif
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return 1;
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}
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vpa_init(cpu);
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cpumask_clear_cpu(cpu, of_spin_mask);
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#ifdef CONFIG_HOTPLUG_CPU
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set_cpu_current_state(cpu, CPU_STATE_ONLINE);
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set_default_offline_state(cpu);
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#endif
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}
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#endif /* CONFIG_XICS */
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static void __devinit smp_pSeries_kick_cpu(int nr)
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{
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long rc;
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unsigned long hcpuid;
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BUG_ON(nr < 0 || nr >= NR_CPUS);
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if (!smp_startup_cpu(nr))
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* the processor will continue on to secondary_start
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*/
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paca[nr].cpu_start = 1;
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#ifdef CONFIG_HOTPLUG_CPU
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set_preferred_offline_state(nr, CPU_STATE_ONLINE);
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if (get_cpu_current_state(nr) == CPU_STATE_INACTIVE) {
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long rc;
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unsigned long hcpuid;
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hcpuid = get_hard_smp_processor_id(nr);
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rc = plpar_hcall_norets(H_PROD, hcpuid);
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if (rc != H_SUCCESS)
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printk(KERN_ERR "Error: Prod to wake up processor %d "
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"Ret= %ld\n", nr, rc);
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}
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#endif
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}
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static int smp_pSeries_cpu_bootable(unsigned int nr)
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@ -1147,13 +1147,14 @@ static struct platform_driver mpc85xx_mc_err_driver = {
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static void __init mpc85xx_mc_clear_rfxe(void *data)
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{
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orig_hid1[smp_processor_id()] = mfspr(SPRN_HID1);
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mtspr(SPRN_HID1, (orig_hid1[smp_processor_id()] & ~0x20000));
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mtspr(SPRN_HID1, (orig_hid1[smp_processor_id()] & ~HID1_RFXE));
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}
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#endif
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static int __init mpc85xx_mc_init(void)
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{
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int res = 0;
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u32 pvr = 0;
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printk(KERN_INFO "Freescale(R) MPC85xx EDAC driver, "
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"(C) 2006 Montavista Software\n");
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#endif
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#ifdef CONFIG_FSL_SOC_BOOKE
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/*
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* need to clear HID1[RFXE] to disable machine check int
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* so we can catch it
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*/
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if (edac_op_state == EDAC_OPSTATE_INT)
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on_each_cpu(mpc85xx_mc_clear_rfxe, NULL, 0);
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pvr = mfspr(SPRN_PVR);
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if ((PVR_VER(pvr) == PVR_VER_E500V1) ||
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(PVR_VER(pvr) == PVR_VER_E500V2)) {
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/*
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* need to clear HID1[RFXE] to disable machine check int
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* so we can catch it
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*/
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if (edac_op_state == EDAC_OPSTATE_INT)
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on_each_cpu(mpc85xx_mc_clear_rfxe, NULL, 0);
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}
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#endif
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return 0;
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@ -1206,7 +1212,12 @@ static void __exit mpc85xx_mc_restore_hid1(void *data)
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static void __exit mpc85xx_mc_exit(void)
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{
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#ifdef CONFIG_FSL_SOC_BOOKE
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on_each_cpu(mpc85xx_mc_restore_hid1, NULL, 0);
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u32 pvr = mfspr(SPRN_PVR);
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if ((PVR_VER(pvr) == PVR_VER_E500V1) ||
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(PVR_VER(pvr) == PVR_VER_E500V2)) {
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on_each_cpu(mpc85xx_mc_restore_hid1, NULL, 0);
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}
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#endif
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#ifdef CONFIG_PCI
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platform_driver_unregister(&mpc85xx_pci_err_driver);
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