[PATCH] bcm43xx: Code cleanups. This removes various "inline" statements and reduces codesize.
Signed-off-by: Michael Buesch <mbuesch@freenet.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Michael Buesch
John W. Linville
parent
ab4977f881
commit
489423c8d0
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@ -19,16 +19,17 @@
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#define PFX KBUILD_MODNAME ": "
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#define BCM43xx_SWITCH_CORE_MAX_RETRIES 10
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#define BCM43xx_SWITCH_CORE_MAX_RETRIES 50
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#define BCM43xx_IRQWAIT_MAX_RETRIES 50
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#define BCM43xx_IO_SIZE 8192
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#define BCM43xx_REG_ACTIVE_CORE 0x80
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/* Interrupt Control PCI Configuration Register. (Only on PCI cores with rev >= 6) */
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#define BCM43xx_PCICFG_ICR 0x94
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/* Active Core PCI Configuration Register. */
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#define BCM43xx_PCICFG_ACTIVE_CORE 0x80
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/* SPROM control register. */
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#define BCM43xx_PCICFG_SPROMCTL 0x88
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/* Interrupt Control PCI Configuration Register. (Only on PCI cores with rev >= 6) */
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#define BCM43xx_PCICFG_ICR 0x94
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/* MMIO offsets */
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#define BCM43xx_MMIO_DMA1_REASON 0x20
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@ -119,40 +119,29 @@ MODULE_PARM_DESC(fwpostfix, "Postfix for .fw files. Useful for debugging.");
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//#define DEBUG_ENABLE_PCILOG
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static struct pci_device_id bcm43xx_pci_tbl[] = {
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/* Detailed list maintained at:
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* http://openfacts.berlios.de/index-en.phtml?title=Bcm43xxDevices
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*/
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/* Detailed list maintained at:
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* http://openfacts.berlios.de/index-en.phtml?title=Bcm43xxDevices
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*/
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static struct pci_device_id bcm43xx_pci_tbl[] = {
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/* Broadcom 4303 802.11b */
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{ PCI_VENDOR_ID_BROADCOM, 0x4301, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
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/* Broadcom 4307 802.11b */
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{ PCI_VENDOR_ID_BROADCOM, 0x4307, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
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/* Broadcom 4318 802.11b/g */
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{ PCI_VENDOR_ID_BROADCOM, 0x4318, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
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/* Broadcom 4306 802.11b/g */
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{ PCI_VENDOR_ID_BROADCOM, 0x4320, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
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/* Broadcom 4306 802.11a */
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// { PCI_VENDOR_ID_BROADCOM, 0x4321, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
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/* Broadcom 4309 802.11a/b/g */
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{ PCI_VENDOR_ID_BROADCOM, 0x4324, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
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/* Broadcom 43XG 802.11b/g */
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{ PCI_VENDOR_ID_BROADCOM, 0x4325, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
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#ifdef CONFIG_BCM947XX
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/* SB bus on BCM947xx */
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{ PCI_VENDOR_ID_BROADCOM, 0x0800, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
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#endif
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/* Broadcom 4303 802.11b */
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{ PCI_VENDOR_ID_BROADCOM, 0x4301, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
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/* Broadcom 4307 802.11b */
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{ PCI_VENDOR_ID_BROADCOM, 0x4307, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
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/* Broadcom 4318 802.11b/g */
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{ PCI_VENDOR_ID_BROADCOM, 0x4318, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
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/* Broadcom 4306 802.11b/g */
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{ PCI_VENDOR_ID_BROADCOM, 0x4320, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
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/* Broadcom 4306 802.11a */
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// { PCI_VENDOR_ID_BROADCOM, 0x4321, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
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/* Broadcom 4309 802.11a/b/g */
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{ PCI_VENDOR_ID_BROADCOM, 0x4324, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
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/* Broadcom 43XG 802.11b/g */
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{ PCI_VENDOR_ID_BROADCOM, 0x4325, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
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/* required last entry */
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{ 0, },
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{ 0 },
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};
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MODULE_DEVICE_TABLE(pci, bcm43xx_pci_tbl);
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@ -353,9 +342,8 @@ void bcm43xx_tsf_write(struct bcm43xx_private *bcm, u64 tsf)
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bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD, status);
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}
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static inline
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u8 bcm43xx_plcp_get_bitrate(struct bcm43xx_plcp_hdr4 *plcp,
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const int ofdm_modulation)
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static u8 bcm43xx_plcp_get_bitrate(struct bcm43xx_plcp_hdr4 *plcp,
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const int ofdm_modulation)
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{
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u8 rate;
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@ -412,8 +400,7 @@ u8 bcm43xx_plcp_get_bitrate(struct bcm43xx_plcp_hdr4 *plcp,
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return rate;
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}
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static inline
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u8 bcm43xx_plcp_get_ratecode_cck(const u8 bitrate)
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static u8 bcm43xx_plcp_get_ratecode_cck(const u8 bitrate)
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{
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switch (bitrate) {
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case IEEE80211_CCK_RATE_1MB:
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@ -429,8 +416,7 @@ u8 bcm43xx_plcp_get_ratecode_cck(const u8 bitrate)
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return 0;
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}
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static inline
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u8 bcm43xx_plcp_get_ratecode_ofdm(const u8 bitrate)
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static u8 bcm43xx_plcp_get_ratecode_ofdm(const u8 bitrate)
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{
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switch (bitrate) {
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case IEEE80211_OFDM_RATE_6MB:
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@ -489,13 +475,12 @@ static void bcm43xx_generate_plcp_hdr(struct bcm43xx_plcp_hdr4 *plcp,
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//bcm43xx_printk_bitdump(raw, 4, 0, "PLCP");
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}
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void fastcall
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bcm43xx_generate_txhdr(struct bcm43xx_private *bcm,
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struct bcm43xx_txhdr *txhdr,
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const unsigned char *fragment_data,
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unsigned int fragment_len,
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const int is_first_fragment,
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const u16 cookie)
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void bcm43xx_generate_txhdr(struct bcm43xx_private *bcm,
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struct bcm43xx_txhdr *txhdr,
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const unsigned char *fragment_data,
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unsigned int fragment_len,
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const int is_first_fragment,
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const u16 cookie)
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{
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const struct bcm43xx_phyinfo *phy = bcm->current_core->phy;
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const struct ieee80211_hdr_1addr *wireless_header = (const struct ieee80211_hdr_1addr *)fragment_data;
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@ -606,9 +591,8 @@ void bcm43xx_macfilter_set(struct bcm43xx_private *bcm,
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bcm43xx_write16(bcm, BCM43xx_MMIO_MACFILTER_DATA, data);
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}
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static inline
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void bcm43xx_macfilter_clear(struct bcm43xx_private *bcm,
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u16 offset)
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static void bcm43xx_macfilter_clear(struct bcm43xx_private *bcm,
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u16 offset)
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{
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const u8 zero_addr[ETH_ALEN] = { 0 };
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@ -634,8 +618,7 @@ static void bcm43xx_write_mac_bssid_templates(struct bcm43xx_private *bcm)
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bcm43xx_ram_write(bcm, 0x478 + i, *((u32 *)(mac_bssid + i)));
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}
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static inline
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void bcm43xx_set_slot_time(struct bcm43xx_private *bcm, u16 slot_time)
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static void bcm43xx_set_slot_time(struct bcm43xx_private *bcm, u16 slot_time)
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{
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/* slot_time is in usec. */
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if (bcm->current_core->phy->type != BCM43xx_PHYTYPE_G)
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@ -644,14 +627,12 @@ void bcm43xx_set_slot_time(struct bcm43xx_private *bcm, u16 slot_time)
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bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0010, slot_time);
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}
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static inline
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void bcm43xx_short_slot_timing_enable(struct bcm43xx_private *bcm)
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static void bcm43xx_short_slot_timing_enable(struct bcm43xx_private *bcm)
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{
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bcm43xx_set_slot_time(bcm, 9);
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}
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static inline
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void bcm43xx_short_slot_timing_disable(struct bcm43xx_private *bcm)
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static void bcm43xx_short_slot_timing_disable(struct bcm43xx_private *bcm)
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{
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bcm43xx_set_slot_time(bcm, 20);
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}
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@ -744,6 +725,8 @@ static int bcm43xx_disable_interrupts_sync(struct bcm43xx_private *bcm, u32 *old
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static int bcm43xx_read_radioinfo(struct bcm43xx_private *bcm)
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{
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struct bcm43xx_radioinfo *radio = bcm->current_core->radio;
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struct bcm43xx_phyinfo *phy = bcm->current_core->phy;
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u32 radio_id;
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u16 manufact;
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u16 version;
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@ -769,10 +752,10 @@ static int bcm43xx_read_radioinfo(struct bcm43xx_private *bcm)
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version = (radio_id & 0x0FFFF000) >> 12;
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revision = (radio_id & 0xF0000000) >> 28;
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dprintk(KERN_INFO PFX "Detected Radio: ID: %x (Manuf: %x Ver: %x Rev: %x)\n",
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dprintk(KERN_INFO PFX "Detected Radio: ID: %x (Manuf: %x Ver: %x Rev: %x)\n",
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radio_id, manufact, version, revision);
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switch (bcm->current_core->phy->type) {
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switch (phy->type) {
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case BCM43xx_PHYTYPE_A:
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if ((version != 0x2060) || (revision != 1) || (manufact != 0x17f))
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goto err_unsupported_radio;
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@ -787,25 +770,25 @@ static int bcm43xx_read_radioinfo(struct bcm43xx_private *bcm)
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break;
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}
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bcm->current_core->radio->manufact = manufact;
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bcm->current_core->radio->version = version;
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bcm->current_core->radio->revision = revision;
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radio->manufact = manufact;
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radio->version = version;
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radio->revision = revision;
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/* Set default attenuation values. */
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bcm->current_core->radio->txpower[0] = 2;
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bcm->current_core->radio->txpower[1] = 2;
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radio->txpower[0] = 2;
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radio->txpower[1] = 2;
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if (revision == 1)
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bcm->current_core->radio->txpower[2] = 3;
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radio->txpower[2] = 3;
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else
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bcm->current_core->radio->txpower[2] = 0;
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radio->txpower[2] = 0;
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if (bcm->current_core->phy->type == BCM43xx_PHYTYPE_A)
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bcm->current_core->radio->txpower_desired = bcm->sprom.maxpower_aphy;
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radio->txpower_desired = bcm->sprom.maxpower_aphy;
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else
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bcm->current_core->radio->txpower_desired = bcm->sprom.maxpower_bgphy;
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/* Initialize the in-memory nrssi Lookup Table. */
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for (i = 0; i < 64; i++)
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bcm->current_core->radio->nrssi_lt[i] = i;
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radio->nrssi_lt[i] = i;
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return 0;
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@ -1155,6 +1138,7 @@ static void bcm43xx_geo_init(struct bcm43xx_private *bcm)
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*/
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void bcm43xx_dummy_transmission(struct bcm43xx_private *bcm)
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{
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struct bcm43xx_phyinfo *phy = bcm->current_core->phy;
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unsigned int i, max_loop;
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u16 value = 0;
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u32 buffer[5] = {
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@ -1165,7 +1149,7 @@ void bcm43xx_dummy_transmission(struct bcm43xx_private *bcm)
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0x00000000,
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};
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switch (bcm->current_core->phy->type) {
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switch (phy->type) {
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case BCM43xx_PHYTYPE_A:
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max_loop = 0x1E;
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buffer[0] = 0xCC010200;
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@ -1187,7 +1171,7 @@ void bcm43xx_dummy_transmission(struct bcm43xx_private *bcm)
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bcm43xx_write16(bcm, 0x0568, 0x0000);
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bcm43xx_write16(bcm, 0x07C0, 0x0000);
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bcm43xx_write16(bcm, 0x050C, ((bcm->current_core->phy->type == BCM43xx_PHYTYPE_A) ? 1 : 0));
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bcm43xx_write16(bcm, 0x050C, ((phy->type == BCM43xx_PHYTYPE_A) ? 1 : 0));
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bcm43xx_write16(bcm, 0x0508, 0x0000);
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bcm43xx_write16(bcm, 0x050A, 0x0000);
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bcm43xx_write16(bcm, 0x054C, 0x0000);
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@ -1324,25 +1308,6 @@ static void bcm43xx_clear_keys(struct bcm43xx_private *bcm)
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dprintk(KERN_INFO PFX "Keys cleared\n");
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}
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/* Puts the index of the current core into user supplied core variable.
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* This function reads the value from the device.
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* Almost always you don't want to call this, but use bcm->current_core
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*/
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static inline
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int _get_current_core(struct bcm43xx_private *bcm, int *core)
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{
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int err;
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err = bcm43xx_pci_read_config32(bcm, BCM43xx_REG_ACTIVE_CORE, core);
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if (unlikely(err)) {
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dprintk(KERN_ERR PFX "BCM43xx_REG_ACTIVE_CORE read failed!\n");
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return -ENODEV;
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}
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*core = (*core - 0x18000000) / 0x1000;
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return 0;
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}
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/* Lowlevel core-switch function. This is only to be used in
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* bcm43xx_switch_core() and bcm43xx_probe_cores()
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*/
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@ -1350,63 +1315,57 @@ static int _switch_core(struct bcm43xx_private *bcm, int core)
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{
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int err;
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int attempts = 0;
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int current_core = -1;
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u32 current_core;
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assert(core >= 0);
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err = _get_current_core(bcm, ¤t_core);
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if (unlikely(err))
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goto out;
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/* Write the computed value to the register. This doesn't always
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succeed so we retry BCM43xx_SWITCH_CORE_MAX_RETRIES times */
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while (current_core != core) {
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if (unlikely(attempts++ > BCM43xx_SWITCH_CORE_MAX_RETRIES)) {
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err = -ENODEV;
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printk(KERN_ERR PFX
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"unable to switch to core %u, retried %i times\n",
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core, attempts);
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goto out;
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}
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err = bcm43xx_pci_write_config32(bcm, BCM43xx_REG_ACTIVE_CORE,
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while (1) {
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err = bcm43xx_pci_write_config32(bcm, BCM43xx_PCICFG_ACTIVE_CORE,
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(core * 0x1000) + 0x18000000);
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if (unlikely(err)) {
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dprintk(KERN_ERR PFX "BCM43xx_REG_ACTIVE_CORE write failed!\n");
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continue;
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}
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_get_current_core(bcm, ¤t_core);
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#ifdef CONFIG_BCM947XX
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if (bcm->pci_dev->bus->number == 0)
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bcm->current_core_offset = 0x1000 * core;
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else
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bcm->current_core_offset = 0;
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#endif
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}
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if (unlikely(err))
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goto error;
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err = bcm43xx_pci_read_config32(bcm, BCM43xx_PCICFG_ACTIVE_CORE,
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¤t_core);
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if (unlikely(err))
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goto error;
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current_core = (current_core - 0x18000000) / 0x1000;
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if (current_core == core)
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break;
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assert(err == 0);
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out:
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return err;
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if (unlikely(attempts++ > BCM43xx_SWITCH_CORE_MAX_RETRIES))
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goto error;
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udelay(10);
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}
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#ifdef CONFIG_BCM947XX
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if (bcm->pci_dev->bus->number == 0)
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bcm->current_core_offset = 0x1000 * core;
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else
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bcm->current_core_offset = 0;
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#endif
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return 0;
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error:
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printk(KERN_ERR PFX "Failed to switch to core %d\n", core);
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return -ENODEV;
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}
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int bcm43xx_switch_core(struct bcm43xx_private *bcm, struct bcm43xx_coreinfo *new_core)
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{
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int err;
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if (!new_core)
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if (unlikely(!new_core))
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return 0;
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if (!(new_core->flags & BCM43xx_COREFLAG_AVAILABLE))
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return -ENODEV;
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if (bcm->current_core == new_core)
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return 0;
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err = _switch_core(bcm, new_core->index);
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if (!err)
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if (likely(!err))
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bcm->current_core = new_core;
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return err;
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}
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static inline int bcm43xx_core_enabled(struct bcm43xx_private *bcm)
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static int bcm43xx_core_enabled(struct bcm43xx_private *bcm)
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{
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u32 value;
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@ -1609,7 +1568,7 @@ out:
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return err;
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}
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static inline void handle_irq_transmit_status(struct bcm43xx_private *bcm)
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static void handle_irq_transmit_status(struct bcm43xx_private *bcm)
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{
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u32 v0, v1;
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u16 tmp;
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@ -1648,7 +1607,7 @@ static inline void handle_irq_transmit_status(struct bcm43xx_private *bcm)
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}
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}
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|
||||
static inline void bcm43xx_generate_noise_sample(struct bcm43xx_private *bcm)
|
||||
static void bcm43xx_generate_noise_sample(struct bcm43xx_private *bcm)
|
||||
{
|
||||
bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x408, 0x7F7F);
|
||||
bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x40A, 0x7F7F);
|
||||
|
|
@ -1672,7 +1631,7 @@ static void bcm43xx_calculate_link_quality(struct bcm43xx_private *bcm)
|
|||
bcm43xx_generate_noise_sample(bcm);
|
||||
}
|
||||
|
||||
static inline void handle_irq_noise(struct bcm43xx_private *bcm)
|
||||
static void handle_irq_noise(struct bcm43xx_private *bcm)
|
||||
{
|
||||
struct bcm43xx_radioinfo *radio = bcm->current_core->radio;
|
||||
u16 tmp;
|
||||
|
|
@ -1747,8 +1706,7 @@ generate_new:
|
|||
bcm43xx_generate_noise_sample(bcm);
|
||||
}
|
||||
|
||||
static inline
|
||||
void handle_irq_ps(struct bcm43xx_private *bcm)
|
||||
static void handle_irq_ps(struct bcm43xx_private *bcm)
|
||||
{
|
||||
if (bcm->ieee->iw_mode == IW_MODE_MASTER) {
|
||||
///TODO: PS TBTT
|
||||
|
|
@ -1761,8 +1719,7 @@ void handle_irq_ps(struct bcm43xx_private *bcm)
|
|||
//FIXME else set to false?
|
||||
}
|
||||
|
||||
static inline
|
||||
void handle_irq_reg124(struct bcm43xx_private *bcm)
|
||||
static void handle_irq_reg124(struct bcm43xx_private *bcm)
|
||||
{
|
||||
if (!bcm->reg124_set_0x4)
|
||||
return;
|
||||
|
|
@ -1772,8 +1729,7 @@ void handle_irq_reg124(struct bcm43xx_private *bcm)
|
|||
//FIXME: reset reg124_set_0x4 to false?
|
||||
}
|
||||
|
||||
static inline
|
||||
void handle_irq_pmq(struct bcm43xx_private *bcm)
|
||||
static void handle_irq_pmq(struct bcm43xx_private *bcm)
|
||||
{
|
||||
u32 tmp;
|
||||
|
||||
|
|
@ -1829,8 +1785,7 @@ static void bcm43xx_generate_beacon_template(struct bcm43xx_private *bcm,
|
|||
bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, shm_size_offset, size);
|
||||
}
|
||||
|
||||
static inline
|
||||
void handle_irq_beacon(struct bcm43xx_private *bcm)
|
||||
static void handle_irq_beacon(struct bcm43xx_private *bcm)
|
||||
{
|
||||
u32 status;
|
||||
|
||||
|
|
@ -1992,9 +1947,8 @@ static void bcm43xx_interrupt_tasklet(struct bcm43xx_private *bcm)
|
|||
|
||||
#undef bcmirq_print_reasons
|
||||
|
||||
static inline
|
||||
void bcm43xx_interrupt_ack(struct bcm43xx_private *bcm,
|
||||
u32 reason, u32 mask)
|
||||
static void bcm43xx_interrupt_ack(struct bcm43xx_private *bcm,
|
||||
u32 reason, u32 mask)
|
||||
{
|
||||
bcm->dma_reason[0] = bcm43xx_read32(bcm, BCM43xx_MMIO_DMA1_REASON)
|
||||
& 0x0001dc00;
|
||||
|
|
@ -2340,7 +2294,7 @@ static int bcm43xx_initialize_irq(struct bcm43xx_private *bcm)
|
|||
SA_SHIRQ, KBUILD_MODNAME, bcm);
|
||||
if (res) {
|
||||
printk(KERN_ERR PFX "Cannot register IRQ%d\n", bcm->irq);
|
||||
return -EFAULT;
|
||||
return -ENODEV;
|
||||
}
|
||||
bcm43xx_write32(bcm, BCM43xx_MMIO_GEN_IRQ_REASON, 0xffffffff);
|
||||
bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD, 0x00020402);
|
||||
|
|
@ -2367,7 +2321,7 @@ static int bcm43xx_initialize_irq(struct bcm43xx_private *bcm)
|
|||
/* Switch to the core used to write the GPIO register.
|
||||
* This is either the ChipCommon, or the PCI core.
|
||||
*/
|
||||
static inline int switch_to_gpio_core(struct bcm43xx_private *bcm)
|
||||
static int switch_to_gpio_core(struct bcm43xx_private *bcm)
|
||||
{
|
||||
int err;
|
||||
|
||||
|
|
@ -2379,13 +2333,13 @@ static inline int switch_to_gpio_core(struct bcm43xx_private *bcm)
|
|||
err = bcm43xx_switch_core(bcm, &bcm->core_chipcommon);
|
||||
if (err == -ENODEV) {
|
||||
err = bcm43xx_switch_core(bcm, &bcm->core_pci);
|
||||
if (err == -ENODEV) {
|
||||
if (unlikely(err == -ENODEV)) {
|
||||
printk(KERN_ERR PFX "gpio error: "
|
||||
"Neither ChipCommon nor PCI core available!\n");
|
||||
return -ENODEV;
|
||||
} else if (err != 0)
|
||||
} else if (unlikely(err != 0))
|
||||
return -ENODEV;
|
||||
} else if (err != 0)
|
||||
} else if (unlikely(err != 0))
|
||||
return -ENODEV;
|
||||
|
||||
return 0;
|
||||
|
|
@ -2691,40 +2645,30 @@ err_release_fw:
|
|||
* http://bcm-specs.sipsolutions.net/ValidateChipAccess */
|
||||
static int bcm43xx_validate_chip(struct bcm43xx_private *bcm)
|
||||
{
|
||||
int err = -ENODEV;
|
||||
u32 value;
|
||||
u32 shm_backup;
|
||||
|
||||
shm_backup = bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED, 0x0000);
|
||||
bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED, 0x0000, 0xAA5555AA);
|
||||
if (bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED, 0x0000) != 0xAA5555AA) {
|
||||
printk(KERN_ERR PFX "Error: SHM mismatch (1) validating chip\n");
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED, 0x0000) != 0xAA5555AA)
|
||||
goto error;
|
||||
bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED, 0x0000, 0x55AAAA55);
|
||||
if (bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED, 0x0000) != 0x55AAAA55) {
|
||||
printk(KERN_ERR PFX "Error: SHM mismatch (2) validating chip\n");
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED, 0x0000) != 0x55AAAA55)
|
||||
goto error;
|
||||
bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED, 0x0000, shm_backup);
|
||||
|
||||
value = bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD);
|
||||
if ((value | 0x80000000) != 0x80000400) {
|
||||
printk(KERN_ERR PFX "Error: Bad Status Bitfield while validating chip\n");
|
||||
goto out;
|
||||
}
|
||||
if ((value | 0x80000000) != 0x80000400)
|
||||
goto error;
|
||||
|
||||
value = bcm43xx_read32(bcm, BCM43xx_MMIO_GEN_IRQ_REASON);
|
||||
if (value != 0x00000000) {
|
||||
printk(KERN_ERR PFX "Error: Bad interrupt reason code while validating chip\n");
|
||||
goto out;
|
||||
}
|
||||
if (value != 0x00000000)
|
||||
goto error;
|
||||
|
||||
err = 0;
|
||||
out:
|
||||
return err;
|
||||
return 0;
|
||||
error:
|
||||
printk(KERN_ERR PFX "Failed to validate the chipaccess\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
static int bcm43xx_probe_cores(struct bcm43xx_private *bcm)
|
||||
|
|
@ -3172,9 +3116,9 @@ static void bcm43xx_chipset_detach(struct bcm43xx_private *bcm)
|
|||
bcm43xx_pctl_set_crystal(bcm, 0);
|
||||
}
|
||||
|
||||
static inline void bcm43xx_pcicore_broadcast_value(struct bcm43xx_private *bcm,
|
||||
u32 address,
|
||||
u32 data)
|
||||
static void bcm43xx_pcicore_broadcast_value(struct bcm43xx_private *bcm,
|
||||
u32 address,
|
||||
u32 data)
|
||||
{
|
||||
bcm43xx_write32(bcm, BCM43xx_PCICORE_BCAST_ADDR, address);
|
||||
bcm43xx_write32(bcm, BCM43xx_PCICORE_BCAST_DATA, data);
|
||||
|
|
@ -3523,6 +3467,7 @@ static void bcm43xx_detach_board(struct bcm43xx_private *bcm)
|
|||
|
||||
static int bcm43xx_read_phyinfo(struct bcm43xx_private *bcm)
|
||||
{
|
||||
struct bcm43xx_phyinfo *phy = bcm->current_core->phy;
|
||||
u16 value;
|
||||
u8 phy_version;
|
||||
u8 phy_type;
|
||||
|
|
@ -3578,15 +3523,15 @@ static int bcm43xx_read_phyinfo(struct bcm43xx_private *bcm)
|
|||
phy_rev);
|
||||
}
|
||||
|
||||
bcm->current_core->phy->version = phy_version;
|
||||
bcm->current_core->phy->type = phy_type;
|
||||
bcm->current_core->phy->rev = phy_rev;
|
||||
phy->version = phy_version;
|
||||
phy->type = phy_type;
|
||||
phy->rev = phy_rev;
|
||||
if ((phy_type == BCM43xx_PHYTYPE_B) || (phy_type == BCM43xx_PHYTYPE_G)) {
|
||||
p = kzalloc(sizeof(struct bcm43xx_lopair) * BCM43xx_LO_COUNT,
|
||||
GFP_KERNEL);
|
||||
if (!p)
|
||||
return -ENOMEM;
|
||||
bcm->current_core->phy->_lo_pairs = p;
|
||||
phy->_lo_pairs = p;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
@ -3757,9 +3702,9 @@ err_pci_disable:
|
|||
goto out;
|
||||
}
|
||||
|
||||
static inline
|
||||
s8 bcm43xx_rssi_postprocess(struct bcm43xx_private *bcm, u8 in_rssi,
|
||||
int ofdm, int adjust_2053, int adjust_2050)
|
||||
static s8 bcm43xx_rssi_postprocess(struct bcm43xx_private *bcm,
|
||||
u8 in_rssi, int ofdm,
|
||||
int adjust_2053, int adjust_2050)
|
||||
{
|
||||
s32 tmp;
|
||||
|
||||
|
|
@ -3816,8 +3761,8 @@ s8 bcm43xx_rssi_postprocess(struct bcm43xx_private *bcm, u8 in_rssi,
|
|||
return (s8)tmp;
|
||||
}
|
||||
|
||||
static inline
|
||||
s8 bcm43xx_rssinoise_postprocess(struct bcm43xx_private *bcm, u8 in_rssi)
|
||||
static s8 bcm43xx_rssinoise_postprocess(struct bcm43xx_private *bcm,
|
||||
u8 in_rssi)
|
||||
{
|
||||
s8 ret;
|
||||
|
||||
|
|
@ -3843,9 +3788,9 @@ int bcm43xx_rx_packet(struct bcm43xx_private *bcm,
|
|||
return 0;
|
||||
}
|
||||
|
||||
int fastcall bcm43xx_rx(struct bcm43xx_private *bcm,
|
||||
struct sk_buff *skb,
|
||||
struct bcm43xx_rxhdr *rxhdr)
|
||||
int bcm43xx_rx(struct bcm43xx_private *bcm,
|
||||
struct sk_buff *skb,
|
||||
struct bcm43xx_rxhdr *rxhdr)
|
||||
{
|
||||
struct bcm43xx_plcp_hdr4 *plcp;
|
||||
struct ieee80211_rx_stats stats;
|
||||
|
|
|
|||
|
|
@ -111,12 +111,12 @@ struct bcm43xx_txhdr {
|
|||
|
||||
struct sk_buff;
|
||||
|
||||
void FASTCALL(bcm43xx_generate_txhdr(struct bcm43xx_private *bcm,
|
||||
struct bcm43xx_txhdr *txhdr,
|
||||
const unsigned char *fragment_data,
|
||||
const unsigned int fragment_len,
|
||||
const int is_first_fragment,
|
||||
const u16 cookie));
|
||||
void bcm43xx_generate_txhdr(struct bcm43xx_private *bcm,
|
||||
struct bcm43xx_txhdr *txhdr,
|
||||
const unsigned char *fragment_data,
|
||||
const unsigned int fragment_len,
|
||||
const int is_first_fragment,
|
||||
const u16 cookie);
|
||||
|
||||
/* RX header as received from the hardware. */
|
||||
struct bcm43xx_rxhdr {
|
||||
|
|
@ -244,9 +244,9 @@ int bcm43xx_is_valid_channel(struct bcm43xx_private *bcm,
|
|||
void bcm43xx_tsf_read(struct bcm43xx_private *bcm, u64 *tsf);
|
||||
void bcm43xx_tsf_write(struct bcm43xx_private *bcm, u64 tsf);
|
||||
|
||||
int FASTCALL(bcm43xx_rx(struct bcm43xx_private *bcm,
|
||||
struct sk_buff *skb,
|
||||
struct bcm43xx_rxhdr *rxhdr));
|
||||
int bcm43xx_rx(struct bcm43xx_private *bcm,
|
||||
struct sk_buff *skb,
|
||||
struct bcm43xx_rxhdr *rxhdr);
|
||||
|
||||
void bcm43xx_set_iwmode(struct bcm43xx_private *bcm,
|
||||
int iw_mode);
|
||||
|
|
|
|||
Loading…
Reference in a new issue