xen64: define asm/xen/interface for 64-bit
Copy 64-bit definitions of various interface structures into place. Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Cc: Stephen Tweedie <sct@redhat.com> Cc: Eduardo Habkost <ehabkost@redhat.com> Cc: Mark McLoughlin <markmc@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Jeremy Fitzhardinge
Ingo Molnar
parent
851fa3c4e7
commit
48b5db2062
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@ -10,18 +10,6 @@ enum pt_level {
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PT_PTE
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};
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/*
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* Page-directory addresses above 4GB do not fit into architectural %cr3.
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* When accessing %cr3, or equivalent field in vcpu_guest_context, guests
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* must use the following accessor macros to pack/unpack valid MFNs.
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*
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* Note that Xen is using the fact that the pagetable base is always
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* page-aligned, and putting the 12 MSB of the address into the 12 LSB
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* of cr3.
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*/
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#define xen_pfn_to_cr3(pfn) (((unsigned)(pfn) << 12) | ((unsigned)(pfn) >> 20))
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#define xen_cr3_to_pfn(cr3) (((unsigned)(cr3) >> 12) | ((unsigned)(cr3) << 20))
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void set_pte_mfn(unsigned long vaddr, unsigned long pfn, pgprot_t flags);
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@ -1,13 +1,13 @@
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/******************************************************************************
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* arch-x86_32.h
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*
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* Guest OS interface to x86 32-bit Xen.
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* Guest OS interface to x86 Xen.
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*
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* Copyright (c) 2004, K A Fraser
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*/
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#ifndef __XEN_PUBLIC_ARCH_X86_32_H__
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#define __XEN_PUBLIC_ARCH_X86_32_H__
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#ifndef __ASM_X86_XEN_INTERFACE_H
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#define __ASM_X86_XEN_INTERFACE_H
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#ifdef __XEN__
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#define __DEFINE_GUEST_HANDLE(name, type) \
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@ -57,6 +57,17 @@ DEFINE_GUEST_HANDLE(long);
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DEFINE_GUEST_HANDLE(void);
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#endif
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#ifndef HYPERVISOR_VIRT_START
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#define HYPERVISOR_VIRT_START mk_unsigned_long(__HYPERVISOR_VIRT_START)
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#endif
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#ifndef machine_to_phys_mapping
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#define machine_to_phys_mapping ((unsigned long *)HYPERVISOR_VIRT_START)
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#endif
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/* Maximum number of virtual CPUs in multi-processor guests. */
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#define MAX_VIRT_CPUS 32
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/*
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* SEGMENT DESCRIPTOR TABLES
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*/
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@ -70,59 +81,22 @@ DEFINE_GUEST_HANDLE(void);
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#define FIRST_RESERVED_GDT_BYTE (FIRST_RESERVED_GDT_PAGE * 4096)
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#define FIRST_RESERVED_GDT_ENTRY (FIRST_RESERVED_GDT_BYTE / 8)
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/*
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* These flat segments are in the Xen-private section of every GDT. Since these
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* are also present in the initial GDT, many OSes will be able to avoid
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* installing their own GDT.
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*/
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#define FLAT_RING1_CS 0xe019 /* GDT index 259 */
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#define FLAT_RING1_DS 0xe021 /* GDT index 260 */
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#define FLAT_RING1_SS 0xe021 /* GDT index 260 */
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#define FLAT_RING3_CS 0xe02b /* GDT index 261 */
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#define FLAT_RING3_DS 0xe033 /* GDT index 262 */
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#define FLAT_RING3_SS 0xe033 /* GDT index 262 */
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#define FLAT_KERNEL_CS FLAT_RING1_CS
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#define FLAT_KERNEL_DS FLAT_RING1_DS
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#define FLAT_KERNEL_SS FLAT_RING1_SS
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#define FLAT_USER_CS FLAT_RING3_CS
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#define FLAT_USER_DS FLAT_RING3_DS
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#define FLAT_USER_SS FLAT_RING3_SS
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/* And the trap vector is... */
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#define TRAP_INSTR "int $0x82"
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/*
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* Virtual addresses beyond this are not modifiable by guest OSes. The
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* machine->physical mapping table starts at this address, read-only.
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*/
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#ifdef CONFIG_X86_PAE
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#define __HYPERVISOR_VIRT_START 0xF5800000
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#else
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#define __HYPERVISOR_VIRT_START 0xFC000000
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#endif
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#ifndef HYPERVISOR_VIRT_START
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#define HYPERVISOR_VIRT_START mk_unsigned_long(__HYPERVISOR_VIRT_START)
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#endif
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#ifndef machine_to_phys_mapping
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#define machine_to_phys_mapping ((unsigned long *)HYPERVISOR_VIRT_START)
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#endif
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/* Maximum number of virtual CPUs in multi-processor guests. */
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#define MAX_VIRT_CPUS 32
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#ifndef __ASSEMBLY__
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/*
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* Send an array of these to HYPERVISOR_set_trap_table()
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* The privilege level specifies which modes may enter a trap via a software
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* interrupt. On x86/64, since rings 1 and 2 are unavailable, we allocate
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* privilege levels as follows:
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* Level == 0: Noone may enter
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* Level == 1: Kernel may enter
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* Level == 2: Kernel may enter
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* Level == 3: Everyone may enter
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*/
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#define TI_GET_DPL(_ti) ((_ti)->flags & 3)
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#define TI_GET_IF(_ti) ((_ti)->flags & 4)
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#define TI_SET_DPL(_ti, _dpl) ((_ti)->flags |= (_dpl))
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#define TI_SET_IF(_ti, _if) ((_ti)->flags |= ((!!(_if))<<2))
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#ifndef __ASSEMBLY__
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struct trap_info {
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uint8_t vector; /* exception vector */
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uint8_t flags; /* 0-3: privilege level; 4: clear event enable? */
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@ -131,32 +105,21 @@ struct trap_info {
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};
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DEFINE_GUEST_HANDLE_STRUCT(trap_info);
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struct cpu_user_regs {
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uint32_t ebx;
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uint32_t ecx;
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uint32_t edx;
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uint32_t esi;
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uint32_t edi;
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uint32_t ebp;
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uint32_t eax;
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uint16_t error_code; /* private */
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uint16_t entry_vector; /* private */
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uint32_t eip;
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uint16_t cs;
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uint8_t saved_upcall_mask;
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uint8_t _pad0;
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uint32_t eflags; /* eflags.IF == !saved_upcall_mask */
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uint32_t esp;
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uint16_t ss, _pad1;
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uint16_t es, _pad2;
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uint16_t ds, _pad3;
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uint16_t fs, _pad4;
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uint16_t gs, _pad5;
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struct arch_shared_info {
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unsigned long max_pfn; /* max pfn that appears in table */
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/* Frame containing list of mfns containing list of mfns containing p2m. */
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unsigned long pfn_to_mfn_frame_list_list;
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unsigned long nmi_reason;
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};
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DEFINE_GUEST_HANDLE_STRUCT(cpu_user_regs);
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#endif /* !__ASSEMBLY__ */
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typedef uint64_t tsc_timestamp_t; /* RDTSC timestamp */
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#ifdef CONFIG_X86_32
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#include "interface_32.h"
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#else
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#include "interface_64.h"
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#endif
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#ifndef __ASSEMBLY__
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/*
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* The following is all CPU context. Note that the fpu_ctxt block is filled
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* in by FXSAVE if the CPU has feature FXSR; otherwise FSAVE is used.
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@ -173,33 +136,29 @@ struct vcpu_guest_context {
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unsigned long ldt_base, ldt_ents; /* LDT (linear address, # ents) */
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unsigned long gdt_frames[16], gdt_ents; /* GDT (machine frames, # ents) */
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unsigned long kernel_ss, kernel_sp; /* Virtual TSS (only SS1/SP1) */
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/* NB. User pagetable on x86/64 is placed in ctrlreg[1]. */
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unsigned long ctrlreg[8]; /* CR0-CR7 (control registers) */
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unsigned long debugreg[8]; /* DB0-DB7 (debug registers) */
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#ifdef __i386__
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unsigned long event_callback_cs; /* CS:EIP of event callback */
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unsigned long event_callback_eip;
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unsigned long failsafe_callback_cs; /* CS:EIP of failsafe callback */
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unsigned long failsafe_callback_eip;
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#else
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unsigned long event_callback_eip;
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unsigned long failsafe_callback_eip;
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unsigned long syscall_callback_eip;
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#endif
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unsigned long vm_assist; /* VMASST_TYPE_* bitmap */
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#ifdef __x86_64__
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/* Segment base addresses. */
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uint64_t fs_base;
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uint64_t gs_base_kernel;
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uint64_t gs_base_user;
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#endif
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};
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DEFINE_GUEST_HANDLE_STRUCT(vcpu_guest_context);
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struct arch_shared_info {
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unsigned long max_pfn; /* max pfn that appears in table */
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/* Frame containing list of mfns containing list of mfns containing p2m. */
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unsigned long pfn_to_mfn_frame_list_list;
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unsigned long nmi_reason;
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};
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struct arch_vcpu_info {
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unsigned long cr2;
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unsigned long pad[5]; /* sizeof(struct vcpu_info) == 64 */
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};
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struct xen_callback {
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unsigned long cs;
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unsigned long eip;
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};
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#endif /* !__ASSEMBLY__ */
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#endif /* !__ASSEMBLY__ */
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/*
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* Prefix forces emulation of some non-trapping instructions.
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@ -213,4 +172,4 @@ struct xen_callback {
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#define XEN_CPUID XEN_EMULATE_PREFIX "cpuid"
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#endif
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#endif
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#endif /* __ASM_X86_XEN_INTERFACE_H */
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97
include/asm-x86/xen/interface_32.h
Normal file
97
include/asm-x86/xen/interface_32.h
Normal file
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@ -0,0 +1,97 @@
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/******************************************************************************
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* arch-x86_32.h
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*
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* Guest OS interface to x86 32-bit Xen.
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*
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* Copyright (c) 2004, K A Fraser
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*/
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#ifndef __ASM_X86_XEN_INTERFACE_32_H
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#define __ASM_X86_XEN_INTERFACE_32_H
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/*
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* These flat segments are in the Xen-private section of every GDT. Since these
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* are also present in the initial GDT, many OSes will be able to avoid
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* installing their own GDT.
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*/
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#define FLAT_RING1_CS 0xe019 /* GDT index 259 */
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#define FLAT_RING1_DS 0xe021 /* GDT index 260 */
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#define FLAT_RING1_SS 0xe021 /* GDT index 260 */
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#define FLAT_RING3_CS 0xe02b /* GDT index 261 */
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#define FLAT_RING3_DS 0xe033 /* GDT index 262 */
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#define FLAT_RING3_SS 0xe033 /* GDT index 262 */
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#define FLAT_KERNEL_CS FLAT_RING1_CS
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#define FLAT_KERNEL_DS FLAT_RING1_DS
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#define FLAT_KERNEL_SS FLAT_RING1_SS
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#define FLAT_USER_CS FLAT_RING3_CS
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#define FLAT_USER_DS FLAT_RING3_DS
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#define FLAT_USER_SS FLAT_RING3_SS
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/* And the trap vector is... */
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#define TRAP_INSTR "int $0x82"
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/*
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* Virtual addresses beyond this are not modifiable by guest OSes. The
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* machine->physical mapping table starts at this address, read-only.
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*/
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#define __HYPERVISOR_VIRT_START 0xF5800000
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#ifndef __ASSEMBLY__
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struct cpu_user_regs {
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uint32_t ebx;
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uint32_t ecx;
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uint32_t edx;
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uint32_t esi;
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uint32_t edi;
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uint32_t ebp;
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uint32_t eax;
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uint16_t error_code; /* private */
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uint16_t entry_vector; /* private */
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uint32_t eip;
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uint16_t cs;
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uint8_t saved_upcall_mask;
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uint8_t _pad0;
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uint32_t eflags; /* eflags.IF == !saved_upcall_mask */
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uint32_t esp;
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uint16_t ss, _pad1;
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uint16_t es, _pad2;
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uint16_t ds, _pad3;
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uint16_t fs, _pad4;
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uint16_t gs, _pad5;
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};
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DEFINE_GUEST_HANDLE_STRUCT(cpu_user_regs);
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typedef uint64_t tsc_timestamp_t; /* RDTSC timestamp */
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struct arch_vcpu_info {
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unsigned long cr2;
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unsigned long pad[5]; /* sizeof(struct vcpu_info) == 64 */
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};
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struct xen_callback {
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unsigned long cs;
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unsigned long eip;
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};
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typedef struct xen_callback xen_callback_t;
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#define XEN_CALLBACK(__cs, __eip) \
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((struct xen_callback){ .cs = (__cs), .eip = (unsigned long)(__eip) })
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#endif /* !__ASSEMBLY__ */
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/*
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* Page-directory addresses above 4GB do not fit into architectural %cr3.
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* When accessing %cr3, or equivalent field in vcpu_guest_context, guests
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* must use the following accessor macros to pack/unpack valid MFNs.
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*
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* Note that Xen is using the fact that the pagetable base is always
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* page-aligned, and putting the 12 MSB of the address into the 12 LSB
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* of cr3.
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*/
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#define xen_pfn_to_cr3(pfn) (((unsigned)(pfn) << 12) | ((unsigned)(pfn) >> 20))
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#define xen_cr3_to_pfn(cr3) (((unsigned)(cr3) >> 12) | ((unsigned)(cr3) << 20))
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#endif /* __ASM_X86_XEN_INTERFACE_32_H */
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159
include/asm-x86/xen/interface_64.h
Normal file
159
include/asm-x86/xen/interface_64.h
Normal file
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@ -0,0 +1,159 @@
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#ifndef __ASM_X86_XEN_INTERFACE_64_H
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#define __ASM_X86_XEN_INTERFACE_64_H
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/*
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* 64-bit segment selectors
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* These flat segments are in the Xen-private section of every GDT. Since these
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* are also present in the initial GDT, many OSes will be able to avoid
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* installing their own GDT.
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*/
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#define FLAT_RING3_CS32 0xe023 /* GDT index 260 */
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#define FLAT_RING3_CS64 0xe033 /* GDT index 261 */
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#define FLAT_RING3_DS32 0xe02b /* GDT index 262 */
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#define FLAT_RING3_DS64 0x0000 /* NULL selector */
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#define FLAT_RING3_SS32 0xe02b /* GDT index 262 */
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#define FLAT_RING3_SS64 0xe02b /* GDT index 262 */
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#define FLAT_KERNEL_DS64 FLAT_RING3_DS64
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#define FLAT_KERNEL_DS32 FLAT_RING3_DS32
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#define FLAT_KERNEL_DS FLAT_KERNEL_DS64
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#define FLAT_KERNEL_CS64 FLAT_RING3_CS64
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#define FLAT_KERNEL_CS32 FLAT_RING3_CS32
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#define FLAT_KERNEL_CS FLAT_KERNEL_CS64
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#define FLAT_KERNEL_SS64 FLAT_RING3_SS64
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#define FLAT_KERNEL_SS32 FLAT_RING3_SS32
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#define FLAT_KERNEL_SS FLAT_KERNEL_SS64
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#define FLAT_USER_DS64 FLAT_RING3_DS64
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#define FLAT_USER_DS32 FLAT_RING3_DS32
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#define FLAT_USER_DS FLAT_USER_DS64
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#define FLAT_USER_CS64 FLAT_RING3_CS64
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#define FLAT_USER_CS32 FLAT_RING3_CS32
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#define FLAT_USER_CS FLAT_USER_CS64
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#define FLAT_USER_SS64 FLAT_RING3_SS64
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#define FLAT_USER_SS32 FLAT_RING3_SS32
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#define FLAT_USER_SS FLAT_USER_SS64
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#define __HYPERVISOR_VIRT_START 0xFFFF800000000000
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#define __HYPERVISOR_VIRT_END 0xFFFF880000000000
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#define __MACH2PHYS_VIRT_START 0xFFFF800000000000
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#define __MACH2PHYS_VIRT_END 0xFFFF804000000000
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#ifndef HYPERVISOR_VIRT_START
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#define HYPERVISOR_VIRT_START mk_unsigned_long(__HYPERVISOR_VIRT_START)
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#define HYPERVISOR_VIRT_END mk_unsigned_long(__HYPERVISOR_VIRT_END)
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#endif
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#define MACH2PHYS_VIRT_START mk_unsigned_long(__MACH2PHYS_VIRT_START)
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#define MACH2PHYS_VIRT_END mk_unsigned_long(__MACH2PHYS_VIRT_END)
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#define MACH2PHYS_NR_ENTRIES ((MACH2PHYS_VIRT_END-MACH2PHYS_VIRT_START)>>3)
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#ifndef machine_to_phys_mapping
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#define machine_to_phys_mapping ((unsigned long *)HYPERVISOR_VIRT_START)
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#endif
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/*
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* int HYPERVISOR_set_segment_base(unsigned int which, unsigned long base)
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* @which == SEGBASE_* ; @base == 64-bit base address
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* Returns 0 on success.
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*/
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#define SEGBASE_FS 0
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#define SEGBASE_GS_USER 1
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#define SEGBASE_GS_KERNEL 2
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#define SEGBASE_GS_USER_SEL 3 /* Set user %gs specified in base[15:0] */
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/*
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* int HYPERVISOR_iret(void)
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* All arguments are on the kernel stack, in the following format.
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* Never returns if successful. Current kernel context is lost.
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* The saved CS is mapped as follows:
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* RING0 -> RING3 kernel mode.
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* RING1 -> RING3 kernel mode.
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* RING2 -> RING3 kernel mode.
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* RING3 -> RING3 user mode.
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* However RING0 indicates that the guest kernel should return to iteself
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* directly with
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* orb $3,1*8(%rsp)
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* iretq
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* If flags contains VGCF_in_syscall:
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* Restore RAX, RIP, RFLAGS, RSP.
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* Discard R11, RCX, CS, SS.
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* Otherwise:
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* Restore RAX, R11, RCX, CS:RIP, RFLAGS, SS:RSP.
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* All other registers are saved on hypercall entry and restored to user.
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*/
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/* Guest exited in SYSCALL context? Return to guest with SYSRET? */
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#define _VGCF_in_syscall 8
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#define VGCF_in_syscall (1<<_VGCF_in_syscall)
|
||||
#define VGCF_IN_SYSCALL VGCF_in_syscall
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
struct iret_context {
|
||||
/* Top of stack (%rsp at point of hypercall). */
|
||||
uint64_t rax, r11, rcx, flags, rip, cs, rflags, rsp, ss;
|
||||
/* Bottom of iret stack frame. */
|
||||
};
|
||||
|
||||
#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
|
||||
/* Anonymous union includes both 32- and 64-bit names (e.g., eax/rax). */
|
||||
#define __DECL_REG(name) union { \
|
||||
uint64_t r ## name, e ## name; \
|
||||
uint32_t _e ## name; \
|
||||
}
|
||||
#else
|
||||
/* Non-gcc sources must always use the proper 64-bit name (e.g., rax). */
|
||||
#define __DECL_REG(name) uint64_t r ## name
|
||||
#endif
|
||||
|
||||
struct cpu_user_regs {
|
||||
uint64_t r15;
|
||||
uint64_t r14;
|
||||
uint64_t r13;
|
||||
uint64_t r12;
|
||||
__DECL_REG(bp);
|
||||
__DECL_REG(bx);
|
||||
uint64_t r11;
|
||||
uint64_t r10;
|
||||
uint64_t r9;
|
||||
uint64_t r8;
|
||||
__DECL_REG(ax);
|
||||
__DECL_REG(cx);
|
||||
__DECL_REG(dx);
|
||||
__DECL_REG(si);
|
||||
__DECL_REG(di);
|
||||
uint32_t error_code; /* private */
|
||||
uint32_t entry_vector; /* private */
|
||||
__DECL_REG(ip);
|
||||
uint16_t cs, _pad0[1];
|
||||
uint8_t saved_upcall_mask;
|
||||
uint8_t _pad1[3];
|
||||
__DECL_REG(flags); /* rflags.IF == !saved_upcall_mask */
|
||||
__DECL_REG(sp);
|
||||
uint16_t ss, _pad2[3];
|
||||
uint16_t es, _pad3[3];
|
||||
uint16_t ds, _pad4[3];
|
||||
uint16_t fs, _pad5[3]; /* Non-zero => takes precedence over fs_base. */
|
||||
uint16_t gs, _pad6[3]; /* Non-zero => takes precedence over gs_base_usr. */
|
||||
};
|
||||
DEFINE_GUEST_HANDLE_STRUCT(cpu_user_regs);
|
||||
|
||||
#undef __DECL_REG
|
||||
|
||||
#define xen_pfn_to_cr3(pfn) ((unsigned long)(pfn) << 12)
|
||||
#define xen_cr3_to_pfn(cr3) ((unsigned long)(cr3) >> 12)
|
||||
|
||||
struct arch_vcpu_info {
|
||||
unsigned long cr2;
|
||||
unsigned long pad; /* sizeof(vcpu_info_t) == 64 */
|
||||
};
|
||||
|
||||
typedef unsigned long xen_callback_t;
|
||||
|
||||
#define XEN_CALLBACK(__cs, __rip) \
|
||||
((unsigned long)(__rip))
|
||||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
|
||||
#endif /* __ASM_X86_XEN_INTERFACE_64_H */
|
||||
|
|
@ -82,9 +82,9 @@
|
|||
*/
|
||||
#define CALLBACKOP_register 0
|
||||
struct callback_register {
|
||||
uint16_t type;
|
||||
uint16_t flags;
|
||||
struct xen_callback address;
|
||||
uint16_t type;
|
||||
uint16_t flags;
|
||||
xen_callback_t address;
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
|
|||
Loading…
Reference in a new issue