V4L/DVB (7046): Finalise support for the Pinnacle HD 8000i
Correctly set the atatch structures, enable IR, configure the xc5000 tuner includes. Signed-off-by: Steven Toth <stoth@hauppauge.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
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@ -22,7 +22,7 @@
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/videodev.h>
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#include <linux/videodev2.h>
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#include <linux/delay.h>
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#include <linux/dvb/frontend.h>
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#include <linux/i2c.h>
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@ -380,6 +380,7 @@ static struct s5h1409_config pinnacle_pctv_hd_800i_config = {
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.qam_if = 44000,
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.inversion = S5H1409_INVERSION_OFF,
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.status_mode = S5H1409_DEMODLOCKING,
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.mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
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};
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static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
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@ -643,9 +644,6 @@ static int dvb_register(struct cx8802_dev *dev)
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}
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break;
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case CX88_BOARD_PINNACLE_PCTV_HD_800i:
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/* Parallel mpeg data port and punctured clock mode */
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dev->ts_gen_cntrl = 0x04;
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dev->dvb.frontend = dvb_attach(s5h1409_attach,
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&pinnacle_pctv_hd_800i_config,
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&dev->core->i2c_adap);
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@ -224,6 +224,7 @@ int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci)
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case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
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case CX88_BOARD_HAUPPAUGE_HVR1100:
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case CX88_BOARD_HAUPPAUGE_HVR3000:
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case CX88_BOARD_PINNACLE_PCTV_HD_800i:
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ir_codes = ir_codes_hauppauge_new;
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ir_type = IR_TYPE_RC5;
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ir->sampling = 1;
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@ -443,6 +444,7 @@ void cx88_ir_irq(struct cx88_core *core)
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case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
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case CX88_BOARD_HAUPPAUGE_HVR1100:
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case CX88_BOARD_HAUPPAUGE_HVR3000:
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case CX88_BOARD_PINNACLE_PCTV_HD_800i:
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ircode = ir_decode_biphase(ir->samples, ir->scount, 5, 7);
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ir_dprintk("biphase decoded: %x\n", ircode);
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if ((ircode & 0xfffff000) != 0x3000)
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@ -118,8 +118,12 @@ static int cx8802_start_dma(struct cx8802_dev *dev,
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case CX88_BOARD_HAUPPAUGE_HVR1300:
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break;
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case CX88_BOARD_PINNACLE_PCTV_HD_800i:
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/* Enable MPEG parallel port */
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cx_write(MO_PINMUX_IO, 0x80);
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/* Enable MPEG parallel IO and video signal pins */
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cx_write(MO_PINMUX_IO, 0x88);
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cx_write(TS_HW_SOP_CNTRL, (0x47 << 16) | (188 << 4));
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dev->ts_gen_cntrl = 5;
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cx_write(TS_SOP_STAT, 0);
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cx_write(TS_VALERR_CNTRL, 0);
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udelay(100);
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break;
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default:
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