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pinctrl/amd: Configure GPIO register using BIOS settings

In the function amd_gpio_irq_set_type, use the settings provided by
the BIOS,when the LevelTrig is Edge and activeLevel is HIGH, to configure
the GPIO registers. Ignore the settings from client.

Reviewed-by: Pankaj Sen <Pankaj.Sen@amd.com>
Signed-off-by:Nitesh Kumar Agrawal <Nitesh-kumar.Agrawal@amd.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
steinar/wifi_calib_4_9_kernel
Agrawal, Nitesh-kumar 2016-08-31 08:50:49 +00:00 committed by Linus Walleij
parent ac91ab51e4
commit 499c7196dd
1 changed files with 15 additions and 0 deletions

View File

@ -403,12 +403,27 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
int ret = 0;
u32 pin_reg;
unsigned long flags;
u32 level_trig;
u32 active_level;
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
struct amd_gpio *gpio_dev = gpiochip_get_data(gc);
spin_lock_irqsave(&gpio_dev->lock, flags);
pin_reg = readl(gpio_dev->base + (d->hwirq)*4);
/*
* When level_trig is set EDGE and active_level is set HIGH in BIOS
* default settings, ignore incoming settings from client and use
* BIOS settings to configure GPIO register.
*/
level_trig = pin_reg & (LEVEL_TRIGGER << LEVEL_TRIG_OFF);
active_level = pin_reg & (ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
if((!level_trig) &&
((active_level >> ACTIVE_LEVEL_OFF) == ACTIVE_HIGH)) {
type = IRQ_TYPE_EDGE_FALLING;
}
switch (type & IRQ_TYPE_SENSE_MASK) {
case IRQ_TYPE_EDGE_RISING:
pin_reg &= ~BIT(LEVEL_TRIG_OFF);