drm/i915: Make HAS_GMCH_DISPLAY only take dev_priv
More .rodata string saving by avoid __I915__ magic inside WARNs. v2: Add parantheses around dev_priv. (Ville Syrjala) Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: David Weinehall <david.weinehall@linux.intel.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Jani Nikula <jani.nikula@linux.intel.com> Acked-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
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@ -2859,7 +2859,7 @@ struct drm_i915_cmd_table {
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#define HAS_PCH_NOP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_NOP)
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#define HAS_PCH_SPLIT(dev_priv) (INTEL_PCH_TYPE(dev_priv) != PCH_NONE)
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#define HAS_GMCH_DISPLAY(dev) (INTEL_INFO(dev)->has_gmch_display)
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#define HAS_GMCH_DISPLAY(dev_priv) ((dev_priv)->info.has_gmch_display)
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/* DPF == dynamic parity feature */
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#define HAS_L3_DPF(dev) (INTEL_INFO(dev)->has_l3_dpf)
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@ -273,7 +273,7 @@ static void i9xx_load_luts_internal(struct drm_crtc *crtc,
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enum pipe pipe = intel_crtc->pipe;
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int i;
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if (HAS_GMCH_DISPLAY(dev)) {
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if (HAS_GMCH_DISPLAY(dev_priv)) {
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if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))
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assert_dsi_pll_enabled(dev_priv);
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else
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@ -288,7 +288,7 @@ static void i9xx_load_luts_internal(struct drm_crtc *crtc,
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(drm_color_lut_extract(lut[i].green, 8) << 8) |
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drm_color_lut_extract(lut[i].blue, 8);
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if (HAS_GMCH_DISPLAY(dev))
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if (HAS_GMCH_DISPLAY(dev_priv))
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I915_WRITE(PALETTE(pipe, i), word);
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else
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I915_WRITE(LGC_PALETTE(pipe, i), word);
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@ -297,7 +297,7 @@ static void i9xx_load_luts_internal(struct drm_crtc *crtc,
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for (i = 0; i < 256; i++) {
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uint32_t word = (i << 16) | (i << 8) | i;
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if (HAS_GMCH_DISPLAY(dev))
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if (HAS_GMCH_DISPLAY(dev_priv))
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I915_WRITE(PALETTE(pipe, i), word);
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else
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I915_WRITE(LGC_PALETTE(pipe, i), word);
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@ -5034,7 +5034,7 @@ intel_pre_disable_primary_noatomic(struct drm_crtc *crtc)
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* event which is after the vblank start event, so we need to have a
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* wait-for-vblank between disabling the plane and the pipe.
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*/
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if (HAS_GMCH_DISPLAY(dev)) {
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if (HAS_GMCH_DISPLAY(dev_priv)) {
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intel_set_memory_cxsr(dev_priv, false);
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dev_priv->wm.vlv.cxsr = false;
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intel_wait_for_vblank(dev, pipe);
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@ -5099,7 +5099,7 @@ static void intel_pre_plane_update(struct intel_crtc_state *old_crtc_state)
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intel_pre_disable_primary(&crtc->base);
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}
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if (pipe_config->disable_cxsr && HAS_GMCH_DISPLAY(dev)) {
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if (pipe_config->disable_cxsr && HAS_GMCH_DISPLAY(dev_priv)) {
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crtc->wm.cxsr_allowed = false;
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/*
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@ -10893,7 +10893,7 @@ static void intel_crtc_update_cursor(struct drm_crtc *crtc,
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pos |= y << CURSOR_Y_SHIFT;
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/* ILK+ do this automagically */
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if (HAS_GMCH_DISPLAY(dev) &&
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if (HAS_GMCH_DISPLAY(dev_priv) &&
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plane_state->base.rotation == DRM_ROTATE_180) {
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base += (plane_state->base.crtc_h *
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plane_state->base.crtc_w - 1) * 4;
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@ -16591,7 +16591,7 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc)
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if (crtc->active && !intel_crtc_has_encoders(crtc))
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intel_crtc_disable_noatomic(&crtc->base);
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if (crtc->active || HAS_GMCH_DISPLAY(dev)) {
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if (crtc->active || HAS_GMCH_DISPLAY(dev_priv)) {
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/*
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* We start out with underrun reporting disabled to avoid races.
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* For correct bookkeeping mark this on active crtcs.
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@ -1583,7 +1583,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
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return ret;
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}
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if (HAS_GMCH_DISPLAY(dev))
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if (HAS_GMCH_DISPLAY(dev_priv))
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intel_gmch_panel_fitting(intel_crtc, pipe_config,
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intel_connector->panel.fitting_mode);
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else
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@ -1346,7 +1346,7 @@ static int intel_dsi_set_property(struct drm_connector *connector,
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DRM_DEBUG_KMS("no scaling not supported\n");
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return -EINVAL;
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}
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if (HAS_GMCH_DISPLAY(dev) &&
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if (HAS_GMCH_DISPLAY(to_i915(dev)) &&
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val == DRM_MODE_SCALE_CENTER) {
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DRM_DEBUG_KMS("centering not supported\n");
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return -EINVAL;
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@ -254,7 +254,7 @@ static bool __intel_set_cpu_fifo_underrun_reporting(struct drm_device *dev,
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old = !intel_crtc->cpu_fifo_underrun_disabled;
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intel_crtc->cpu_fifo_underrun_disabled = !enable;
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if (HAS_GMCH_DISPLAY(dev))
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if (HAS_GMCH_DISPLAY(dev_priv))
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i9xx_set_fifo_underrun_reporting(dev, pipe, enable, old);
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else if (IS_GEN5(dev) || IS_GEN6(dev))
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ironlake_set_fifo_underrun_reporting(dev, pipe, enable);
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@ -1265,6 +1265,7 @@ intel_hdmi_mode_valid(struct drm_connector *connector,
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{
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struct intel_hdmi *hdmi = intel_attached_hdmi(connector);
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struct drm_device *dev = intel_hdmi_to_dev(hdmi);
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struct drm_i915_private *dev_priv = to_i915(dev);
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enum drm_mode_status status;
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int clock;
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int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
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@ -1287,7 +1288,7 @@ intel_hdmi_mode_valid(struct drm_connector *connector,
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status = hdmi_port_clock_valid(hdmi, clock, true);
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/* if we can't do 8bpc we may still be able to do 12bpc */
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if (!HAS_GMCH_DISPLAY(dev) && status != MODE_OK)
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if (!HAS_GMCH_DISPLAY(dev_priv) && status != MODE_OK)
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status = hdmi_port_clock_valid(hdmi, clock * 3 / 2, true);
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return status;
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@ -1297,7 +1298,7 @@ static bool hdmi_12bpc_possible(struct intel_crtc_state *crtc_state)
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{
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struct drm_device *dev = crtc_state->base.crtc->dev;
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if (HAS_GMCH_DISPLAY(dev))
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if (HAS_GMCH_DISPLAY(to_i915(dev)))
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return false;
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/*
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