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MA-12957: arm64: dts: imx8qm/qxp mek: Correct interrupts for adv7535 

This patch fixes the interrupts used by ADV7535. Initial patch
configured the GPIO0 IO00 as IO pin for the DSI_INT, used by ADV7535,
but the correct one is IO01, since IO00 is used by PWM.

Fixes: c2f1eceb5629 ("arm64: dts: imx8qm/qxp mek: Configure interrupts
for adv7535")
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
pull/10/head
Robert Chiras 2018-11-26 13:17:14 +02:00
parent 8220d7d4e8
commit 4a004884a4
2 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi
View File

@ -591,7 +591,7 @@
fsl,pins = <
SC_P_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL 0xc600004c
SC_P_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA 0xc600004c
SC_P_MIPI_DSI0_GPIO0_00_MIPI_DSI0_GPIO0_IO00 0x00000020
SC_P_MIPI_DSI0_GPIO0_01_MIPI_DSI0_GPIO0_IO01 0x00000020
>;
};
@ -599,7 +599,7 @@
fsl,pins = <
SC_P_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL 0xc600004c
SC_P_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA 0xc600004c
SC_P_MIPI_DSI1_GPIO0_00_MIPI_DSI1_GPIO0_IO00 0x00000020
SC_P_MIPI_DSI1_GPIO0_01_MIPI_DSI1_GPIO0_IO01 0x00000020
>;
};

4
arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek.dtsi
View File

@ -456,7 +456,7 @@
fsl,pins = <
SC_P_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL 0xc6000020
SC_P_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA 0xc6000020
SC_P_MIPI_DSI0_GPIO0_00_MIPI_DSI0_GPIO0_IO00 0x00000020
SC_P_MIPI_DSI0_GPIO0_01_MIPI_DSI0_GPIO0_IO01 0x00000020
>;
};
@ -470,7 +470,7 @@
fsl,pins = <
SC_P_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL 0xc6000020
SC_P_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA 0xc6000020
SC_P_MIPI_DSI1_GPIO0_00_MIPI_DSI1_GPIO0_IO00 0x00000020
SC_P_MIPI_DSI1_GPIO0_01_MIPI_DSI1_GPIO0_IO01 0x00000020
>;
};