drm/i915: s/LFP/LPF in DPIO PLL register names
LPF is short for "low pass filter". Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -1862,10 +1862,10 @@ static int i915_dpio_info(struct seq_file *m, void *data)
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seq_printf(m, "DPIO_CORE_CLK_B: 0x%08x\n",
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vlv_dpio_read(dev_priv, _DPIO_CORE_CLK_B));
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seq_printf(m, "DPIO_LFP_COEFF_A: 0x%08x\n",
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vlv_dpio_read(dev_priv, _DPIO_LFP_COEFF_A));
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seq_printf(m, "DPIO_LFP_COEFF_B: 0x%08x\n",
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vlv_dpio_read(dev_priv, _DPIO_LFP_COEFF_B));
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seq_printf(m, "DPIO_LPF_COEFF_A: 0x%08x\n",
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vlv_dpio_read(dev_priv, _DPIO_LPF_COEFF_A));
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seq_printf(m, "DPIO_LPF_COEFF_B: 0x%08x\n",
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vlv_dpio_read(dev_priv, _DPIO_LPF_COEFF_B));
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seq_printf(m, "DPIO_FASTCLK_DISABLE: 0x%08x\n",
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vlv_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE));
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@ -448,9 +448,9 @@
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#define _DPIO_PLL_CML_B 0x806c
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#define DPIO_PLL_CML(pipe) _PIPE(pipe, _DPIO_PLL_CML_A, _DPIO_PLL_CML_B)
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#define _DPIO_LFP_COEFF_A 0x8048
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#define _DPIO_LFP_COEFF_B 0x8068
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#define DPIO_LFP_COEFF(pipe) _PIPE(pipe, _DPIO_LFP_COEFF_A, _DPIO_LFP_COEFF_B)
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#define _DPIO_LPF_COEFF_A 0x8048
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#define _DPIO_LPF_COEFF_B 0x8068
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#define DPIO_LPF_COEFF(pipe) _PIPE(pipe, _DPIO_LPF_COEFF_A, _DPIO_LPF_COEFF_B)
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#define DPIO_CALIBRATION 0x80ac
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@ -4406,10 +4406,10 @@ static void vlv_update_pll(struct intel_crtc *crtc)
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if (crtc->config.port_clock == 162000 ||
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intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_ANALOG) ||
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intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_HDMI))
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vlv_dpio_write(dev_priv, DPIO_LFP_COEFF(pipe),
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vlv_dpio_write(dev_priv, DPIO_LPF_COEFF(pipe),
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0x005f0021);
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else
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vlv_dpio_write(dev_priv, DPIO_LFP_COEFF(pipe),
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vlv_dpio_write(dev_priv, DPIO_LPF_COEFF(pipe),
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0x00d0000f);
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if (intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_EDP) ||
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