[ARM] mm: allow LH7A40x to use sparsemem
Enable Sparsemem support for LH7A40x SoCs, while still allowing the existing discontig support for the time being. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -510,6 +510,8 @@ config ARCH_SHARK
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config ARCH_LH7A40X
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bool "Sharp LH7A40X"
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select ARCH_DISCONTIGMEM_ENABLE if !LH7A40X_CONTIGMEM
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select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
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help
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Say Y here for systems based on one of the Sharp LH7A40X
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System on a Chip processors. These CPUs include an ARM922T
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@ -842,12 +844,6 @@ config OABI_COMPAT
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# Discontigmem is deprecated
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config ARCH_DISCONTIGMEM_ENABLE
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bool
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default (ARCH_LH7A40X && !LH7A40X_CONTIGMEM)
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help
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Say Y to support efficient handling of discontiguous physical memory,
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for architectures which are either NUMA (Non-Uniform Memory Access)
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or have huge holes in the physical address space for other reasons.
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See <file:Documentation/vm/numa> for more.
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config ARCH_SPARSEMEM_ENABLE
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bool
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@ -40,23 +40,22 @@ config LPD7A40X_CPLD_SSP
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bool
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config LH7A40X_CONTIGMEM
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bool "Disable NUMA Support"
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depends on ARCH_LH7A40X
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bool "Disable NUMA/SparseMEM Support"
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help
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Say Y here if your bootloader sets the SROMLL bit(s) in
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the SDRAM controller, organizing memory as a contiguous
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array. This option will disable CONFIG_DISCONTIGMEM and
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force the kernel to manage all memory in one node.
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array. This option will disable sparse memory support
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and force the kernel to manage all memory in one node.
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Setting this option incorrectly may prevent the kernel from
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booting. It is OK to leave it N.
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Setting this option incorrectly may prevent the kernel
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from booting. It is OK to leave it N.
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For more information, consult
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<file:Documentation/arm/Sharp-LH/SDRAM>.
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config LH7A40X_ONE_BANK_PER_NODE
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bool "Optimize NUMA Node Tables for Size"
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depends on ARCH_LH7A40X && !LH7A40X_CONTIGMEM
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depends on !LH7A40X_CONTIGMEM
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help
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Say Y here to produce compact memory node tables. By
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default pairs of adjacent physical RAM banks are managed
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@ -73,4 +73,10 @@
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#endif
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/*
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* Sparsemem version of the above
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*/
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#define MAX_PHYSMEM_BITS 32
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#define SECTION_SIZE_BITS 24
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#endif
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