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clk-si544: Properly round requested frequency to nearest match

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The si544 driver had a rounding problem that using the result of clk_round_rate
may set the clock to yet another rate, for example:
clk_round_rate(195000000) = 194999999
clk_round_rate(194999999) = 194999998

Clients would expect that after clk_set_rate(clk, freq2=clk_round_rate(clk, freq)) the
chip will be running at exactly freq2.

The problem was in the calculation of the feedback divider, it was always rounded
down instead of to the nearest possible VCO value.

After this change, the following holds true for any supported frequency:
actual_freq = clk_round_rate(clk, freq);
clk_set_rate(clk, actual_freq);
clk_round_rate(clk, actual_freq) == actual_freq && clk_get_rate(clk) == actual_freq

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Fixes: 953cc3e811 ("clk: Add driver for the si544 clock generator chip")
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Mike Looijmans 2018-05-31 16:03:55 +02:00 committed by Stephen Boyd
parent 60cc43fc88
commit 4d3f36c5e9
1 changed files with 1 additions and 0 deletions
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drivers/clk/clk-si544.c
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@ -207,6 +207,7 @@ static int si544_calc_muldiv(struct clk_si544_muldiv *settings,
/* And the fractional bits using the remainder */
vco = (u64)tmp << 32;
vco += FXO / 2; /* Round to nearest multiple */
do_div(vco, FXO);
settings->fb_div_frac = vco;