irqchip/meson-gpio: add support for Meson8 SoCs
Meson8 uses the same GPIO interrupt controller IP block as the other Meson SoCs. A total of 134 pins can be spied on, which is the sum of: - 22 pins on bank GPIOX - 17 pins on bank GPIOY - 30 pins on bank GPIODV - 10 pins on bank GPIOH - 15 pins on bank GPIOZ - 7 pins on bank CARD - 19 pins on bank BOOT - 14 pins in the AO domain Acked-by: Kevin Hilman <khilman@baylibre.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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@ -10,6 +10,7 @@ number of interrupt exposed depends on the SoC.
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Required properties:
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- compatible : must have "amlogic,meson8-gpio-intc” and either
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“amlogic,meson8-gpio-intc” for meson8 SoCs (S802) or
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“amlogic,meson8b-gpio-intc” for meson8b SoCs (S805) or
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“amlogic,meson-gxbb-gpio-intc” for GXBB SoCs (S905) or
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“amlogic,meson-gxl-gpio-intc” for GXL SoCs (S905X, S912)
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@ -47,6 +47,10 @@ struct meson_gpio_irq_params {
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unsigned int nr_hwirq;
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};
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static const struct meson_gpio_irq_params meson8_params = {
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.nr_hwirq = 134,
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};
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static const struct meson_gpio_irq_params meson8b_params = {
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.nr_hwirq = 119,
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};
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@ -60,6 +64,7 @@ static const struct meson_gpio_irq_params gxl_params = {
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};
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static const struct of_device_id meson_irq_gpio_matches[] = {
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{ .compatible = "amlogic,meson8-gpio-intc", .data = &meson8_params },
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{ .compatible = "amlogic,meson8b-gpio-intc", .data = &meson8b_params },
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{ .compatible = "amlogic,meson-gxbb-gpio-intc", .data = &gxbb_params },
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{ .compatible = "amlogic,meson-gxl-gpio-intc", .data = &gxl_params },
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