mfd: sun6i-prcm: Add support for Allwinner A23 PRCM
The Allwinner A23 SoC has a PRCM unit like the previous A31 SoC. The differences are the AR100 clock can no longer be modified, the APB0 clock has different divisors, and some clock gates are gone. This patch adds a compatible with a modified subdevice list for the A23. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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@ -4,7 +4,7 @@ PRCM is an MFD device exposing several Power Management related devices
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(like clks and reset controllers).
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Required properties:
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- compatible: "allwinner,sun6i-a31-prcm"
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- compatible: "allwinner,sun6i-a31-prcm" or "allwinner,sun8i-a23-prcm"
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- reg: The PRCM registers range
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The prcm node may contain several subdevices definitions:
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@ -76,16 +76,46 @@ static const struct mfd_cell sun6i_a31_prcm_subdevs[] = {
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},
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};
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static const struct mfd_cell sun8i_a23_prcm_subdevs[] = {
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{
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.name = "sun8i-a23-apb0-clk",
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.of_compatible = "allwinner,sun8i-a23-apb0-clk",
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.num_resources = ARRAY_SIZE(sun6i_a31_apb0_clk_res),
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.resources = sun6i_a31_apb0_clk_res,
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},
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{
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.name = "sun6i-a31-apb0-gates-clk",
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.of_compatible = "allwinner,sun8i-a23-apb0-gates-clk",
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.num_resources = ARRAY_SIZE(sun6i_a31_apb0_gates_clk_res),
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.resources = sun6i_a31_apb0_gates_clk_res,
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},
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{
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.name = "sun6i-a31-apb0-clock-reset",
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.of_compatible = "allwinner,sun6i-a31-clock-reset",
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.num_resources = ARRAY_SIZE(sun6i_a31_apb0_rstc_res),
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.resources = sun6i_a31_apb0_rstc_res,
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},
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};
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static const struct prcm_data sun6i_a31_prcm_data = {
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.nsubdevs = ARRAY_SIZE(sun6i_a31_prcm_subdevs),
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.subdevs = sun6i_a31_prcm_subdevs,
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};
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static const struct prcm_data sun8i_a23_prcm_data = {
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.nsubdevs = ARRAY_SIZE(sun8i_a23_prcm_subdevs),
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.subdevs = sun8i_a23_prcm_subdevs,
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};
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static const struct of_device_id sun6i_prcm_dt_ids[] = {
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{
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.compatible = "allwinner,sun6i-a31-prcm",
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.data = &sun6i_a31_prcm_data,
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},
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{
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.compatible = "allwinner,sun8i-a23-prcm",
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.data = &sun8i_a23_prcm_data,
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},
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{ /* sentinel */ },
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};
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