ixgbe: use different context for tso and offload
Change TSO offloads to use a different context than VLAN insertion and Tx checksumming. Hardware has separate registers internally for storing these so use them. Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com> Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
This commit is contained in:
parent
cc41ac7c00
commit
4eeae6fd3f
|
@ -3126,6 +3126,8 @@ static int ixgbe_tso(struct ixgbe_adapter *adapter,
|
|||
mss_l4len_idx |=
|
||||
(skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
|
||||
mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
|
||||
/* use index 1 for TSO */
|
||||
mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
|
||||
context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
|
||||
|
||||
tx_buffer_info->time_stamp = jiffies;
|
||||
|
@ -3198,6 +3200,7 @@ static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
|
|||
}
|
||||
|
||||
context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
|
||||
/* use index zero for tx checksum offload */
|
||||
context_desc->mss_l4len_idx = 0;
|
||||
|
||||
tx_buffer_info->time_stamp = jiffies;
|
||||
|
@ -3306,6 +3309,8 @@ static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
|
|||
olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
|
||||
IXGBE_ADVTXD_POPTS_SHIFT;
|
||||
|
||||
/* use index 1 context for tso */
|
||||
olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
|
||||
if (tx_flags & IXGBE_TX_FLAGS_IPV4)
|
||||
olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
|
||||
IXGBE_ADVTXD_POPTS_SHIFT;
|
||||
|
|
Loading…
Reference in a new issue