Automatic merge with /usr/src/ntfs-2.6.git.
This commit is contained in:
commit
4ff4258a3e
|
@ -1163,7 +1163,7 @@ config PCI_DIRECT
|
|||
|
||||
config PCI_MMCONFIG
|
||||
bool
|
||||
depends on PCI && (PCI_GOMMCONFIG || (PCI_GOANY && ACPI))
|
||||
depends on PCI && ACPI && (PCI_GOMMCONFIG || PCI_GOANY)
|
||||
select ACPI_BOOT
|
||||
default y
|
||||
|
||||
|
|
|
@ -118,7 +118,7 @@ struct _cpuid4_info {
|
|||
};
|
||||
|
||||
#define MAX_CACHE_LEAVES 4
|
||||
static unsigned short __devinitdata num_cache_leaves;
|
||||
static unsigned short num_cache_leaves;
|
||||
|
||||
static int __devinit cpuid4_cache_lookup(int index, struct _cpuid4_info *this_leaf)
|
||||
{
|
||||
|
|
|
@ -1074,8 +1074,10 @@ static void __init smp_boot_cpus(unsigned int max_cpus)
|
|||
cpu_set(cpu, cpu_sibling_map[cpu]);
|
||||
}
|
||||
|
||||
if (siblings != smp_num_siblings)
|
||||
if (siblings != smp_num_siblings) {
|
||||
printk(KERN_WARNING "WARNING: %d siblings found for CPU%d, should be %d\n", siblings, cpu, smp_num_siblings);
|
||||
smp_num_siblings = siblings;
|
||||
}
|
||||
|
||||
if (c->x86_num_cores > 1) {
|
||||
for (i = 0; i < NR_CPUS; i++) {
|
||||
|
|
|
@ -1029,7 +1029,6 @@ void pcibios_penalize_isa_irq(int irq)
|
|||
static int pirq_enable_irq(struct pci_dev *dev)
|
||||
{
|
||||
u8 pin;
|
||||
extern int via_interrupt_line_quirk;
|
||||
struct pci_dev *temp_dev;
|
||||
|
||||
pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
|
||||
|
@ -1084,10 +1083,6 @@ static int pirq_enable_irq(struct pci_dev *dev)
|
|||
printk(KERN_WARNING "PCI: No IRQ known for interrupt pin %c of device %s.%s\n",
|
||||
'A' + pin, pci_name(dev), msg);
|
||||
}
|
||||
/* VIA bridges use interrupt line for apic/pci steering across
|
||||
the V-Link */
|
||||
else if (via_interrupt_line_quirk)
|
||||
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq & 15);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -1143,12 +1143,12 @@ config PCI_QSPAN
|
|||
|
||||
config PCI_8260
|
||||
bool
|
||||
depends on PCI && 8260 && !8272
|
||||
depends on PCI && 8260
|
||||
default y
|
||||
|
||||
config 8260_PCI9
|
||||
bool " Enable workaround for MPC826x erratum PCI 9"
|
||||
depends on PCI_8260
|
||||
depends on PCI_8260 && !ADS8272
|
||||
default y
|
||||
|
||||
choice
|
||||
|
|
|
@ -22,7 +22,8 @@ targets += uImage
|
|||
$(obj)/uImage: $(obj)/vmlinux.gz
|
||||
$(Q)rm -f $@
|
||||
$(call if_changed,uimage)
|
||||
@echo ' Image: $@' $(if $(wildcard $@),'is ready','not made')
|
||||
@echo -n ' Image: $@ '
|
||||
@if [ -f $@ ]; then echo 'is ready' ; else echo 'not made'; fi
|
||||
|
||||
# Files generated that shall be removed upon make clean
|
||||
clean-files := sImage vmapus vmlinux* miboot* zImage* uImage
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.11-rc1
|
||||
# Thu Jan 20 01:25:35 2005
|
||||
# Linux kernel version: 2.6.12-rc4
|
||||
# Tue May 17 11:56:01 2005
|
||||
#
|
||||
CONFIG_MMU=y
|
||||
CONFIG_GENERIC_HARDIRQS=y
|
||||
|
@ -11,6 +11,7 @@ CONFIG_HAVE_DEC_LOCK=y
|
|||
CONFIG_PPC=y
|
||||
CONFIG_PPC32=y
|
||||
CONFIG_GENERIC_NVRAM=y
|
||||
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
|
||||
|
||||
#
|
||||
# Code maturity level options
|
||||
|
@ -18,6 +19,7 @@ CONFIG_GENERIC_NVRAM=y
|
|||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_CLEAN_COMPILE=y
|
||||
CONFIG_BROKEN_ON_SMP=y
|
||||
CONFIG_INIT_ENV_ARG_LIMIT=32
|
||||
|
||||
#
|
||||
# General setup
|
||||
|
@ -29,12 +31,14 @@ CONFIG_SYSVIPC=y
|
|||
# CONFIG_BSD_PROCESS_ACCT is not set
|
||||
CONFIG_SYSCTL=y
|
||||
# CONFIG_AUDIT is not set
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
# CONFIG_HOTPLUG is not set
|
||||
CONFIG_KOBJECT_UEVENT=y
|
||||
# CONFIG_IKCONFIG is not set
|
||||
CONFIG_EMBEDDED=y
|
||||
# CONFIG_KALLSYMS is not set
|
||||
CONFIG_PRINTK=y
|
||||
CONFIG_BUG=y
|
||||
CONFIG_BASE_FULL=y
|
||||
CONFIG_FUTEX=y
|
||||
# CONFIG_EPOLL is not set
|
||||
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
|
||||
|
@ -44,6 +48,7 @@ CONFIG_CC_ALIGN_LABELS=0
|
|||
CONFIG_CC_ALIGN_LOOPS=0
|
||||
CONFIG_CC_ALIGN_JUMPS=0
|
||||
# CONFIG_TINY_SHMEM is not set
|
||||
CONFIG_BASE_SMALL=0
|
||||
|
||||
#
|
||||
# Loadable module support
|
||||
|
@ -62,10 +67,12 @@ CONFIG_CC_ALIGN_JUMPS=0
|
|||
CONFIG_E500=y
|
||||
CONFIG_BOOKE=y
|
||||
CONFIG_FSL_BOOKE=y
|
||||
# CONFIG_PHYS_64BIT is not set
|
||||
CONFIG_SPE=y
|
||||
CONFIG_MATH_EMULATION=y
|
||||
# CONFIG_CPU_FREQ is not set
|
||||
CONFIG_PPC_GEN550=y
|
||||
# CONFIG_PM is not set
|
||||
CONFIG_85xx=y
|
||||
CONFIG_PPC_INDIRECT_PCI_BE=y
|
||||
|
||||
|
@ -76,6 +83,7 @@ CONFIG_PPC_INDIRECT_PCI_BE=y
|
|||
CONFIG_MPC8555_CDS=y
|
||||
# CONFIG_MPC8560_ADS is not set
|
||||
# CONFIG_SBC8560 is not set
|
||||
# CONFIG_STX_GP3 is not set
|
||||
CONFIG_MPC8555=y
|
||||
CONFIG_85xx_PCI2=y
|
||||
|
||||
|
@ -90,6 +98,7 @@ CONFIG_CPM2=y
|
|||
CONFIG_BINFMT_ELF=y
|
||||
# CONFIG_BINFMT_MISC is not set
|
||||
# CONFIG_CMDLINE_BOOL is not set
|
||||
CONFIG_ISA_DMA_API=y
|
||||
|
||||
#
|
||||
# Bus options
|
||||
|
@ -104,10 +113,6 @@ CONFIG_PCI_NAMES=y
|
|||
#
|
||||
# CONFIG_PCCARD is not set
|
||||
|
||||
#
|
||||
# PC-card bridges
|
||||
#
|
||||
|
||||
#
|
||||
# Advanced setup
|
||||
#
|
||||
|
@ -180,7 +185,59 @@ CONFIG_IOSCHED_CFQ=y
|
|||
#
|
||||
# ATA/ATAPI/MFM/RLL support
|
||||
#
|
||||
# CONFIG_IDE is not set
|
||||
CONFIG_IDE=y
|
||||
CONFIG_BLK_DEV_IDE=y
|
||||
|
||||
#
|
||||
# Please see Documentation/ide.txt for help/info on IDE drives
|
||||
#
|
||||
# CONFIG_BLK_DEV_IDE_SATA is not set
|
||||
CONFIG_BLK_DEV_IDEDISK=y
|
||||
# CONFIG_IDEDISK_MULTI_MODE is not set
|
||||
# CONFIG_BLK_DEV_IDECD is not set
|
||||
# CONFIG_BLK_DEV_IDETAPE is not set
|
||||
# CONFIG_BLK_DEV_IDEFLOPPY is not set
|
||||
# CONFIG_IDE_TASK_IOCTL is not set
|
||||
|
||||
#
|
||||
# IDE chipset support/bugfixes
|
||||
#
|
||||
CONFIG_IDE_GENERIC=y
|
||||
CONFIG_BLK_DEV_IDEPCI=y
|
||||
CONFIG_IDEPCI_SHARE_IRQ=y
|
||||
# CONFIG_BLK_DEV_OFFBOARD is not set
|
||||
CONFIG_BLK_DEV_GENERIC=y
|
||||
# CONFIG_BLK_DEV_OPTI621 is not set
|
||||
# CONFIG_BLK_DEV_SL82C105 is not set
|
||||
CONFIG_BLK_DEV_IDEDMA_PCI=y
|
||||
# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
|
||||
CONFIG_IDEDMA_PCI_AUTO=y
|
||||
# CONFIG_IDEDMA_ONLYDISK is not set
|
||||
# CONFIG_BLK_DEV_AEC62XX is not set
|
||||
# CONFIG_BLK_DEV_ALI15X3 is not set
|
||||
# CONFIG_BLK_DEV_AMD74XX is not set
|
||||
# CONFIG_BLK_DEV_CMD64X is not set
|
||||
# CONFIG_BLK_DEV_TRIFLEX is not set
|
||||
# CONFIG_BLK_DEV_CY82C693 is not set
|
||||
# CONFIG_BLK_DEV_CS5520 is not set
|
||||
# CONFIG_BLK_DEV_CS5530 is not set
|
||||
# CONFIG_BLK_DEV_HPT34X is not set
|
||||
# CONFIG_BLK_DEV_HPT366 is not set
|
||||
# CONFIG_BLK_DEV_SC1200 is not set
|
||||
# CONFIG_BLK_DEV_PIIX is not set
|
||||
# CONFIG_BLK_DEV_NS87415 is not set
|
||||
# CONFIG_BLK_DEV_PDC202XX_OLD is not set
|
||||
# CONFIG_BLK_DEV_PDC202XX_NEW is not set
|
||||
# CONFIG_BLK_DEV_SVWKS is not set
|
||||
# CONFIG_BLK_DEV_SIIMAGE is not set
|
||||
# CONFIG_BLK_DEV_SLC90E66 is not set
|
||||
# CONFIG_BLK_DEV_TRM290 is not set
|
||||
CONFIG_BLK_DEV_VIA82CXXX=y
|
||||
# CONFIG_IDE_ARM is not set
|
||||
CONFIG_BLK_DEV_IDEDMA=y
|
||||
# CONFIG_IDEDMA_IVB is not set
|
||||
CONFIG_IDEDMA_AUTO=y
|
||||
# CONFIG_BLK_DEV_HD is not set
|
||||
|
||||
#
|
||||
# SCSI device support
|
||||
|
@ -220,7 +277,6 @@ CONFIG_NET=y
|
|||
#
|
||||
CONFIG_PACKET=y
|
||||
# CONFIG_PACKET_MMAP is not set
|
||||
# CONFIG_NETLINK_DEV is not set
|
||||
CONFIG_UNIX=y
|
||||
# CONFIG_NET_KEY is not set
|
||||
CONFIG_INET=y
|
||||
|
@ -369,14 +425,6 @@ CONFIG_INPUT=y
|
|||
# CONFIG_INPUT_EVDEV is not set
|
||||
# CONFIG_INPUT_EVBUG is not set
|
||||
|
||||
#
|
||||
# Input I/O drivers
|
||||
#
|
||||
# CONFIG_GAMEPORT is not set
|
||||
CONFIG_SOUND_GAMEPORT=y
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_SERIO_I8042 is not set
|
||||
|
||||
#
|
||||
# Input Device Drivers
|
||||
#
|
||||
|
@ -386,6 +434,13 @@ CONFIG_SOUND_GAMEPORT=y
|
|||
# CONFIG_INPUT_TOUCHSCREEN is not set
|
||||
# CONFIG_INPUT_MISC is not set
|
||||
|
||||
#
|
||||
# Hardware I/O ports
|
||||
#
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_GAMEPORT is not set
|
||||
CONFIG_SOUND_GAMEPORT=y
|
||||
|
||||
#
|
||||
# Character devices
|
||||
#
|
||||
|
@ -406,6 +461,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
|
|||
CONFIG_SERIAL_CORE=y
|
||||
CONFIG_SERIAL_CORE_CONSOLE=y
|
||||
# CONFIG_SERIAL_CPM is not set
|
||||
# CONFIG_SERIAL_JSM is not set
|
||||
CONFIG_UNIX98_PTYS=y
|
||||
CONFIG_LEGACY_PTYS=y
|
||||
CONFIG_LEGACY_PTY_COUNT=256
|
||||
|
@ -433,6 +489,11 @@ CONFIG_GEN_RTC=y
|
|||
# CONFIG_DRM is not set
|
||||
# CONFIG_RAW_DRIVER is not set
|
||||
|
||||
#
|
||||
# TPM devices
|
||||
#
|
||||
# CONFIG_TCG_TPM is not set
|
||||
|
||||
#
|
||||
# I2C support
|
||||
#
|
||||
|
@ -456,11 +517,11 @@ CONFIG_I2C_CHARDEV=y
|
|||
# CONFIG_I2C_AMD8111 is not set
|
||||
# CONFIG_I2C_I801 is not set
|
||||
# CONFIG_I2C_I810 is not set
|
||||
# CONFIG_I2C_PIIX4 is not set
|
||||
# CONFIG_I2C_ISA is not set
|
||||
CONFIG_I2C_MPC=y
|
||||
# CONFIG_I2C_NFORCE2 is not set
|
||||
# CONFIG_I2C_PARPORT_LIGHT is not set
|
||||
# CONFIG_I2C_PIIX4 is not set
|
||||
# CONFIG_I2C_PROSAVAGE is not set
|
||||
# CONFIG_I2C_SAVAGE4 is not set
|
||||
# CONFIG_SCx200_ACB is not set
|
||||
|
@ -483,7 +544,9 @@ CONFIG_I2C_MPC=y
|
|||
# CONFIG_SENSORS_ASB100 is not set
|
||||
# CONFIG_SENSORS_DS1621 is not set
|
||||
# CONFIG_SENSORS_FSCHER is not set
|
||||
# CONFIG_SENSORS_FSCPOS is not set
|
||||
# CONFIG_SENSORS_GL518SM is not set
|
||||
# CONFIG_SENSORS_GL520SM is not set
|
||||
# CONFIG_SENSORS_IT87 is not set
|
||||
# CONFIG_SENSORS_LM63 is not set
|
||||
# CONFIG_SENSORS_LM75 is not set
|
||||
|
@ -494,9 +557,11 @@ CONFIG_I2C_MPC=y
|
|||
# CONFIG_SENSORS_LM85 is not set
|
||||
# CONFIG_SENSORS_LM87 is not set
|
||||
# CONFIG_SENSORS_LM90 is not set
|
||||
# CONFIG_SENSORS_LM92 is not set
|
||||
# CONFIG_SENSORS_MAX1619 is not set
|
||||
# CONFIG_SENSORS_PC87360 is not set
|
||||
# CONFIG_SENSORS_SMSC47B397 is not set
|
||||
# CONFIG_SENSORS_SIS5595 is not set
|
||||
# CONFIG_SENSORS_SMSC47M1 is not set
|
||||
# CONFIG_SENSORS_VIA686A is not set
|
||||
# CONFIG_SENSORS_W83781D is not set
|
||||
|
@ -506,10 +571,12 @@ CONFIG_I2C_MPC=y
|
|||
#
|
||||
# Other I2C Chip support
|
||||
#
|
||||
# CONFIG_SENSORS_DS1337 is not set
|
||||
# CONFIG_SENSORS_EEPROM is not set
|
||||
# CONFIG_SENSORS_PCF8574 is not set
|
||||
# CONFIG_SENSORS_PCF8591 is not set
|
||||
# CONFIG_SENSORS_RTC8564 is not set
|
||||
# CONFIG_SENSORS_M41T00 is not set
|
||||
# CONFIG_I2C_DEBUG_CORE is not set
|
||||
# CONFIG_I2C_DEBUG_ALGO is not set
|
||||
# CONFIG_I2C_DEBUG_BUS is not set
|
||||
|
@ -538,7 +605,6 @@ CONFIG_I2C_MPC=y
|
|||
# Graphics support
|
||||
#
|
||||
# CONFIG_FB is not set
|
||||
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
|
||||
|
||||
#
|
||||
# Sound
|
||||
|
@ -548,13 +614,9 @@ CONFIG_I2C_MPC=y
|
|||
#
|
||||
# USB support
|
||||
#
|
||||
# CONFIG_USB is not set
|
||||
CONFIG_USB_ARCH_HAS_HCD=y
|
||||
CONFIG_USB_ARCH_HAS_OHCI=y
|
||||
|
||||
#
|
||||
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
|
||||
#
|
||||
# CONFIG_USB is not set
|
||||
|
||||
#
|
||||
# USB Gadget Support
|
||||
|
@ -585,6 +647,10 @@ CONFIG_JBD=y
|
|||
CONFIG_FS_MBCACHE=y
|
||||
# CONFIG_REISERFS_FS is not set
|
||||
# CONFIG_JFS_FS is not set
|
||||
|
||||
#
|
||||
# XFS support
|
||||
#
|
||||
# CONFIG_XFS_FS is not set
|
||||
# CONFIG_MINIX_FS is not set
|
||||
# CONFIG_ROMFS_FS is not set
|
||||
|
@ -646,7 +712,6 @@ CONFIG_NFS_FS=y
|
|||
# CONFIG_NFSD is not set
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_LOCKD=y
|
||||
# CONFIG_EXPORTFS is not set
|
||||
CONFIG_SUNRPC=y
|
||||
# CONFIG_RPCSEC_GSS_KRB5 is not set
|
||||
# CONFIG_RPCSEC_GSS_SPKM3 is not set
|
||||
|
@ -698,7 +763,9 @@ CONFIG_CRC32=y
|
|||
#
|
||||
# Kernel hacking
|
||||
#
|
||||
# CONFIG_PRINTK_TIME is not set
|
||||
# CONFIG_DEBUG_KERNEL is not set
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
# CONFIG_KGDB_CONSOLE is not set
|
||||
# CONFIG_SERIAL_TEXT_DEBUG is not set
|
||||
|
||||
|
|
|
@ -232,7 +232,8 @@ skpinv: addi r6,r6,1 /* Increment */
|
|||
tlbwe
|
||||
|
||||
/* 7. Jump to KERNELBASE mapping */
|
||||
li r7,0
|
||||
lis r7,MSR_KERNEL@h
|
||||
ori r7,r7,MSR_KERNEL@l
|
||||
bl 1f /* Find our address */
|
||||
1: mflr r9
|
||||
rlwimi r6,r9,0,20,31
|
||||
|
@ -293,6 +294,18 @@ skpinv: addi r6,r6,1 /* Increment */
|
|||
mtspr SPRN_HID0, r2
|
||||
#endif
|
||||
|
||||
#if !defined(CONFIG_BDI_SWITCH)
|
||||
/*
|
||||
* The Abatron BDI JTAG debugger does not tolerate others
|
||||
* mucking with the debug registers.
|
||||
*/
|
||||
lis r2,DBCR0_IDM@h
|
||||
mtspr SPRN_DBCR0,r2
|
||||
/* clear any residual debug events */
|
||||
li r2,-1
|
||||
mtspr SPRN_DBSR,r2
|
||||
#endif
|
||||
|
||||
/*
|
||||
* This is where the main kernel code starts.
|
||||
*/
|
||||
|
|
|
@ -408,12 +408,7 @@ static int emulate_string_inst(struct pt_regs *regs, u32 instword)
|
|||
|
||||
/* Early out if we are an invalid form of lswx */
|
||||
if ((instword & INST_STRING_MASK) == INST_LSWX)
|
||||
if ((rA >= rT) || (NB_RB >= rT) || (rT == rA) || (rT == NB_RB))
|
||||
return -EINVAL;
|
||||
|
||||
/* Early out if we are an invalid form of lswi */
|
||||
if ((instword & INST_STRING_MASK) == INST_LSWI)
|
||||
if ((rA >= rT) || (rT == rA))
|
||||
if ((rT == rA) || (rT == NB_RB))
|
||||
return -EINVAL;
|
||||
|
||||
EA = (rA == 0) ? 0 : regs->gpr[rA];
|
||||
|
|
|
@ -127,7 +127,6 @@ mpc834x_sys_map_io(void)
|
|||
{
|
||||
/* we steal the lowest ioremap addr for virt space */
|
||||
io_block_mapping(VIRT_IMMRBAR, immrbar, 1024*1024, _PAGE_IO);
|
||||
io_block_mapping(BCSR_VIRT_ADDR, BCSR_PHYS_ADDR, BCSR_SIZE, _PAGE_IO);
|
||||
}
|
||||
|
||||
int
|
||||
|
|
|
@ -26,9 +26,14 @@
|
|||
#define VIRT_IMMRBAR ((uint)0xfe000000)
|
||||
|
||||
#define BCSR_PHYS_ADDR ((uint)0xf8000000)
|
||||
#define BCSR_VIRT_ADDR ((uint)0xfe100000)
|
||||
#define BCSR_SIZE ((uint)(32 * 1024))
|
||||
|
||||
#define BCSR_MISC_REG2_OFF 0x07
|
||||
#define BCSR_MISC_REG2_PORESET 0x01
|
||||
|
||||
#define BCSR_MISC_REG3_OFF 0x08
|
||||
#define BCSR_MISC_REG3_CNFLOCK 0x80
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
/* PCI interrupt controller */
|
||||
#define PIRQA MPC83xx_IRQ_IRQ4
|
||||
|
|
|
@ -210,6 +210,9 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
|
|||
#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
|
||||
ppc_md.progress = gen550_progress;
|
||||
#endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
|
||||
#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_KGDB)
|
||||
ppc_md.early_serial_map = mpc85xx_early_serial_map;
|
||||
#endif /* CONFIG_SERIAL_8250 && CONFIG_KGDB */
|
||||
|
||||
if (ppc_md.progress)
|
||||
ppc_md.progress("mpc8540ads_init(): exit", 0);
|
||||
|
|
|
@ -44,6 +44,7 @@
|
|||
#include <asm/machdep.h>
|
||||
#include <asm/prom.h>
|
||||
#include <asm/open_pic.h>
|
||||
#include <asm/i8259.h>
|
||||
#include <asm/bootinfo.h>
|
||||
#include <asm/pci-bridge.h>
|
||||
#include <asm/mpc85xx.h>
|
||||
|
@ -181,6 +182,7 @@ void __init
|
|||
mpc85xx_cds_init_IRQ(void)
|
||||
{
|
||||
bd_t *binfo = (bd_t *) __res;
|
||||
int i;
|
||||
|
||||
/* Determine the Physical Address of the OpenPIC regs */
|
||||
phys_addr_t OpenPIC_PAddr = binfo->bi_immr_base + MPC85xx_OPENPIC_OFFSET;
|
||||
|
@ -198,6 +200,15 @@ mpc85xx_cds_init_IRQ(void)
|
|||
*/
|
||||
openpic_init(MPC85xx_OPENPIC_IRQ_OFFSET);
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
openpic_hookup_cascade(PIRQ0A, "82c59 cascade", i8259_irq);
|
||||
|
||||
for (i = 0; i < NUM_8259_INTERRUPTS; i++)
|
||||
irq_desc[i].handler = &i8259_pic;
|
||||
|
||||
i8259_init(0);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CPM2
|
||||
/* Setup CPM2 PIC */
|
||||
cpm2_init_IRQ();
|
||||
|
@ -231,7 +242,7 @@ mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
|
|||
* interrupt on slot */
|
||||
{
|
||||
{ 0, 1, 2, 3 }, /* 16 - PMC */
|
||||
{ 3, 0, 0, 0 }, /* 17 P2P (Tsi320) */
|
||||
{ 0, 1, 2, 3 }, /* 17 P2P (Tsi320) */
|
||||
{ 0, 1, 2, 3 }, /* 18 - Slot 1 */
|
||||
{ 1, 2, 3, 0 }, /* 19 - Slot 2 */
|
||||
{ 2, 3, 0, 1 }, /* 20 - Slot 3 */
|
||||
|
@ -280,13 +291,135 @@ mpc85xx_exclude_device(u_char bus, u_char devfn)
|
|||
return PCIBIOS_DEVICE_NOT_FOUND;
|
||||
#endif
|
||||
/* We explicitly do not go past the Tundra 320 Bridge */
|
||||
if (bus == 1)
|
||||
if ((bus == 1) && (PCI_SLOT(devfn) == ARCADIA_2ND_BRIDGE_IDSEL))
|
||||
return PCIBIOS_DEVICE_NOT_FOUND;
|
||||
if ((bus == 0) && (PCI_SLOT(devfn) == ARCADIA_2ND_BRIDGE_IDSEL))
|
||||
return PCIBIOS_DEVICE_NOT_FOUND;
|
||||
else
|
||||
return PCIBIOS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
void __init
|
||||
mpc85xx_cds_enable_via(struct pci_controller *hose)
|
||||
{
|
||||
u32 pci_class;
|
||||
u16 vid, did;
|
||||
|
||||
early_read_config_dword(hose, 0, 0x88, PCI_CLASS_REVISION, &pci_class);
|
||||
if ((pci_class >> 16) != PCI_CLASS_BRIDGE_PCI)
|
||||
return;
|
||||
|
||||
/* Configure P2P so that we can reach bus 1 */
|
||||
early_write_config_byte(hose, 0, 0x88, PCI_PRIMARY_BUS, 0);
|
||||
early_write_config_byte(hose, 0, 0x88, PCI_SECONDARY_BUS, 1);
|
||||
early_write_config_byte(hose, 0, 0x88, PCI_SUBORDINATE_BUS, 0xff);
|
||||
|
||||
early_read_config_word(hose, 1, 0x10, PCI_VENDOR_ID, &vid);
|
||||
early_read_config_word(hose, 1, 0x10, PCI_DEVICE_ID, &did);
|
||||
|
||||
if ((vid != PCI_VENDOR_ID_VIA) ||
|
||||
(did != PCI_DEVICE_ID_VIA_82C686))
|
||||
return;
|
||||
|
||||
/* Enable USB and IDE functions */
|
||||
early_write_config_byte(hose, 1, 0x10, 0x48, 0x08);
|
||||
}
|
||||
|
||||
void __init
|
||||
mpc85xx_cds_fixup_via(struct pci_controller *hose)
|
||||
{
|
||||
u32 pci_class;
|
||||
u16 vid, did;
|
||||
|
||||
early_read_config_dword(hose, 0, 0x88, PCI_CLASS_REVISION, &pci_class);
|
||||
if ((pci_class >> 16) != PCI_CLASS_BRIDGE_PCI)
|
||||
return;
|
||||
|
||||
/*
|
||||
* Force the backplane P2P bridge to have a window
|
||||
* open from 0x00000000-0x00001fff in PCI I/O space.
|
||||
* This allows legacy I/O (i8259, etc) on the VIA
|
||||
* southbridge to be accessed.
|
||||
*/
|
||||
early_write_config_byte(hose, 0, 0x88, PCI_IO_BASE, 0x00);
|
||||
early_write_config_word(hose, 0, 0x88, PCI_IO_BASE_UPPER16, 0x0000);
|
||||
early_write_config_byte(hose, 0, 0x88, PCI_IO_LIMIT, 0x10);
|
||||
early_write_config_word(hose, 0, 0x88, PCI_IO_LIMIT_UPPER16, 0x0000);
|
||||
|
||||
early_read_config_word(hose, 1, 0x10, PCI_VENDOR_ID, &vid);
|
||||
early_read_config_word(hose, 1, 0x10, PCI_DEVICE_ID, &did);
|
||||
if ((vid != PCI_VENDOR_ID_VIA) ||
|
||||
(did != PCI_DEVICE_ID_VIA_82C686))
|
||||
return;
|
||||
|
||||
/*
|
||||
* Since the P2P window was forced to cover the fixed
|
||||
* legacy I/O addresses, it is necessary to manually
|
||||
* place the base addresses for the IDE and USB functions
|
||||
* within this window.
|
||||
*/
|
||||
/* Function 1, IDE */
|
||||
early_write_config_dword(hose, 1, 0x11, PCI_BASE_ADDRESS_0, 0x1ff8);
|
||||
early_write_config_dword(hose, 1, 0x11, PCI_BASE_ADDRESS_1, 0x1ff4);
|
||||
early_write_config_dword(hose, 1, 0x11, PCI_BASE_ADDRESS_2, 0x1fe8);
|
||||
early_write_config_dword(hose, 1, 0x11, PCI_BASE_ADDRESS_3, 0x1fe4);
|
||||
early_write_config_dword(hose, 1, 0x11, PCI_BASE_ADDRESS_4, 0x1fd0);
|
||||
|
||||
/* Function 2, USB ports 0-1 */
|
||||
early_write_config_dword(hose, 1, 0x12, PCI_BASE_ADDRESS_4, 0x1fa0);
|
||||
|
||||
/* Function 3, USB ports 2-3 */
|
||||
early_write_config_dword(hose, 1, 0x13, PCI_BASE_ADDRESS_4, 0x1f80);
|
||||
|
||||
/* Function 5, Power Management */
|
||||
early_write_config_dword(hose, 1, 0x15, PCI_BASE_ADDRESS_0, 0x1e00);
|
||||
early_write_config_dword(hose, 1, 0x15, PCI_BASE_ADDRESS_1, 0x1dfc);
|
||||
early_write_config_dword(hose, 1, 0x15, PCI_BASE_ADDRESS_2, 0x1df8);
|
||||
|
||||
/* Function 6, AC97 Interface */
|
||||
early_write_config_dword(hose, 1, 0x16, PCI_BASE_ADDRESS_0, 0x1c00);
|
||||
}
|
||||
|
||||
void __init
|
||||
mpc85xx_cds_pcibios_fixup(void)
|
||||
{
|
||||
struct pci_dev *dev = NULL;
|
||||
u_char c;
|
||||
|
||||
if ((dev = pci_find_device(PCI_VENDOR_ID_VIA,
|
||||
PCI_DEVICE_ID_VIA_82C586_1, NULL))) {
|
||||
/*
|
||||
* U-Boot does not set the enable bits
|
||||
* for the IDE device. Force them on here.
|
||||
*/
|
||||
pci_read_config_byte(dev, 0x40, &c);
|
||||
c |= 0x03; /* IDE: Chip Enable Bits */
|
||||
pci_write_config_byte(dev, 0x40, c);
|
||||
|
||||
/*
|
||||
* Since only primary interface works, force the
|
||||
* IDE function to standard primary IDE interrupt
|
||||
* w/ 8259 offset
|
||||
*/
|
||||
dev->irq = 14;
|
||||
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
|
||||
}
|
||||
|
||||
/*
|
||||
* Force legacy USB interrupt routing
|
||||
*/
|
||||
if ((dev = pci_find_device(PCI_VENDOR_ID_VIA,
|
||||
PCI_DEVICE_ID_VIA_82C586_2, NULL))) {
|
||||
dev->irq = 10;
|
||||
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 10);
|
||||
}
|
||||
|
||||
if ((dev = pci_find_device(PCI_VENDOR_ID_VIA,
|
||||
PCI_DEVICE_ID_VIA_82C586_2, dev))) {
|
||||
dev->irq = 11;
|
||||
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11);
|
||||
}
|
||||
}
|
||||
#endif /* CONFIG_PCI */
|
||||
|
||||
TODC_ALLOC();
|
||||
|
@ -328,6 +461,9 @@ mpc85xx_cds_setup_arch(void)
|
|||
loops_per_jiffy = freq / HZ;
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
/* VIA IDE configuration */
|
||||
ppc_md.pcibios_fixup = mpc85xx_cds_pcibios_fixup;
|
||||
|
||||
/* setup PCI host bridges */
|
||||
mpc85xx_setup_hose();
|
||||
#endif
|
||||
|
@ -459,6 +595,9 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
|
|||
#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
|
||||
ppc_md.progress = gen550_progress;
|
||||
#endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
|
||||
#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_KGDB)
|
||||
ppc_md.early_serial_map = mpc85xx_early_serial_map;
|
||||
#endif /* CONFIG_SERIAL_8250 && CONFIG_KGDB */
|
||||
|
||||
if (ppc_md.progress)
|
||||
ppc_md.progress("mpc85xx_cds_init(): exit", 0);
|
||||
|
|
|
@ -77,4 +77,7 @@
|
|||
|
||||
#define MPC85XX_PCI2_IO_SIZE 0x01000000
|
||||
|
||||
#define NR_8259_INTS 16
|
||||
#define CPM_IRQ_OFFSET NR_8259_INTS
|
||||
|
||||
#endif /* __MACH_MPC85XX_CDS_H__ */
|
||||
|
|
|
@ -221,6 +221,9 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
|
|||
#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
|
||||
ppc_md.progress = gen550_progress;
|
||||
#endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
|
||||
#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_KGDB)
|
||||
ppc_md.early_serial_map = sbc8560_early_serial_map;
|
||||
#endif /* CONFIG_SERIAL_8250 && CONFIG_KGDB */
|
||||
|
||||
if (ppc_md.progress)
|
||||
ppc_md.progress("sbc8560_init(): exit", 0);
|
||||
|
|
|
@ -85,14 +85,11 @@ static int no_schedule;
|
|||
static int has_cpu_l2lve;
|
||||
|
||||
|
||||
#define PMAC_CPU_LOW_SPEED 1
|
||||
#define PMAC_CPU_HIGH_SPEED 0
|
||||
|
||||
/* There are only two frequency states for each processor. Values
|
||||
* are in kHz for the time being.
|
||||
*/
|
||||
#define CPUFREQ_HIGH PMAC_CPU_HIGH_SPEED
|
||||
#define CPUFREQ_LOW PMAC_CPU_LOW_SPEED
|
||||
#define CPUFREQ_HIGH 0
|
||||
#define CPUFREQ_LOW 1
|
||||
|
||||
static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
|
||||
{CPUFREQ_HIGH, 0},
|
||||
|
@ -100,6 +97,11 @@ static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
|
|||
{0, CPUFREQ_TABLE_END},
|
||||
};
|
||||
|
||||
static struct freq_attr* pmac_cpu_freqs_attr[] = {
|
||||
&cpufreq_freq_attr_scaling_available_freqs,
|
||||
NULL,
|
||||
};
|
||||
|
||||
static inline void local_delay(unsigned long ms)
|
||||
{
|
||||
if (no_schedule)
|
||||
|
@ -269,6 +271,8 @@ static int __pmac pmu_set_cpu_speed(int low_speed)
|
|||
#ifdef DEBUG_FREQ
|
||||
printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
|
||||
#endif
|
||||
pmu_suspend();
|
||||
|
||||
/* Disable all interrupt sources on openpic */
|
||||
pic_prio = openpic_get_priority();
|
||||
openpic_set_priority(0xf);
|
||||
|
@ -343,6 +347,8 @@ static int __pmac pmu_set_cpu_speed(int low_speed)
|
|||
debug_calc_bogomips();
|
||||
#endif
|
||||
|
||||
pmu_resume();
|
||||
|
||||
preempt_enable();
|
||||
|
||||
return 0;
|
||||
|
@ -355,7 +361,7 @@ static int __pmac do_set_cpu_speed(int speed_mode, int notify)
|
|||
static unsigned long prev_l3cr;
|
||||
|
||||
freqs.old = cur_freq;
|
||||
freqs.new = (speed_mode == PMAC_CPU_HIGH_SPEED) ? hi_freq : low_freq;
|
||||
freqs.new = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
|
||||
freqs.cpu = smp_processor_id();
|
||||
|
||||
if (freqs.old == freqs.new)
|
||||
|
@ -363,7 +369,7 @@ static int __pmac do_set_cpu_speed(int speed_mode, int notify)
|
|||
|
||||
if (notify)
|
||||
cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
|
||||
if (speed_mode == PMAC_CPU_LOW_SPEED &&
|
||||
if (speed_mode == CPUFREQ_LOW &&
|
||||
cpu_has_feature(CPU_FTR_L3CR)) {
|
||||
l3cr = _get_L3CR();
|
||||
if (l3cr & L3CR_L3E) {
|
||||
|
@ -371,8 +377,8 @@ static int __pmac do_set_cpu_speed(int speed_mode, int notify)
|
|||
_set_L3CR(0);
|
||||
}
|
||||
}
|
||||
set_speed_proc(speed_mode == PMAC_CPU_LOW_SPEED);
|
||||
if (speed_mode == PMAC_CPU_HIGH_SPEED &&
|
||||
set_speed_proc(speed_mode == CPUFREQ_LOW);
|
||||
if (speed_mode == CPUFREQ_HIGH &&
|
||||
cpu_has_feature(CPU_FTR_L3CR)) {
|
||||
l3cr = _get_L3CR();
|
||||
if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
|
||||
|
@ -380,7 +386,7 @@ static int __pmac do_set_cpu_speed(int speed_mode, int notify)
|
|||
}
|
||||
if (notify)
|
||||
cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
|
||||
cur_freq = (speed_mode == PMAC_CPU_HIGH_SPEED) ? hi_freq : low_freq;
|
||||
cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -423,7 +429,8 @@ static int __pmac pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
|
|||
policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
|
||||
policy->cur = cur_freq;
|
||||
|
||||
return cpufreq_frequency_table_cpuinfo(policy, &pmac_cpu_freqs[0]);
|
||||
cpufreq_frequency_table_get_attr(pmac_cpu_freqs, policy->cpu);
|
||||
return cpufreq_frequency_table_cpuinfo(policy, pmac_cpu_freqs);
|
||||
}
|
||||
|
||||
static u32 __pmac read_gpio(struct device_node *np)
|
||||
|
@ -457,7 +464,7 @@ static int __pmac pmac_cpufreq_suspend(struct cpufreq_policy *policy, u32 state)
|
|||
no_schedule = 1;
|
||||
sleep_freq = cur_freq;
|
||||
if (cur_freq == low_freq)
|
||||
do_set_cpu_speed(PMAC_CPU_HIGH_SPEED, 0);
|
||||
do_set_cpu_speed(CPUFREQ_HIGH, 0);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -473,8 +480,8 @@ static int __pmac pmac_cpufreq_resume(struct cpufreq_policy *policy)
|
|||
* is that we force a switch to whatever it was, which is
|
||||
* probably high speed due to our suspend() routine
|
||||
*/
|
||||
do_set_cpu_speed(sleep_freq == low_freq ? PMAC_CPU_LOW_SPEED
|
||||
: PMAC_CPU_HIGH_SPEED, 0);
|
||||
do_set_cpu_speed(sleep_freq == low_freq ?
|
||||
CPUFREQ_LOW : CPUFREQ_HIGH, 0);
|
||||
|
||||
no_schedule = 0;
|
||||
return 0;
|
||||
|
@ -488,6 +495,7 @@ static struct cpufreq_driver pmac_cpufreq_driver = {
|
|||
.suspend = pmac_cpufreq_suspend,
|
||||
.resume = pmac_cpufreq_resume,
|
||||
.flags = CPUFREQ_PM_NO_WARN,
|
||||
.attr = pmac_cpu_freqs_attr,
|
||||
.name = "powermac",
|
||||
.owner = THIS_MODULE,
|
||||
};
|
||||
|
|
|
@ -49,10 +49,10 @@
|
|||
/* PCI interrupt controller */
|
||||
#define PCI_INT_STAT_REG 0xF8200000
|
||||
#define PCI_INT_MASK_REG 0xF8200004
|
||||
#define PIRQA (NR_SIU_INTS + 0)
|
||||
#define PIRQB (NR_SIU_INTS + 1)
|
||||
#define PIRQC (NR_SIU_INTS + 2)
|
||||
#define PIRQD (NR_SIU_INTS + 3)
|
||||
#define PIRQA (NR_CPM_INTS + 0)
|
||||
#define PIRQB (NR_CPM_INTS + 1)
|
||||
#define PIRQC (NR_CPM_INTS + 2)
|
||||
#define PIRQD (NR_CPM_INTS + 3)
|
||||
|
||||
/*
|
||||
* PCI memory map definitions for MPC8266ADS-PCI.
|
||||
|
@ -68,28 +68,23 @@
|
|||
* 0x00000000-0x1FFFFFFF 0x00000000-0x1FFFFFFF MPC8266 local memory
|
||||
*/
|
||||
|
||||
/* window for a PCI master to access MPC8266 memory */
|
||||
#define PCI_SLV_MEM_LOCAL 0x00000000 /* Local base */
|
||||
#define PCI_SLV_MEM_BUS 0x00000000 /* PCI base */
|
||||
/* All the other PCI memory map definitions reside at syslib/m82xx_pci.h
|
||||
Here we should redefine what is unique for this board */
|
||||
#define M82xx_PCI_SLAVE_MEM_LOCAL 0x00000000 /* Local base */
|
||||
#define M82xx_PCI_SLAVE_MEM_BUS 0x00000000 /* PCI base */
|
||||
#define M82xx_PCI_SLAVE_MEM_SIZE 0x10000000 /* 256 Mb */
|
||||
|
||||
/* window for the processor to access PCI memory with prefetching */
|
||||
#define PCI_MSTR_MEM_LOCAL 0x80000000 /* Local base */
|
||||
#define PCI_MSTR_MEM_BUS 0x80000000 /* PCI base */
|
||||
#define PCI_MSTR_MEM_SIZE 0x20000000 /* 512MB */
|
||||
#define M82xx_PCI_SLAVE_SEC_WND_SIZE ~(0x40000000 - 1U) /* 2 x 512Mb */
|
||||
#define M82xx_PCI_SLAVE_SEC_WND_BASE 0x80000000 /* PCI Memory base */
|
||||
|
||||
/* window for the processor to access PCI memory without prefetching */
|
||||
#define PCI_MSTR_MEMIO_LOCAL 0xA0000000 /* Local base */
|
||||
#define PCI_MSTR_MEMIO_BUS 0xA0000000 /* PCI base */
|
||||
#define PCI_MSTR_MEMIO_SIZE 0x20000000 /* 512MB */
|
||||
#if defined(CONFIG_ADS8272)
|
||||
#define PCI_INT_TO_SIU SIU_INT_IRQ2
|
||||
#elif defined(CONFIG_PQ2FADS)
|
||||
#define PCI_INT_TO_SIU SIU_INT_IRQ6
|
||||
#else
|
||||
#warning PCI Bridge will be without interrupts support
|
||||
#endif
|
||||
|
||||
/* window for the processor to access PCI I/O */
|
||||
#define PCI_MSTR_IO_LOCAL 0xF4000000 /* Local base */
|
||||
#define PCI_MSTR_IO_BUS 0x00000000 /* PCI base */
|
||||
#define PCI_MSTR_IO_SIZE 0x04000000 /* 64MB */
|
||||
|
||||
#define _IO_BASE PCI_MSTR_IO_LOCAL
|
||||
#define _ISA_MEM_BASE PCI_MSTR_MEMIO_LOCAL
|
||||
#define PCI_DRAM_OFFSET PCI_SLV_MEM_BUS
|
||||
#endif /* CONFIG_PCI */
|
||||
|
||||
#endif /* __MACH_ADS8260_DEFS */
|
||||
|
|
|
@ -81,7 +81,7 @@ obj-$(CONFIG_SBC82xx) += todc_time.o
|
|||
obj-$(CONFIG_SPRUCE) += cpc700_pic.o indirect_pci.o pci_auto.o \
|
||||
todc_time.o
|
||||
obj-$(CONFIG_8260) += m8260_setup.o
|
||||
obj-$(CONFIG_PCI_8260) += m8260_pci.o indirect_pci.o
|
||||
obj-$(CONFIG_PCI_8260) += m82xx_pci.o indirect_pci.o pci_auto.o
|
||||
obj-$(CONFIG_8260_PCI9) += m8260_pci_erratum9.o
|
||||
obj-$(CONFIG_CPM2) += cpm2_common.o cpm2_pic.o
|
||||
ifeq ($(CONFIG_PPC_GEN550),y)
|
||||
|
@ -97,7 +97,7 @@ obj-$(CONFIG_MPC10X_OPENPIC) += open_pic.o
|
|||
obj-$(CONFIG_40x) += dcr.o
|
||||
obj-$(CONFIG_BOOKE) += dcr.o
|
||||
obj-$(CONFIG_85xx) += open_pic.o ppc85xx_common.o ppc85xx_setup.o \
|
||||
ppc_sys.o mpc85xx_sys.o \
|
||||
ppc_sys.o i8259.o mpc85xx_sys.o \
|
||||
mpc85xx_devices.o
|
||||
ifeq ($(CONFIG_85xx),y)
|
||||
obj-$(CONFIG_PCI) += indirect_pci.o pci_auto.o
|
||||
|
|
|
@ -1,193 +0,0 @@
|
|||
/*
|
||||
* (C) Copyright 2003
|
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
*
|
||||
* (C) Copyright 2004 Red Hat, Inc.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/delay.h>
|
||||
|
||||
#include <asm/byteorder.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/uaccess.h>
|
||||
#include <asm/machdep.h>
|
||||
#include <asm/pci-bridge.h>
|
||||
#include <asm/immap_cpm2.h>
|
||||
#include <asm/mpc8260.h>
|
||||
|
||||
#include "m8260_pci.h"
|
||||
|
||||
|
||||
/* PCI bus configuration registers.
|
||||
*/
|
||||
|
||||
static void __init m8260_setup_pci(struct pci_controller *hose)
|
||||
{
|
||||
volatile cpm2_map_t *immap = cpm2_immr;
|
||||
unsigned long pocmr;
|
||||
u16 tempShort;
|
||||
|
||||
#ifndef CONFIG_ATC /* already done in U-Boot */
|
||||
/*
|
||||
* Setting required to enable IRQ1-IRQ7 (SIUMCR [DPPC]),
|
||||
* and local bus for PCI (SIUMCR [LBPC]).
|
||||
*/
|
||||
immap->im_siu_conf.siu_82xx.sc_siumcr = 0x00640000;
|
||||
#endif
|
||||
|
||||
/* Make PCI lowest priority */
|
||||
/* Each 4 bits is a device bus request and the MS 4bits
|
||||
is highest priority */
|
||||
/* Bus 4bit value
|
||||
--- ----------
|
||||
CPM high 0b0000
|
||||
CPM middle 0b0001
|
||||
CPM low 0b0010
|
||||
PCI reguest 0b0011
|
||||
Reserved 0b0100
|
||||
Reserved 0b0101
|
||||
Internal Core 0b0110
|
||||
External Master 1 0b0111
|
||||
External Master 2 0b1000
|
||||
External Master 3 0b1001
|
||||
The rest are reserved */
|
||||
immap->im_siu_conf.siu_82xx.sc_ppc_alrh = 0x61207893;
|
||||
|
||||
/* Park bus on core while modifying PCI Bus accesses */
|
||||
immap->im_siu_conf.siu_82xx.sc_ppc_acr = 0x6;
|
||||
|
||||
/*
|
||||
* Set up master window that allows the CPU to access PCI space. This
|
||||
* window is set up using the first SIU PCIBR registers.
|
||||
*/
|
||||
immap->im_memctl.memc_pcimsk0 = MPC826x_PCI_MASK;
|
||||
immap->im_memctl.memc_pcibr0 = MPC826x_PCI_BASE | PCIBR_ENABLE;
|
||||
|
||||
/* Disable machine check on no response or target abort */
|
||||
immap->im_pci.pci_emr = cpu_to_le32(0x1fe7);
|
||||
/* Release PCI RST (by default the PCI RST signal is held low) */
|
||||
immap->im_pci.pci_gcr = cpu_to_le32(PCIGCR_PCI_BUS_EN);
|
||||
|
||||
/* give it some time */
|
||||
mdelay(1);
|
||||
|
||||
/*
|
||||
* Set up master window that allows the CPU to access PCI Memory (prefetch)
|
||||
* space. This window is set up using the first set of Outbound ATU registers.
|
||||
*/
|
||||
immap->im_pci.pci_potar0 = cpu_to_le32(MPC826x_PCI_LOWER_MEM >> 12);
|
||||
immap->im_pci.pci_pobar0 = cpu_to_le32((MPC826x_PCI_LOWER_MEM - MPC826x_PCI_MEM_OFFSET) >> 12);
|
||||
pocmr = ((MPC826x_PCI_UPPER_MEM - MPC826x_PCI_LOWER_MEM) >> 12) ^ 0xfffff;
|
||||
immap->im_pci.pci_pocmr0 = cpu_to_le32(pocmr | POCMR_ENABLE | POCMR_PREFETCH_EN);
|
||||
|
||||
/*
|
||||
* Set up master window that allows the CPU to access PCI Memory (non-prefetch)
|
||||
* space. This window is set up using the second set of Outbound ATU registers.
|
||||
*/
|
||||
immap->im_pci.pci_potar1 = cpu_to_le32(MPC826x_PCI_LOWER_MMIO >> 12);
|
||||
immap->im_pci.pci_pobar1 = cpu_to_le32((MPC826x_PCI_LOWER_MMIO - MPC826x_PCI_MMIO_OFFSET) >> 12);
|
||||
pocmr = ((MPC826x_PCI_UPPER_MMIO - MPC826x_PCI_LOWER_MMIO) >> 12) ^ 0xfffff;
|
||||
immap->im_pci.pci_pocmr1 = cpu_to_le32(pocmr | POCMR_ENABLE);
|
||||
|
||||
/*
|
||||
* Set up master window that allows the CPU to access PCI IO space. This window
|
||||
* is set up using the third set of Outbound ATU registers.
|
||||
*/
|
||||
immap->im_pci.pci_potar2 = cpu_to_le32(MPC826x_PCI_IO_BASE >> 12);
|
||||
immap->im_pci.pci_pobar2 = cpu_to_le32(MPC826x_PCI_LOWER_IO >> 12);
|
||||
pocmr = ((MPC826x_PCI_UPPER_IO - MPC826x_PCI_LOWER_IO) >> 12) ^ 0xfffff;
|
||||
immap->im_pci.pci_pocmr2 = cpu_to_le32(pocmr | POCMR_ENABLE | POCMR_PCI_IO);
|
||||
|
||||
/*
|
||||
* Set up slave window that allows PCI masters to access MPC826x local memory.
|
||||
* This window is set up using the first set of Inbound ATU registers
|
||||
*/
|
||||
|
||||
immap->im_pci.pci_pitar0 = cpu_to_le32(MPC826x_PCI_SLAVE_MEM_LOCAL >> 12);
|
||||
immap->im_pci.pci_pibar0 = cpu_to_le32(MPC826x_PCI_SLAVE_MEM_BUS >> 12);
|
||||
pocmr = ((MPC826x_PCI_SLAVE_MEM_SIZE-1) >> 12) ^ 0xfffff;
|
||||
immap->im_pci.pci_picmr0 = cpu_to_le32(pocmr | PICMR_ENABLE | PICMR_PREFETCH_EN);
|
||||
|
||||
/* See above for description - puts PCI request as highest priority */
|
||||
immap->im_siu_conf.siu_82xx.sc_ppc_alrh = 0x03124567;
|
||||
|
||||
/* Park the bus on the PCI */
|
||||
immap->im_siu_conf.siu_82xx.sc_ppc_acr = PPC_ACR_BUS_PARK_PCI;
|
||||
|
||||
/* Host mode - specify the bridge as a host-PCI bridge */
|
||||
early_write_config_word(hose, 0, 0, PCI_CLASS_DEVICE, PCI_CLASS_BRIDGE_HOST);
|
||||
|
||||
/* Enable the host bridge to be a master on the PCI bus, and to act as a PCI memory target */
|
||||
early_read_config_word(hose, 0, 0, PCI_COMMAND, &tempShort);
|
||||
early_write_config_word(hose, 0, 0, PCI_COMMAND,
|
||||
tempShort | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
|
||||
}
|
||||
|
||||
void __init m8260_find_bridges(void)
|
||||
{
|
||||
extern int pci_assign_all_busses;
|
||||
struct pci_controller * hose;
|
||||
|
||||
pci_assign_all_busses = 1;
|
||||
|
||||
hose = pcibios_alloc_controller();
|
||||
|
||||
if (!hose)
|
||||
return;
|
||||
|
||||
ppc_md.pci_swizzle = common_swizzle;
|
||||
|
||||
hose->first_busno = 0;
|
||||
hose->bus_offset = 0;
|
||||
hose->last_busno = 0xff;
|
||||
|
||||
setup_m8260_indirect_pci(hose,
|
||||
(unsigned long)&cpm2_immr->im_pci.pci_cfg_addr,
|
||||
(unsigned long)&cpm2_immr->im_pci.pci_cfg_data);
|
||||
|
||||
m8260_setup_pci(hose);
|
||||
hose->pci_mem_offset = MPC826x_PCI_MEM_OFFSET;
|
||||
|
||||
hose->io_base_virt = ioremap(MPC826x_PCI_IO_BASE,
|
||||
MPC826x_PCI_IO_SIZE);
|
||||
isa_io_base = (unsigned long) hose->io_base_virt;
|
||||
|
||||
/* setup resources */
|
||||
pci_init_resource(&hose->mem_resources[0],
|
||||
MPC826x_PCI_LOWER_MEM,
|
||||
MPC826x_PCI_UPPER_MEM,
|
||||
IORESOURCE_MEM|IORESOURCE_PREFETCH, "PCI prefetchable memory");
|
||||
|
||||
pci_init_resource(&hose->mem_resources[1],
|
||||
MPC826x_PCI_LOWER_MMIO,
|
||||
MPC826x_PCI_UPPER_MMIO,
|
||||
IORESOURCE_MEM, "PCI memory");
|
||||
|
||||
pci_init_resource(&hose->io_resource,
|
||||
MPC826x_PCI_LOWER_IO,
|
||||
MPC826x_PCI_UPPER_IO,
|
||||
IORESOURCE_IO, "PCI I/O");
|
||||
}
|
|
@ -1,76 +0,0 @@
|
|||
|
||||
#ifndef _PPC_KERNEL_M8260_PCI_H
|
||||
#define _PPC_KERNEL_M8260_PCI_H
|
||||
|
||||
#include <asm/m8260_pci.h>
|
||||
|
||||
/*
|
||||
* Local->PCI map (from CPU) controlled by
|
||||
* MPC826x master window
|
||||
*
|
||||
* 0x80000000 - 0xBFFFFFFF Total CPU2PCI space PCIBR0
|
||||
*
|
||||
* 0x80000000 - 0x9FFFFFFF PCI Mem with prefetch (Outbound ATU #1)
|
||||
* 0xA0000000 - 0xAFFFFFFF PCI Mem w/o prefetch (Outbound ATU #2)
|
||||
* 0xB0000000 - 0xB0FFFFFF 32-bit PCI IO (Outbound ATU #3)
|
||||
*
|
||||
* PCI->Local map (from PCI)
|
||||
* MPC826x slave window controlled by
|
||||
*
|
||||
* 0x00000000 - 0x07FFFFFF MPC826x local memory (Inbound ATU #1)
|
||||
*/
|
||||
|
||||
/*
|
||||
* Slave window that allows PCI masters to access MPC826x local memory.
|
||||
* This window is set up using the first set of Inbound ATU registers
|
||||
*/
|
||||
|
||||
#ifndef MPC826x_PCI_SLAVE_MEM_LOCAL
|
||||
#define MPC826x_PCI_SLAVE_MEM_LOCAL (((struct bd_info *)__res)->bi_memstart)
|
||||
#define MPC826x_PCI_SLAVE_MEM_BUS (((struct bd_info *)__res)->bi_memstart)
|
||||
#define MPC826x_PCI_SLAVE_MEM_SIZE (((struct bd_info *)__res)->bi_memsize)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* This is the window that allows the CPU to access PCI address space.
|
||||
* It will be setup with the SIU PCIBR0 register. All three PCI master
|
||||
* windows, which allow the CPU to access PCI prefetch, non prefetch,
|
||||
* and IO space (see below), must all fit within this window.
|
||||
*/
|
||||
#ifndef MPC826x_PCI_BASE
|
||||
#define MPC826x_PCI_BASE 0x80000000
|
||||
#define MPC826x_PCI_MASK 0xc0000000
|
||||
#endif
|
||||
|
||||
#ifndef MPC826x_PCI_LOWER_MEM
|
||||
#define MPC826x_PCI_LOWER_MEM 0x80000000
|
||||
#define MPC826x_PCI_UPPER_MEM 0x9fffffff
|
||||
#define MPC826x_PCI_MEM_OFFSET 0x00000000
|
||||
#endif
|
||||
|
||||
#ifndef MPC826x_PCI_LOWER_MMIO
|
||||
#define MPC826x_PCI_LOWER_MMIO 0xa0000000
|
||||
#define MPC826x_PCI_UPPER_MMIO 0xafffffff
|
||||
#define MPC826x_PCI_MMIO_OFFSET 0x00000000
|
||||
#endif
|
||||
|
||||
#ifndef MPC826x_PCI_LOWER_IO
|
||||
#define MPC826x_PCI_LOWER_IO 0x00000000
|
||||
#define MPC826x_PCI_UPPER_IO 0x00ffffff
|
||||
#define MPC826x_PCI_IO_BASE 0xb0000000
|
||||
#define MPC826x_PCI_IO_SIZE 0x01000000
|
||||
#endif
|
||||
|
||||
#ifndef _IO_BASE
|
||||
#define _IO_BASE isa_io_base
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_8260_PCI9
|
||||
struct pci_controller;
|
||||
extern void setup_m8260_indirect_pci(struct pci_controller* hose,
|
||||
u32 cfg_addr, u32 cfg_data);
|
||||
#else
|
||||
#define setup_m8260_indirect_pci setup_indirect_pci
|
||||
#endif
|
||||
|
||||
#endif /* _PPC_KERNEL_M8260_PCI_H */
|
|
@ -31,7 +31,7 @@
|
|||
#include <asm/immap_cpm2.h>
|
||||
#include <asm/cpm2.h>
|
||||
|
||||
#include "m8260_pci.h"
|
||||
#include "m82xx_pci.h"
|
||||
|
||||
#ifdef CONFIG_8260_PCI9
|
||||
/*#include <asm/mpc8260_pci9.h>*/ /* included in asm/io.h */
|
||||
|
@ -248,11 +248,11 @@ EXPORT_SYMBOL(idma_pci9_read_le);
|
|||
|
||||
static inline int is_pci_mem(unsigned long addr)
|
||||
{
|
||||
if (addr >= MPC826x_PCI_LOWER_MMIO &&
|
||||
addr <= MPC826x_PCI_UPPER_MMIO)
|
||||
if (addr >= M82xx_PCI_LOWER_MMIO &&
|
||||
addr <= M82xx_PCI_UPPER_MMIO)
|
||||
return 1;
|
||||
if (addr >= MPC826x_PCI_LOWER_MEM &&
|
||||
addr <= MPC826x_PCI_UPPER_MEM)
|
||||
if (addr >= M82xx_PCI_LOWER_MEM &&
|
||||
addr <= M82xx_PCI_UPPER_MEM)
|
||||
return 1;
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -34,7 +34,8 @@
|
|||
unsigned char __res[sizeof(bd_t)];
|
||||
|
||||
extern void cpm2_reset(void);
|
||||
extern void m8260_find_bridges(void);
|
||||
extern void pq2_find_bridges(void);
|
||||
extern void pq2pci_init_irq(void);
|
||||
extern void idma_pci9_init(void);
|
||||
|
||||
/* Place-holder for board-specific init */
|
||||
|
@ -56,7 +57,7 @@ m8260_setup_arch(void)
|
|||
idma_pci9_init();
|
||||
#endif
|
||||
#ifdef CONFIG_PCI_8260
|
||||
m8260_find_bridges();
|
||||
pq2_find_bridges();
|
||||
#endif
|
||||
#ifdef CONFIG_BLK_DEV_INITRD
|
||||
if (initrd_start)
|
||||
|
@ -173,6 +174,12 @@ m8260_init_IRQ(void)
|
|||
* in case the boot rom changed something on us.
|
||||
*/
|
||||
cpm2_immr->im_intctl.ic_siprr = 0x05309770;
|
||||
|
||||
#if defined(CONFIG_PCI) && (defined(CONFIG_ADS8272) || defined(CONFIG_PQ2FADS))
|
||||
/* Initialize stuff for the 82xx CPLD IC and install demux */
|
||||
pq2pci_init_irq();
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
383
arch/ppc/syslib/m82xx_pci.c
Normal file
383
arch/ppc/syslib/m82xx_pci.c
Normal file
|
@ -0,0 +1,383 @@
|
|||
/*
|
||||
*
|
||||
* (C) Copyright 2003
|
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
*
|
||||
* (C) Copyright 2004 Red Hat, Inc.
|
||||
*
|
||||
* 2005 (c) MontaVista Software, Inc.
|
||||
* Vitaly Bordug <vbordug@ru.mvista.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/interrupt.h>
|
||||
|
||||
#include <asm/byteorder.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/uaccess.h>
|
||||
#include <asm/machdep.h>
|
||||
#include <asm/pci-bridge.h>
|
||||
#include <asm/immap_cpm2.h>
|
||||
#include <asm/mpc8260.h>
|
||||
#include <asm/cpm2.h>
|
||||
|
||||
#include "m82xx_pci.h"
|
||||
|
||||
/*
|
||||
* Interrupt routing
|
||||
*/
|
||||
|
||||
static inline int
|
||||
pq2pci_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
|
||||
{
|
||||
static char pci_irq_table[][4] =
|
||||
/*
|
||||
* PCI IDSEL/INTPIN->INTLINE
|
||||
* A B C D
|
||||
*/
|
||||
{
|
||||
{ PIRQA, PIRQB, PIRQC, PIRQD }, /* IDSEL 22 - PCI slot 0 */
|
||||
{ PIRQD, PIRQA, PIRQB, PIRQC }, /* IDSEL 23 - PCI slot 1 */
|
||||
{ PIRQC, PIRQD, PIRQA, PIRQB }, /* IDSEL 24 - PCI slot 2 */
|
||||
};
|
||||
|
||||
const long min_idsel = 22, max_idsel = 24, irqs_per_slot = 4;
|
||||
return PCI_IRQ_TABLE_LOOKUP;
|
||||
}
|
||||
|
||||
static void
|
||||
pq2pci_mask_irq(unsigned int irq)
|
||||
{
|
||||
int bit = irq - NR_CPM_INTS;
|
||||
|
||||
*(volatile unsigned long *) PCI_INT_MASK_REG |= (1 << (31 - bit));
|
||||
return;
|
||||
}
|
||||
|
||||
static void
|
||||
pq2pci_unmask_irq(unsigned int irq)
|
||||
{
|
||||
int bit = irq - NR_CPM_INTS;
|
||||
|
||||
*(volatile unsigned long *) PCI_INT_MASK_REG &= ~(1 << (31 - bit));
|
||||
return;
|
||||
}
|
||||
|
||||
static void
|
||||
pq2pci_mask_and_ack(unsigned int irq)
|
||||
{
|
||||
int bit = irq - NR_CPM_INTS;
|
||||
|
||||
*(volatile unsigned long *) PCI_INT_MASK_REG |= (1 << (31 - bit));
|
||||
return;
|
||||
}
|
||||
|
||||
static void
|
||||
pq2pci_end_irq(unsigned int irq)
|
||||
{
|
||||
int bit = irq - NR_CPM_INTS;
|
||||
|
||||
*(volatile unsigned long *) PCI_INT_MASK_REG &= ~(1 << (31 - bit));
|
||||
return;
|
||||
}
|
||||
|
||||
struct hw_interrupt_type pq2pci_ic = {
|
||||
"PQ2 PCI",
|
||||
NULL,
|
||||
NULL,
|
||||
pq2pci_unmask_irq,
|
||||
pq2pci_mask_irq,
|
||||
pq2pci_mask_and_ack,
|
||||
pq2pci_end_irq,
|
||||
0
|
||||
};
|
||||
|
||||
static irqreturn_t
|
||||
pq2pci_irq_demux(int irq, void *dev_id, struct pt_regs *regs)
|
||||
{
|
||||
unsigned long stat, mask, pend;
|
||||
int bit;
|
||||
|
||||
for(;;) {
|
||||
stat = *(volatile unsigned long *) PCI_INT_STAT_REG;
|
||||
mask = *(volatile unsigned long *) PCI_INT_MASK_REG;
|
||||
pend = stat & ~mask & 0xf0000000;
|
||||
if (!pend)
|
||||
break;
|
||||
for (bit = 0; pend != 0; ++bit, pend <<= 1) {
|
||||
if (pend & 0x80000000)
|
||||
__do_IRQ(NR_CPM_INTS + bit, regs);
|
||||
}
|
||||
}
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static struct irqaction pq2pci_irqaction = {
|
||||
.handler = pq2pci_irq_demux,
|
||||
.flags = SA_INTERRUPT,
|
||||
.mask = CPU_MASK_NONE,
|
||||
.name = "PQ2 PCI cascade",
|
||||
};
|
||||
|
||||
|
||||
void
|
||||
pq2pci_init_irq(void)
|
||||
{
|
||||
int irq;
|
||||
volatile cpm2_map_t *immap = cpm2_immr;
|
||||
#if defined CONFIG_ADS8272
|
||||
/* configure chip select for PCI interrupt controller */
|
||||
immap->im_memctl.memc_br3 = PCI_INT_STAT_REG | 0x00001801;
|
||||
immap->im_memctl.memc_or3 = 0xffff8010;
|
||||
#elif defined CONFIG_PQ2FADS
|
||||
immap->im_memctl.memc_br8 = PCI_INT_STAT_REG | 0x00001801;
|
||||
immap->im_memctl.memc_or8 = 0xffff8010;
|
||||
#endif
|
||||
for (irq = NR_CPM_INTS; irq < NR_CPM_INTS + 4; irq++)
|
||||
irq_desc[irq].handler = &pq2pci_ic;
|
||||
|
||||
/* make PCI IRQ level sensitive */
|
||||
immap->im_intctl.ic_siexr &=
|
||||
~(1 << (14 - (PCI_INT_TO_SIU - SIU_INT_IRQ1)));
|
||||
|
||||
/* mask all PCI interrupts */
|
||||
*(volatile unsigned long *) PCI_INT_MASK_REG |= 0xfff00000;
|
||||
|
||||
/* install the demultiplexer for the PCI cascade interrupt */
|
||||
setup_irq(PCI_INT_TO_SIU, &pq2pci_irqaction);
|
||||
return;
|
||||
}
|
||||
|
||||
static int
|
||||
pq2pci_exclude_device(u_char bus, u_char devfn)
|
||||
{
|
||||
return PCIBIOS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
/* PCI bus configuration registers.
|
||||
*/
|
||||
static void
|
||||
pq2ads_setup_pci(struct pci_controller *hose)
|
||||
{
|
||||
__u32 val;
|
||||
volatile cpm2_map_t *immap = cpm2_immr;
|
||||
bd_t* binfo = (bd_t*) __res;
|
||||
u32 sccr = immap->im_clkrst.car_sccr;
|
||||
uint pci_div,freq,time;
|
||||
/* PCI int lowest prio */
|
||||
/* Each 4 bits is a device bus request and the MS 4bits
|
||||
is highest priority */
|
||||
/* Bus 4bit value
|
||||
--- ----------
|
||||
CPM high 0b0000
|
||||
CPM middle 0b0001
|
||||
CPM low 0b0010
|
||||
PCI reguest 0b0011
|
||||
Reserved 0b0100
|
||||
Reserved 0b0101
|
||||
Internal Core 0b0110
|
||||
External Master 1 0b0111
|
||||
External Master 2 0b1000
|
||||
External Master 3 0b1001
|
||||
The rest are reserved
|
||||
*/
|
||||
immap->im_siu_conf.siu_82xx.sc_ppc_alrh = 0x61207893;
|
||||
/* park bus on core */
|
||||
immap->im_siu_conf.siu_82xx.sc_ppc_acr = PPC_ACR_BUS_PARK_CORE;
|
||||
/*
|
||||
* Set up master windows that allow the CPU to access PCI space. These
|
||||
* windows are set up using the two SIU PCIBR registers.
|
||||
*/
|
||||
|
||||
immap->im_memctl.memc_pcimsk0 = M82xx_PCI_PRIM_WND_SIZE;
|
||||
immap->im_memctl.memc_pcibr0 = M82xx_PCI_PRIM_WND_BASE | PCIBR_ENABLE;
|
||||
|
||||
#ifdef M82xx_PCI_SEC_WND_SIZE
|
||||
immap->im_memctl.memc_pcimsk1 = M82xx_PCI_SEC_WND_SIZE;
|
||||
immap->im_memctl.memc_pcibr1 = M82xx_PCI_SEC_WND_BASE | PCIBR_ENABLE;
|
||||
#endif
|
||||
|
||||
#if defined CONFIG_ADS8272
|
||||
immap->im_siu_conf.siu_82xx.sc_siumcr =
|
||||
(immap->im_siu_conf.siu_82xx.sc_siumcr &
|
||||
~(SIUMCR_BBD | SIUMCR_ESE | SIUMCR_PBSE |
|
||||
SIUMCR_CDIS | SIUMCR_DPPC11 | SIUMCR_L2CPC11 |
|
||||
SIUMCR_LBPC11 | SIUMCR_APPC11 |
|
||||
SIUMCR_CS10PC11 | SIUMCR_BCTLC11 | SIUMCR_MMR11)) |
|
||||
SIUMCR_DPPC11 | SIUMCR_L2CPC01 | SIUMCR_LBPC00 |
|
||||
SIUMCR_APPC10 | SIUMCR_CS10PC00 |
|
||||
SIUMCR_BCTLC00 | SIUMCR_MMR11 ;
|
||||
|
||||
#elif defined CONFIG_PQ2FADS
|
||||
/*
|
||||
* Setting required to enable IRQ1-IRQ7 (SIUMCR [DPPC]),
|
||||
* and local bus for PCI (SIUMCR [LBPC]).
|
||||
*/
|
||||
immap->im_siu_conf.siu_82xx.sc_siumcr = (immap->im_siu_conf.sc_siumcr &
|
||||
~(SIUMCR_L2PC11 | SIUMCR_LBPC11 | SIUMCR_CS10PC11 | SIUMCR_APPC11) |
|
||||
SIUMCR_BBD | SIUMCR_LBPC01 | SIUMCR_DPPC11 | SIUMCR_APPC10;
|
||||
#endif
|
||||
/* Enable PCI */
|
||||
immap->im_pci.pci_gcr = cpu_to_le32(PCIGCR_PCI_BUS_EN);
|
||||
|
||||
pci_div = ( (sccr & SCCR_PCI_MODCK) ? 2 : 1) *
|
||||
( ( (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT) + 1);
|
||||
freq = (uint)((2*binfo->bi_cpmfreq)/(pci_div));
|
||||
time = (int)666666/freq;
|
||||
/* due to PCI Local Bus spec, some devices needs to wait such a long
|
||||
time after RST deassertion. More specifically, 0.508s for 66MHz & twice more for 33 */
|
||||
printk("%s: The PCI bus is %d Mhz.\nWaiting %s after deasserting RST...\n",__FILE__,freq,
|
||||
(time==1) ? "0.5 seconds":"1 second" );
|
||||
|
||||
{
|
||||
int i;
|
||||
for(i=0;i<(500*time);i++)
|
||||
udelay(1000);
|
||||
}
|
||||
|
||||
/* setup ATU registers */
|
||||
immap->im_pci.pci_pocmr0 = cpu_to_le32(POCMR_ENABLE | POCMR_PCI_IO |
|
||||
((~(M82xx_PCI_IO_SIZE - 1U)) >> POTA_ADDR_SHIFT));
|
||||
immap->im_pci.pci_potar0 = cpu_to_le32(M82xx_PCI_LOWER_IO >> POTA_ADDR_SHIFT);
|
||||
immap->im_pci.pci_pobar0 = cpu_to_le32(M82xx_PCI_IO_BASE >> POTA_ADDR_SHIFT);
|
||||
|
||||
/* Set-up non-prefetchable window */
|
||||
immap->im_pci.pci_pocmr1 = cpu_to_le32(POCMR_ENABLE | ((~(M82xx_PCI_MMIO_SIZE-1U)) >> POTA_ADDR_SHIFT));
|
||||
immap->im_pci.pci_potar1 = cpu_to_le32(M82xx_PCI_LOWER_MMIO >> POTA_ADDR_SHIFT);
|
||||
immap->im_pci.pci_pobar1 = cpu_to_le32((M82xx_PCI_LOWER_MMIO - M82xx_PCI_MMIO_OFFSET) >> POTA_ADDR_SHIFT);
|
||||
|
||||
/* Set-up prefetchable window */
|
||||
immap->im_pci.pci_pocmr2 = cpu_to_le32(POCMR_ENABLE |POCMR_PREFETCH_EN |
|
||||
(~(M82xx_PCI_MEM_SIZE-1U) >> POTA_ADDR_SHIFT));
|
||||
immap->im_pci.pci_potar2 = cpu_to_le32(M82xx_PCI_LOWER_MEM >> POTA_ADDR_SHIFT);
|
||||
immap->im_pci.pci_pobar2 = cpu_to_le32((M82xx_PCI_LOWER_MEM - M82xx_PCI_MEM_OFFSET) >> POTA_ADDR_SHIFT);
|
||||
|
||||
/* Inbound transactions from PCI memory space */
|
||||
immap->im_pci.pci_picmr0 = cpu_to_le32(PICMR_ENABLE | PICMR_PREFETCH_EN |
|
||||
((~(M82xx_PCI_SLAVE_MEM_SIZE-1U)) >> PITA_ADDR_SHIFT));
|
||||
immap->im_pci.pci_pibar0 = cpu_to_le32(M82xx_PCI_SLAVE_MEM_BUS >> PITA_ADDR_SHIFT);
|
||||
immap->im_pci.pci_pitar0 = cpu_to_le32(M82xx_PCI_SLAVE_MEM_LOCAL>> PITA_ADDR_SHIFT);
|
||||
|
||||
#if defined CONFIG_ADS8272
|
||||
/* PCI int highest prio */
|
||||
immap->im_siu_conf.siu_82xx.sc_ppc_alrh = 0x01236745;
|
||||
#elif defined CONFIG_PQ2FADS
|
||||
immap->im_siu_conf.siu_82xx.sc_ppc_alrh = 0x03124567;
|
||||
#endif
|
||||
/* park bus on PCI */
|
||||
immap->im_siu_conf.siu_82xx.sc_ppc_acr = PPC_ACR_BUS_PARK_PCI;
|
||||
|
||||
/* Enable bus mastering and inbound memory transactions */
|
||||
early_read_config_dword(hose, hose->first_busno, 0, PCI_COMMAND, &val);
|
||||
val &= 0xffff0000;
|
||||
val |= PCI_COMMAND_MEMORY|PCI_COMMAND_MASTER;
|
||||
early_write_config_dword(hose, hose->first_busno, 0, PCI_COMMAND, val);
|
||||
|
||||
}
|
||||
|
||||
void __init pq2_find_bridges(void)
|
||||
{
|
||||
extern int pci_assign_all_busses;
|
||||
struct pci_controller * hose;
|
||||
int host_bridge;
|
||||
|
||||
pci_assign_all_busses = 1;
|
||||
|
||||
hose = pcibios_alloc_controller();
|
||||
|
||||
if (!hose)
|
||||
return;
|
||||
|
||||
ppc_md.pci_swizzle = common_swizzle;
|
||||
|
||||
hose->first_busno = 0;
|
||||
hose->bus_offset = 0;
|
||||
hose->last_busno = 0xff;
|
||||
|
||||
#ifdef CONFIG_ADS8272
|
||||
hose->set_cfg_type = 1;
|
||||
#endif
|
||||
|
||||
setup_m8260_indirect_pci(hose,
|
||||
(unsigned long)&cpm2_immr->im_pci.pci_cfg_addr,
|
||||
(unsigned long)&cpm2_immr->im_pci.pci_cfg_data);
|
||||
|
||||
/* Make sure it is a supported bridge */
|
||||
early_read_config_dword(hose,
|
||||
0,
|
||||
PCI_DEVFN(0,0),
|
||||
PCI_VENDOR_ID,
|
||||
&host_bridge);
|
||||
switch (host_bridge) {
|
||||
case PCI_DEVICE_ID_MPC8265:
|
||||
break;
|
||||
case PCI_DEVICE_ID_MPC8272:
|
||||
break;
|
||||
default:
|
||||
printk("Attempting to use unrecognized host bridge ID"
|
||||
" 0x%08x.\n", host_bridge);
|
||||
break;
|
||||
}
|
||||
|
||||
pq2ads_setup_pci(hose);
|
||||
|
||||
hose->io_space.start = M82xx_PCI_LOWER_IO;
|
||||
hose->io_space.end = M82xx_PCI_UPPER_IO;
|
||||
hose->mem_space.start = M82xx_PCI_LOWER_MEM;
|
||||
hose->mem_space.end = M82xx_PCI_UPPER_MMIO;
|
||||
hose->pci_mem_offset = M82xx_PCI_MEM_OFFSET;
|
||||
|
||||
isa_io_base =
|
||||
(unsigned long) ioremap(M82xx_PCI_IO_BASE,
|
||||
M82xx_PCI_IO_SIZE);
|
||||
hose->io_base_virt = (void *) isa_io_base;
|
||||
|
||||
/* setup resources */
|
||||
pci_init_resource(&hose->mem_resources[0],
|
||||
M82xx_PCI_LOWER_MEM,
|
||||
M82xx_PCI_UPPER_MEM,
|
||||
IORESOURCE_MEM|IORESOURCE_PREFETCH, "PCI prefetchable memory");
|
||||
|
||||
pci_init_resource(&hose->mem_resources[1],
|
||||
M82xx_PCI_LOWER_MMIO,
|
||||
M82xx_PCI_UPPER_MMIO,
|
||||
IORESOURCE_MEM, "PCI memory");
|
||||
|
||||
pci_init_resource(&hose->io_resource,
|
||||
M82xx_PCI_LOWER_IO,
|
||||
M82xx_PCI_UPPER_IO,
|
||||
IORESOURCE_IO | 1, "PCI I/O");
|
||||
|
||||
ppc_md.pci_exclude_device = pq2pci_exclude_device;
|
||||
hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
|
||||
|
||||
ppc_md.pci_map_irq = pq2pci_map_irq;
|
||||
ppc_md.pcibios_fixup = NULL;
|
||||
ppc_md.pcibios_fixup_bus = NULL;
|
||||
|
||||
}
|
92
arch/ppc/syslib/m82xx_pci.h
Normal file
92
arch/ppc/syslib/m82xx_pci.h
Normal file
|
@ -0,0 +1,92 @@
|
|||
|
||||
#ifndef _PPC_KERNEL_M82XX_PCI_H
|
||||
#define _PPC_KERNEL_M82XX_PCI_H
|
||||
|
||||
#include <asm/m8260_pci.h>
|
||||
/*
|
||||
* Local->PCI map (from CPU) controlled by
|
||||
* MPC826x master window
|
||||
*
|
||||
* 0xF6000000 - 0xF7FFFFFF IO space
|
||||
* 0x80000000 - 0xBFFFFFFF CPU2PCI memory space PCIBR0
|
||||
*
|
||||
* 0x80000000 - 0x9FFFFFFF PCI Mem with prefetch (Outbound ATU #1)
|
||||
* 0xA0000000 - 0xBFFFFFFF PCI Mem w/o prefetch (Outbound ATU #2)
|
||||
* 0xF6000000 - 0xF7FFFFFF 32-bit PCI IO (Outbound ATU #3)
|
||||
*
|
||||
* PCI->Local map (from PCI)
|
||||
* MPC826x slave window controlled by
|
||||
*
|
||||
* 0x00000000 - 0x07FFFFFF MPC826x local memory (Inbound ATU #1)
|
||||
*/
|
||||
|
||||
/*
|
||||
* Slave window that allows PCI masters to access MPC826x local memory.
|
||||
* This window is set up using the first set of Inbound ATU registers
|
||||
*/
|
||||
|
||||
#ifndef M82xx_PCI_SLAVE_MEM_LOCAL
|
||||
#define M82xx_PCI_SLAVE_MEM_LOCAL (((struct bd_info *)__res)->bi_memstart)
|
||||
#define M82xx_PCI_SLAVE_MEM_BUS (((struct bd_info *)__res)->bi_memstart)
|
||||
#define M82xx_PCI_SLAVE_MEM_SIZE (((struct bd_info *)__res)->bi_memsize)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* This is the window that allows the CPU to access PCI address space.
|
||||
* It will be setup with the SIU PCIBR0 register. All three PCI master
|
||||
* windows, which allow the CPU to access PCI prefetch, non prefetch,
|
||||
* and IO space (see below), must all fit within this window.
|
||||
*/
|
||||
|
||||
#ifndef M82xx_PCI_LOWER_MEM
|
||||
#define M82xx_PCI_LOWER_MEM 0x80000000
|
||||
#define M82xx_PCI_UPPER_MEM 0x9fffffff
|
||||
#define M82xx_PCI_MEM_OFFSET 0x00000000
|
||||
#define M82xx_PCI_MEM_SIZE 0x20000000
|
||||
#endif
|
||||
|
||||
#ifndef M82xx_PCI_LOWER_MMIO
|
||||
#define M82xx_PCI_LOWER_MMIO 0xa0000000
|
||||
#define M82xx_PCI_UPPER_MMIO 0xafffffff
|
||||
#define M82xx_PCI_MMIO_OFFSET 0x00000000
|
||||
#define M82xx_PCI_MMIO_SIZE 0x20000000
|
||||
#endif
|
||||
|
||||
#ifndef M82xx_PCI_LOWER_IO
|
||||
#define M82xx_PCI_LOWER_IO 0x00000000
|
||||
#define M82xx_PCI_UPPER_IO 0x01ffffff
|
||||
#define M82xx_PCI_IO_BASE 0xf6000000
|
||||
#define M82xx_PCI_IO_SIZE 0x02000000
|
||||
#endif
|
||||
|
||||
#ifndef M82xx_PCI_PRIM_WND_SIZE
|
||||
#define M82xx_PCI_PRIM_WND_SIZE ~(M82xx_PCI_IO_SIZE - 1U)
|
||||
#define M82xx_PCI_PRIM_WND_BASE (M82xx_PCI_IO_BASE)
|
||||
#endif
|
||||
|
||||
#ifndef M82xx_PCI_SEC_WND_SIZE
|
||||
#define M82xx_PCI_SEC_WND_SIZE ~(M82xx_PCI_MEM_SIZE + M82xx_PCI_MMIO_SIZE - 1U)
|
||||
#define M82xx_PCI_SEC_WND_BASE (M82xx_PCI_LOWER_MEM)
|
||||
#endif
|
||||
|
||||
#ifndef POTA_ADDR_SHIFT
|
||||
#define POTA_ADDR_SHIFT 12
|
||||
#endif
|
||||
|
||||
#ifndef PITA_ADDR_SHIFT
|
||||
#define PITA_ADDR_SHIFT 12
|
||||
#endif
|
||||
|
||||
#ifndef _IO_BASE
|
||||
#define _IO_BASE isa_io_base
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_8260_PCI9
|
||||
struct pci_controller;
|
||||
extern void setup_m8260_indirect_pci(struct pci_controller* hose,
|
||||
u32 cfg_addr, u32 cfg_data);
|
||||
#else
|
||||
#define setup_m8260_indirect_pci setup_indirect_pci
|
||||
#endif
|
||||
|
||||
#endif /* _PPC_KERNEL_M8260_PCI_H */
|
|
@ -275,7 +275,7 @@ static void __init openpic_enable_sie(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_EPIC_SERIAL_MODE) || defined(CONFIG_PM)
|
||||
#if defined(CONFIG_EPIC_SERIAL_MODE)
|
||||
static void openpic_reset(void)
|
||||
{
|
||||
openpic_setfield(&OpenPIC->Global.Global_Configuration0,
|
||||
|
@ -993,8 +993,6 @@ int openpic_resume(struct sys_device *sysdev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
openpic_reset();
|
||||
|
||||
/* OpenPIC sometimes seem to need some time to be fully back up... */
|
||||
do {
|
||||
openpic_set_spurious(OPENPIC_VEC_SPURIOUS);
|
||||
|
|
|
@ -29,6 +29,7 @@
|
|||
#include <asm/mmu.h>
|
||||
#include <asm/ppc_sys.h>
|
||||
#include <asm/kgdb.h>
|
||||
#include <asm/delay.h>
|
||||
|
||||
#include <syslib/ppc83xx_setup.h>
|
||||
|
||||
|
@ -117,7 +118,34 @@ mpc83xx_early_serial_map(void)
|
|||
void
|
||||
mpc83xx_restart(char *cmd)
|
||||
{
|
||||
volatile unsigned char __iomem *reg;
|
||||
unsigned char tmp;
|
||||
|
||||
reg = ioremap(BCSR_PHYS_ADDR, BCSR_SIZE);
|
||||
|
||||
local_irq_disable();
|
||||
|
||||
/*
|
||||
* Unlock the BCSR bits so a PRST will update the contents.
|
||||
* Otherwise the reset asserts but doesn't clear.
|
||||
*/
|
||||
tmp = in_8(reg + BCSR_MISC_REG3_OFF);
|
||||
tmp |= BCSR_MISC_REG3_CNFLOCK; /* low true, high false */
|
||||
out_8(reg + BCSR_MISC_REG3_OFF, tmp);
|
||||
|
||||
/*
|
||||
* Trigger a reset via a low->high transition of the
|
||||
* PORESET bit.
|
||||
*/
|
||||
tmp = in_8(reg + BCSR_MISC_REG2_OFF);
|
||||
tmp &= ~BCSR_MISC_REG2_PORESET;
|
||||
out_8(reg + BCSR_MISC_REG2_OFF, tmp);
|
||||
|
||||
udelay(1);
|
||||
|
||||
tmp |= BCSR_MISC_REG2_PORESET;
|
||||
out_8(reg + BCSR_MISC_REG2_OFF, tmp);
|
||||
|
||||
for(;;);
|
||||
}
|
||||
|
||||
|
|
|
@ -132,6 +132,12 @@ mpc85xx_halt(void)
|
|||
}
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
|
||||
#if defined(CONFIG_MPC8555_CDS)
|
||||
extern void mpc85xx_cds_enable_via(struct pci_controller *hose);
|
||||
extern void mpc85xx_cds_fixup_via(struct pci_controller *hose);
|
||||
#endif
|
||||
|
||||
static void __init
|
||||
mpc85xx_setup_pci1(struct pci_controller *hose)
|
||||
{
|
||||
|
@ -302,8 +308,18 @@ mpc85xx_setup_hose(void)
|
|||
|
||||
ppc_md.pci_exclude_device = mpc85xx_exclude_device;
|
||||
|
||||
#if defined(CONFIG_MPC8555_CDS)
|
||||
/* Pre pciauto_bus_scan VIA init */
|
||||
mpc85xx_cds_enable_via(hose_a);
|
||||
#endif
|
||||
|
||||
hose_a->last_busno = pciauto_bus_scan(hose_a, hose_a->first_busno);
|
||||
|
||||
#if defined(CONFIG_MPC8555_CDS)
|
||||
/* Post pciauto_bus_scan VIA fixup */
|
||||
mpc85xx_cds_fixup_via(hose_a);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_85xx_PCI2
|
||||
hose_b = pcibios_alloc_controller();
|
||||
|
||||
|
|
|
@ -2,10 +2,6 @@ menu "Kernel hacking"
|
|||
|
||||
source "lib/Kconfig.debug"
|
||||
|
||||
config FRAME_POINTER
|
||||
bool
|
||||
default y if DEBUG_INFO
|
||||
|
||||
config PT_PROXY
|
||||
bool "Enable ptrace proxy"
|
||||
depends on XTERM_CHAN && DEBUG_INFO && MODE_TT
|
||||
|
|
|
@ -1,5 +1,10 @@
|
|||
/* Much of this ripped from hw_random.c */
|
||||
|
||||
/* Copyright (C) 2005 Jeff Dike <jdike@addtoit.com> */
|
||||
/* Much of this ripped from drivers/char/hw_random.c, see there for other
|
||||
* copyright.
|
||||
*
|
||||
* This software may be used and distributed according to the terms
|
||||
* of the GNU General Public License, incorporated herein by reference.
|
||||
*/
|
||||
#include <linux/module.h>
|
||||
#include <linux/fs.h>
|
||||
#include <linux/miscdevice.h>
|
||||
|
@ -12,8 +17,6 @@
|
|||
*/
|
||||
#define RNG_VERSION "1.0.0"
|
||||
#define RNG_MODULE_NAME "random"
|
||||
#define RNG_DRIVER_NAME RNG_MODULE_NAME " virtual driver " RNG_VERSION
|
||||
#define PFX RNG_MODULE_NAME ": "
|
||||
|
||||
#define RNG_MISCDEV_MINOR 183 /* official */
|
||||
|
||||
|
@ -98,7 +101,7 @@ static int __init rng_init (void)
|
|||
|
||||
err = misc_register (&rng_miscdev);
|
||||
if (err) {
|
||||
printk (KERN_ERR PFX "misc device register failed\n");
|
||||
printk (KERN_ERR RNG_MODULE_NAME ": misc device register failed\n");
|
||||
goto err_out_cleanup_hw;
|
||||
}
|
||||
|
||||
|
@ -120,3 +123,6 @@ static void __exit rng_cleanup (void)
|
|||
|
||||
module_init (rng_init);
|
||||
module_exit (rng_cleanup);
|
||||
|
||||
MODULE_DESCRIPTION("UML Host Random Number Generator (RNG) driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
|
|
@ -22,7 +22,6 @@
|
|||
#include "init.h"
|
||||
#include "irq_user.h"
|
||||
#include "mconsole_kern.h"
|
||||
#include "2_5compat.h"
|
||||
|
||||
static int ssl_version = 1;
|
||||
|
||||
|
|
|
@ -28,7 +28,6 @@
|
|||
#include "irq_user.h"
|
||||
#include "mconsole_kern.h"
|
||||
#include "init.h"
|
||||
#include "2_5compat.h"
|
||||
|
||||
#define MAX_TTYS (16)
|
||||
|
||||
|
|
|
@ -49,7 +49,6 @@
|
|||
#include "irq_user.h"
|
||||
#include "irq_kern.h"
|
||||
#include "ubd_user.h"
|
||||
#include "2_5compat.h"
|
||||
#include "os.h"
|
||||
#include "mem.h"
|
||||
#include "mem_kern.h"
|
||||
|
@ -440,9 +439,9 @@ static int udb_setup(char *str)
|
|||
__setup("udb", udb_setup);
|
||||
__uml_help(udb_setup,
|
||||
"udb\n"
|
||||
" This option is here solely to catch ubd -> udb typos, which can be\n\n"
|
||||
" to impossible to catch visually unless you specifically look for\n\n"
|
||||
" them. The only result of any option starting with 'udb' is an error\n\n"
|
||||
" This option is here solely to catch ubd -> udb typos, which can be\n"
|
||||
" to impossible to catch visually unless you specifically look for\n"
|
||||
" them. The only result of any option starting with 'udb' is an error\n"
|
||||
" in the boot output.\n\n"
|
||||
);
|
||||
|
||||
|
|
|
@ -1,24 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 2001 Jeff Dike (jdike@karaya.com)
|
||||
* Licensed under the GPL
|
||||
*/
|
||||
|
||||
#ifndef __2_5_COMPAT_H__
|
||||
#define __2_5_COMPAT_H__
|
||||
|
||||
#define INIT_HARDSECT(arr, maj, sizes)
|
||||
|
||||
#define SET_PRI(task) do ; while(0)
|
||||
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Overrides for Emacs so that we follow Linus's tabbing style.
|
||||
* Emacs will notice this stuff at the end of the file and automatically
|
||||
* adjust the settings for this buffer only. This must remain at the end
|
||||
* of the file.
|
||||
* ---------------------------------------------------------------------------
|
||||
* Local variables:
|
||||
* c-file-style: "linux"
|
||||
* End:
|
||||
*/
|
|
@ -1,6 +1,7 @@
|
|||
#ifndef __UM_SYSRQ_H
|
||||
#define __UM_SYSRQ_H
|
||||
|
||||
extern void show_trace(unsigned long *stack);
|
||||
struct task_struct;
|
||||
extern void show_trace(struct task_struct* task, unsigned long *stack);
|
||||
|
||||
#endif
|
||||
|
|
|
@ -16,7 +16,6 @@
|
|||
#include "kern.h"
|
||||
#include "irq_user.h"
|
||||
#include "tlb.h"
|
||||
#include "2_5compat.h"
|
||||
#include "os.h"
|
||||
#include "time_user.h"
|
||||
#include "choose-mode.h"
|
||||
|
|
|
@ -1,59 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 2000, 2001, 2002 Jeff Dike (jdike@karaya.com)
|
||||
* Licensed under the GPL
|
||||
*/
|
||||
|
||||
#include "linux/init.h"
|
||||
#include "linux/bootmem.h"
|
||||
#include "linux/initrd.h"
|
||||
#include "asm/types.h"
|
||||
#include "user_util.h"
|
||||
#include "kern_util.h"
|
||||
#include "initrd.h"
|
||||
#include "init.h"
|
||||
#include "os.h"
|
||||
|
||||
/* Changed by uml_initrd_setup, which is a setup */
|
||||
static char *initrd __initdata = NULL;
|
||||
|
||||
static int __init read_initrd(void)
|
||||
{
|
||||
void *area;
|
||||
long long size;
|
||||
int err;
|
||||
|
||||
if(initrd == NULL) return 0;
|
||||
err = os_file_size(initrd, &size);
|
||||
if(err) return 0;
|
||||
area = alloc_bootmem(size);
|
||||
if(area == NULL) return 0;
|
||||
if(load_initrd(initrd, area, size) == -1) return 0;
|
||||
initrd_start = (unsigned long) area;
|
||||
initrd_end = initrd_start + size;
|
||||
return 0;
|
||||
}
|
||||
|
||||
__uml_postsetup(read_initrd);
|
||||
|
||||
static int __init uml_initrd_setup(char *line, int *add)
|
||||
{
|
||||
initrd = line;
|
||||
return 0;
|
||||
}
|
||||
|
||||
__uml_setup("initrd=", uml_initrd_setup,
|
||||
"initrd=<initrd image>\n"
|
||||
" This is used to boot UML from an initrd image. The argument is the\n"
|
||||
" name of the file containing the image.\n\n"
|
||||
);
|
||||
|
||||
/*
|
||||
* Overrides for Emacs so that we follow Linus's tabbing style.
|
||||
* Emacs will notice this stuff at the end of the file and automatically
|
||||
* adjust the settings for this buffer only. This must remain at the end
|
||||
* of the file.
|
||||
* ---------------------------------------------------------------------------
|
||||
* Local variables:
|
||||
* c-file-style: "linux"
|
||||
* End:
|
||||
*/
|
|
@ -1,46 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 2000, 2001 Jeff Dike (jdike@karaya.com)
|
||||
* Licensed under the GPL
|
||||
*/
|
||||
|
||||
#include <unistd.h>
|
||||
#include <sys/types.h>
|
||||
#include <sys/stat.h>
|
||||
#include <errno.h>
|
||||
|
||||
#include "user_util.h"
|
||||
#include "kern_util.h"
|
||||
#include "user.h"
|
||||
#include "initrd.h"
|
||||
#include "os.h"
|
||||
|
||||
int load_initrd(char *filename, void *buf, int size)
|
||||
{
|
||||
int fd, n;
|
||||
|
||||
fd = os_open_file(filename, of_read(OPENFLAGS()), 0);
|
||||
if(fd < 0){
|
||||
printk("Opening '%s' failed - err = %d\n", filename, -fd);
|
||||
return(-1);
|
||||
}
|
||||
n = os_read_file(fd, buf, size);
|
||||
if(n != size){
|
||||
printk("Read of %d bytes from '%s' failed, err = %d\n", size,
|
||||
filename, -n);
|
||||
return(-1);
|
||||
}
|
||||
|
||||
os_close_file(fd);
|
||||
return(0);
|
||||
}
|
||||
|
||||
/*
|
||||
* Overrides for Emacs so that we follow Linus's tabbing style.
|
||||
* Emacs will notice this stuff at the end of the file and automatically
|
||||
* adjust the settings for this buffer only. This must remain at the end
|
||||
* of the file.
|
||||
* ---------------------------------------------------------------------------
|
||||
* Local variables:
|
||||
* c-file-style: "linux"
|
||||
* End:
|
||||
*/
|
|
@ -71,7 +71,7 @@ static __init void do_uml_initcalls(void)
|
|||
|
||||
static void last_ditch_exit(int sig)
|
||||
{
|
||||
CHOOSE_MODE(kmalloc_ok = 0, (void) 0);
|
||||
kmalloc_ok = 0;
|
||||
signal(SIGINT, SIG_DFL);
|
||||
signal(SIGTERM, SIG_DFL);
|
||||
signal(SIGHUP, SIG_DFL);
|
||||
|
@ -87,7 +87,7 @@ int main(int argc, char **argv, char **envp)
|
|||
{
|
||||
char **new_argv;
|
||||
sigset_t mask;
|
||||
int ret, i;
|
||||
int ret, i, err;
|
||||
|
||||
/* Enable all signals except SIGIO - in some environments, we can
|
||||
* enter with some signals blocked
|
||||
|
@ -160,11 +160,11 @@ int main(int argc, char **argv, char **envp)
|
|||
*/
|
||||
change_sig(SIGPROF, 0);
|
||||
|
||||
/* Reboot */
|
||||
if(ret){
|
||||
int err;
|
||||
|
||||
printf("\n");
|
||||
/* This signal stuff used to be in the reboot case. However,
|
||||
* sometimes a SIGVTALRM can come in when we're halting (reproducably
|
||||
* when writing out gcov information, presumably because that takes
|
||||
* some time) and cause a segfault.
|
||||
*/
|
||||
|
||||
/* stop timers and set SIG*ALRM to be ignored */
|
||||
disable_timer();
|
||||
|
@ -172,8 +172,7 @@ int main(int argc, char **argv, char **envp)
|
|||
/* disable SIGIO for the fds and set SIGIO to be ignored */
|
||||
err = deactivate_all_fds();
|
||||
if(err)
|
||||
printf("deactivate_all_fds failed, errno = %d\n",
|
||||
-err);
|
||||
printf("deactivate_all_fds failed, errno = %d\n", -err);
|
||||
|
||||
/* Let any pending signals fire now. This ensures
|
||||
* that they won't be delivered after the exec, when
|
||||
|
@ -181,6 +180,9 @@ int main(int argc, char **argv, char **envp)
|
|||
*/
|
||||
unblock_signals();
|
||||
|
||||
/* Reboot */
|
||||
if(ret){
|
||||
printf("\n");
|
||||
execvp(new_argv[0], new_argv);
|
||||
perror("Failed to exec kernel");
|
||||
ret = 1;
|
||||
|
|
|
@ -43,7 +43,6 @@
|
|||
#include "tlb.h"
|
||||
#include "frame_kern.h"
|
||||
#include "sigcontext.h"
|
||||
#include "2_5compat.h"
|
||||
#include "os.h"
|
||||
#include "mode.h"
|
||||
#include "mode_kern.h"
|
||||
|
@ -55,18 +54,6 @@
|
|||
*/
|
||||
struct cpu_task cpu_tasks[NR_CPUS] = { [0 ... NR_CPUS - 1] = { -1, NULL } };
|
||||
|
||||
struct task_struct *get_task(int pid, int require)
|
||||
{
|
||||
struct task_struct *ret;
|
||||
|
||||
read_lock(&tasklist_lock);
|
||||
ret = find_task_by_pid(pid);
|
||||
read_unlock(&tasklist_lock);
|
||||
|
||||
if(require && (ret == NULL)) panic("get_task couldn't find a task\n");
|
||||
return(ret);
|
||||
}
|
||||
|
||||
int external_pid(void *t)
|
||||
{
|
||||
struct task_struct *task = t ? t : current;
|
||||
|
@ -189,7 +176,6 @@ void default_idle(void)
|
|||
|
||||
while(1){
|
||||
/* endless idle loop with no priority at all */
|
||||
SET_PRI(current);
|
||||
|
||||
/*
|
||||
* although we are an idle CPU, we do not want to
|
||||
|
@ -212,11 +198,6 @@ int page_size(void)
|
|||
return(PAGE_SIZE);
|
||||
}
|
||||
|
||||
unsigned long page_mask(void)
|
||||
{
|
||||
return(PAGE_MASK);
|
||||
}
|
||||
|
||||
void *um_virt_to_phys(struct task_struct *task, unsigned long addr,
|
||||
pte_t *pte_out)
|
||||
{
|
||||
|
@ -349,11 +330,6 @@ char *uml_strdup(char *string)
|
|||
return(new);
|
||||
}
|
||||
|
||||
void *get_init_task(void)
|
||||
{
|
||||
return(&init_thread_union.thread_info.task);
|
||||
}
|
||||
|
||||
int copy_to_user_proc(void __user *to, void *from, int size)
|
||||
{
|
||||
return(copy_to_user(to, from, size));
|
||||
|
@ -480,15 +456,3 @@ unsigned long arch_align_stack(unsigned long sp)
|
|||
return sp & ~0xf;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* Overrides for Emacs so that we follow Linus's tabbing style.
|
||||
* Emacs will notice this stuff at the end of the file and automatically
|
||||
* adjust the settings for this buffer only. This must remain at the end
|
||||
* of the file.
|
||||
* ---------------------------------------------------------------------------
|
||||
* Local variables:
|
||||
* c-file-style: "linux"
|
||||
* End:
|
||||
*/
|
||||
|
|
|
@ -322,11 +322,9 @@ void syscall_trace(union uml_pt_regs *regs, int entryexit)
|
|||
UPT_SYSCALL_ARG2(regs),
|
||||
UPT_SYSCALL_ARG3(regs),
|
||||
UPT_SYSCALL_ARG4(regs));
|
||||
else {
|
||||
int res = UPT_SYSCALL_RET(regs);
|
||||
audit_syscall_exit(current, AUDITSC_RESULT(res),
|
||||
res);
|
||||
}
|
||||
else audit_syscall_exit(current,
|
||||
AUDITSC_RESULT(UPT_SYSCALL_RET(regs)),
|
||||
UPT_SYSCALL_RET(regs));
|
||||
}
|
||||
|
||||
/* Fake a debug trap */
|
||||
|
@ -356,14 +354,3 @@ void syscall_trace(union uml_pt_regs *regs, int entryexit)
|
|||
current->exit_code = 0;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Overrides for Emacs so that we follow Linus's tabbing style.
|
||||
* Emacs will notice this stuff at the end of the file and automatically
|
||||
* adjust the settings for this buffer only. This must remain at the end
|
||||
* of the file.
|
||||
* ---------------------------------------------------------------------------
|
||||
* Local variables:
|
||||
* c-file-style: "linux"
|
||||
* End:
|
||||
*/
|
||||
|
|
|
@ -3,6 +3,7 @@
|
|||
* Licensed under the GPL
|
||||
*/
|
||||
|
||||
#include "linux/config.h"
|
||||
#include "linux/sched.h"
|
||||
#include "linux/kernel.h"
|
||||
#include "linux/module.h"
|
||||
|
@ -12,10 +13,10 @@
|
|||
#include "sysrq.h"
|
||||
#include "user_util.h"
|
||||
|
||||
void show_trace(unsigned long * stack)
|
||||
/* Catch non-i386 SUBARCH's. */
|
||||
#if !defined(CONFIG_UML_X86) || defined(CONFIG_64BIT)
|
||||
void show_trace(struct task_struct *task, unsigned long * stack)
|
||||
{
|
||||
/* XXX: Copy the CONFIG_FRAME_POINTER stack-walking backtrace from
|
||||
* arch/i386/kernel/traps.c, and then move this to sys-i386/sysrq.c.*/
|
||||
unsigned long addr;
|
||||
|
||||
if (!stack) {
|
||||
|
@ -35,6 +36,7 @@ void show_trace(unsigned long * stack)
|
|||
}
|
||||
printk("\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* stack dumps generator - this is used by arch-independent code.
|
||||
|
@ -44,7 +46,7 @@ void dump_stack(void)
|
|||
{
|
||||
unsigned long stack;
|
||||
|
||||
show_trace(&stack);
|
||||
show_trace(current, &stack);
|
||||
}
|
||||
EXPORT_SYMBOL(dump_stack);
|
||||
|
||||
|
@ -59,7 +61,11 @@ void show_stack(struct task_struct *task, unsigned long *esp)
|
|||
int i;
|
||||
|
||||
if (esp == NULL) {
|
||||
if (task != current) {
|
||||
if (task != current && task != NULL) {
|
||||
/* XXX: Isn't this bogus? I.e. isn't this the
|
||||
* *userspace* stack of this task? If not so, use this
|
||||
* even when task == current (as in i386).
|
||||
*/
|
||||
esp = (unsigned long *) KSTK_ESP(task);
|
||||
/* Which one? No actual difference - just coding style.*/
|
||||
//esp = (unsigned long *) PT_REGS_IP(&task->thread.regs);
|
||||
|
@ -77,5 +83,6 @@ void show_stack(struct task_struct *task, unsigned long *esp)
|
|||
printk("%08lx ", *stack++);
|
||||
}
|
||||
|
||||
show_trace(esp);
|
||||
printk("Call Trace: \n");
|
||||
show_trace(current, esp);
|
||||
}
|
||||
|
|
|
@ -23,7 +23,6 @@
|
|||
#include "kern.h"
|
||||
#include "chan_kern.h"
|
||||
#include "mconsole_kern.h"
|
||||
#include "2_5compat.h"
|
||||
#include "mem.h"
|
||||
#include "mem_kern.h"
|
||||
|
||||
|
|
|
@ -32,10 +32,6 @@ void *switch_to_tt(void *prev, void *next, void *last)
|
|||
unsigned long flags;
|
||||
int err, vtalrm, alrm, prof, cpu;
|
||||
char c;
|
||||
/* jailing and SMP are incompatible, so this doesn't need to be
|
||||
* made per-cpu
|
||||
*/
|
||||
static int reading;
|
||||
|
||||
from = prev;
|
||||
to = next;
|
||||
|
@ -59,12 +55,10 @@ void *switch_to_tt(void *prev, void *next, void *last)
|
|||
c = 0;
|
||||
set_current(to);
|
||||
|
||||
reading = 0;
|
||||
err = os_write_file(to->thread.mode.tt.switch_pipe[1], &c, sizeof(c));
|
||||
if(err != sizeof(c))
|
||||
panic("write of switch_pipe failed, err = %d", -err);
|
||||
|
||||
reading = 1;
|
||||
if(from->thread.mode.tt.switch_pipe[0] == -1)
|
||||
os_kill_process(os_getpid(), 0);
|
||||
|
||||
|
|
|
@ -111,12 +111,6 @@ struct seq_operations cpuinfo_op = {
|
|||
.show = show_cpuinfo,
|
||||
};
|
||||
|
||||
pte_t * __bad_pagetable(void)
|
||||
{
|
||||
panic("Someone should implement __bad_pagetable");
|
||||
return(NULL);
|
||||
}
|
||||
|
||||
/* Set in linux_main */
|
||||
unsigned long host_task_size;
|
||||
unsigned long task_size;
|
||||
|
|
|
@ -3,12 +3,15 @@
|
|||
* Licensed under the GPL
|
||||
*/
|
||||
|
||||
#include "linux/config.h"
|
||||
#include "linux/kernel.h"
|
||||
#include "linux/smp.h"
|
||||
#include "linux/sched.h"
|
||||
#include "linux/kallsyms.h"
|
||||
#include "asm/ptrace.h"
|
||||
#include "sysrq.h"
|
||||
|
||||
/* This is declared by <linux/sched.h> */
|
||||
void show_regs(struct pt_regs *regs)
|
||||
{
|
||||
printk("\n");
|
||||
|
@ -31,5 +34,80 @@ void show_regs(struct pt_regs *regs)
|
|||
0xffff & PT_REGS_DS(regs),
|
||||
0xffff & PT_REGS_ES(regs));
|
||||
|
||||
show_trace((unsigned long *) ®s);
|
||||
show_trace(NULL, (unsigned long *) ®s);
|
||||
}
|
||||
|
||||
/* Copied from i386. */
|
||||
static inline int valid_stack_ptr(struct thread_info *tinfo, void *p)
|
||||
{
|
||||
return p > (void *)tinfo &&
|
||||
p < (void *)tinfo + THREAD_SIZE - 3;
|
||||
}
|
||||
|
||||
/* Adapted from i386 (we also print the address we read from). */
|
||||
static inline unsigned long print_context_stack(struct thread_info *tinfo,
|
||||
unsigned long *stack, unsigned long ebp)
|
||||
{
|
||||
unsigned long addr;
|
||||
|
||||
#ifdef CONFIG_FRAME_POINTER
|
||||
while (valid_stack_ptr(tinfo, (void *)ebp)) {
|
||||
addr = *(unsigned long *)(ebp + 4);
|
||||
printk("%08lx: [<%08lx>]", ebp + 4, addr);
|
||||
print_symbol(" %s", addr);
|
||||
printk("\n");
|
||||
ebp = *(unsigned long *)ebp;
|
||||
}
|
||||
#else
|
||||
while (valid_stack_ptr(tinfo, stack)) {
|
||||
addr = *stack;
|
||||
if (__kernel_text_address(addr)) {
|
||||
printk("%08lx: [<%08lx>]", (unsigned long) stack, addr);
|
||||
print_symbol(" %s", addr);
|
||||
printk("\n");
|
||||
}
|
||||
stack++;
|
||||
}
|
||||
#endif
|
||||
return ebp;
|
||||
}
|
||||
|
||||
void show_trace(struct task_struct* task, unsigned long * stack)
|
||||
{
|
||||
unsigned long ebp;
|
||||
struct thread_info *context;
|
||||
|
||||
/* Turn this into BUG_ON if possible. */
|
||||
if (!stack) {
|
||||
stack = (unsigned long*) &stack;
|
||||
printk("show_trace: got NULL stack, implicit assumption task == current");
|
||||
WARN_ON(1);
|
||||
}
|
||||
|
||||
if (!task)
|
||||
task = current;
|
||||
|
||||
if (task != current) {
|
||||
//ebp = (unsigned long) KSTK_EBP(task);
|
||||
/* Which one? No actual difference - just coding style.*/
|
||||
ebp = (unsigned long) PT_REGS_EBP(&task->thread.regs);
|
||||
} else {
|
||||
asm ("movl %%ebp, %0" : "=r" (ebp) : );
|
||||
}
|
||||
|
||||
context = (struct thread_info *)
|
||||
((unsigned long)stack & (~(THREAD_SIZE - 1)));
|
||||
print_context_stack(context, stack, ebp);
|
||||
|
||||
/*while (((long) stack & (THREAD_SIZE-1)) != 0) {
|
||||
addr = *stack;
|
||||
if (__kernel_text_address(addr)) {
|
||||
printk("%08lx: [<%08lx>]", (unsigned long) stack, addr);
|
||||
print_symbol(" %s", addr);
|
||||
printk("\n");
|
||||
}
|
||||
stack++;
|
||||
}*/
|
||||
printk("\n");
|
||||
}
|
||||
|
||||
|
|
|
@ -27,17 +27,5 @@ void show_regs(struct pt_regs_subarch *regs)
|
|||
0xffff & regs->xds, 0xffff & regs->xes);
|
||||
#endif
|
||||
|
||||
show_trace(®s->gpr[1]);
|
||||
show_trace(current, ®s->gpr[1]);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Overrides for Emacs so that we follow Linus's tabbing style.
|
||||
* Emacs will notice this stuff at the end of the file and automatically
|
||||
* adjust the settings for this buffer only. This must remain at the end
|
||||
* of the file.
|
||||
* ---------------------------------------------------------------------------
|
||||
* Local variables:
|
||||
* c-file-style: "linux"
|
||||
* End:
|
||||
*/
|
||||
|
|
|
@ -133,23 +133,27 @@ static long arch_prctl_tt(int code, unsigned long addr)
|
|||
|
||||
#ifdef CONFIG_MODE_SKAS
|
||||
|
||||
/* XXX: Must also call arch_prctl in the host, beside saving the segment bases! */
|
||||
static long arch_prctl_skas(int code, unsigned long addr)
|
||||
{
|
||||
long ret = 0;
|
||||
|
||||
switch(code){
|
||||
case ARCH_SET_GS:
|
||||
current->thread.regs.regs.skas.regs[GS_BASE / sizeof(unsigned long)] = addr;
|
||||
break;
|
||||
case ARCH_SET_FS:
|
||||
current->thread.regs.regs.skas.regs[FS_BASE / sizeof(unsigned long)] = addr;
|
||||
break;
|
||||
case ARCH_SET_GS:
|
||||
current->thread.regs.regs.skas.regs[GS_BASE / sizeof(unsigned long)] = addr;
|
||||
break;
|
||||
case ARCH_GET_FS:
|
||||
ret = put_user(current->thread.regs.regs.skas.regs[GS / sizeof(unsigned long)], &addr);
|
||||
ret = put_user(current->thread.regs.regs.skas.
|
||||
regs[FS_BASE / sizeof(unsigned long)],
|
||||
(unsigned long __user *)addr);
|
||||
break;
|
||||
case ARCH_GET_GS:
|
||||
ret = put_user(current->thread.regs.regs.skas.regs[FS / sizeof(unsigned \
|
||||
long)], &addr);
|
||||
ret = put_user(current->thread.regs.regs.skas.
|
||||
regs[GS_BASE / sizeof(unsigned long)],
|
||||
(unsigned long __user *)addr);
|
||||
break;
|
||||
default:
|
||||
ret = -EINVAL;
|
||||
|
|
|
@ -36,14 +36,5 @@ void __show_regs(struct pt_regs * regs)
|
|||
void show_regs(struct pt_regs *regs)
|
||||
{
|
||||
__show_regs(regs);
|
||||
show_trace((unsigned long *) ®s);
|
||||
show_trace(current, (unsigned long *) ®s);
|
||||
}
|
||||
|
||||
/* Emacs will notice this stuff at the end of the file and automatically
|
||||
* adjust the settings for this buffer only. This must remain at the end
|
||||
* of the file.
|
||||
* ---------------------------------------------------------------------------
|
||||
* Local variables:
|
||||
* c-file-style: "linux"
|
||||
* End:
|
||||
*/
|
||||
|
|
|
@ -421,7 +421,7 @@ config PCI_DIRECT
|
|||
|
||||
config PCI_MMCONFIG
|
||||
bool "Support mmconfig PCI config space access"
|
||||
depends on PCI
|
||||
depends on PCI && ACPI
|
||||
select ACPI_BOOT
|
||||
|
||||
config UNORDERED_IO
|
||||
|
|
|
@ -28,6 +28,7 @@
|
|||
#include <asm/uaccess.h>
|
||||
#include <asm/i387.h>
|
||||
#include <asm/proto.h>
|
||||
#include <asm/ia32_unistd.h>
|
||||
|
||||
/* #define DEBUG_SIG 1 */
|
||||
|
||||
|
|
|
@ -40,13 +40,12 @@ config ACPI
|
|||
available at:
|
||||
<http://www.acpi.info>
|
||||
|
||||
if ACPI
|
||||
|
||||
config ACPI_BOOT
|
||||
bool
|
||||
depends on ACPI || X86_HT
|
||||
default y
|
||||
|
||||
if ACPI
|
||||
|
||||
config ACPI_INTERPRETER
|
||||
bool
|
||||
depends on !IA64_SGI_SN
|
||||
|
|
|
@ -391,7 +391,6 @@ acpi_pci_irq_enable (
|
|||
u8 pin = 0;
|
||||
int edge_level = ACPI_LEVEL_SENSITIVE;
|
||||
int active_high_low = ACPI_ACTIVE_LOW;
|
||||
extern int via_interrupt_line_quirk;
|
||||
char *link = NULL;
|
||||
|
||||
ACPI_FUNCTION_TRACE("acpi_pci_irq_enable");
|
||||
|
@ -444,9 +443,6 @@ acpi_pci_irq_enable (
|
|||
}
|
||||
}
|
||||
|
||||
if (via_interrupt_line_quirk)
|
||||
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq & 15);
|
||||
|
||||
dev->irq = acpi_register_gsi(irq, edge_level, active_high_low);
|
||||
|
||||
printk(KERN_INFO PREFIX "PCI Interrupt %s[%c] -> ",
|
||||
|
|
|
@ -488,6 +488,20 @@ static int viocd_packet(struct cdrom_device_info *cdi,
|
|||
& (CDC_DVD_RAM | CDC_RAM)) != 0;
|
||||
}
|
||||
break;
|
||||
case GPCMD_GET_CONFIGURATION:
|
||||
if (cgc->cmd[3] == CDF_RWRT) {
|
||||
struct rwrt_feature_desc *rfd = (struct rwrt_feature_desc *)(cgc->buffer + sizeof(struct feature_header));
|
||||
|
||||
if ((buflen >=
|
||||
(sizeof(struct feature_header) + sizeof(*rfd))) &&
|
||||
(cdi->ops->capability & ~cdi->mask
|
||||
& (CDC_DVD_RAM | CDC_RAM))) {
|
||||
rfd->feature_code = cpu_to_be16(CDF_RWRT);
|
||||
rfd->curr = 1;
|
||||
ret = 0;
|
||||
}
|
||||
}
|
||||
break;
|
||||
default:
|
||||
if (cgc->sense) {
|
||||
/* indicate Unknown code */
|
||||
|
|
|
@ -1932,8 +1932,11 @@ static ide_startstop_t cdrom_do_block_pc(ide_drive_t *drive, struct request *rq)
|
|||
|
||||
/*
|
||||
* check if dma is safe
|
||||
*
|
||||
* NOTE! The "len" and "addr" checks should possibly have
|
||||
* separate masks.
|
||||
*/
|
||||
if ((rq->data_len & 3) || (addr & mask))
|
||||
if ((rq->data_len & mask) || (addr & mask))
|
||||
info->dma = 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -68,23 +68,3 @@ config GAMEPORT_CS461X
|
|||
depends on PCI
|
||||
|
||||
endif
|
||||
|
||||
# Yes, SOUND_GAMEPORT looks a bit odd. Yes, it ends up being turned on
|
||||
# in every .config. Please don't touch it. It is here to handle an
|
||||
# unusual dependency between GAMEPORT and sound drivers.
|
||||
#
|
||||
# Some sound drivers call gameport functions. If GAMEPORT is
|
||||
# not selected, empty stubs are provided for the functions and all is
|
||||
# well.
|
||||
# If GAMEPORT is built in, everything is fine.
|
||||
# If GAMEPORT is a module, however, it would need to be loaded for the
|
||||
# sound driver to be able to link properly. Therefore, the sound
|
||||
# driver must be a module as well in that case. Since there's no way
|
||||
# to express that directly in Kconfig, we use SOUND_GAMEPORT to
|
||||
# express it. SOUND_GAMEPORT boils down to "if GAMEPORT is 'm',
|
||||
# anything that depends on SOUND_GAMEPORT must be 'm' as well. if
|
||||
# GAMEPORT is 'y' or 'n', it can be anything".
|
||||
config SOUND_GAMEPORT
|
||||
tristate
|
||||
default m if GAMEPORT=m
|
||||
default y
|
||||
|
|
|
@ -422,7 +422,7 @@ static struct input_handle *joydev_connect(struct input_handler *handler, struct
|
|||
joydev->nkey++;
|
||||
}
|
||||
|
||||
for (i = 0; i < BTN_JOYSTICK - BTN_MISC + 1; i++)
|
||||
for (i = 0; i < BTN_JOYSTICK - BTN_MISC; i++)
|
||||
if (test_bit(i + BTN_MISC, dev->keybit)) {
|
||||
joydev->keymap[i] = joydev->nkey;
|
||||
joydev->keypam[joydev->nkey] = i + BTN_MISC;
|
||||
|
|
|
@ -171,9 +171,9 @@ static struct {
|
|||
unsigned char set2;
|
||||
} atkbd_scroll_keys[] = {
|
||||
{ ATKBD_SCR_1, 0xc5 },
|
||||
{ ATKBD_SCR_2, 0xa9 },
|
||||
{ ATKBD_SCR_4, 0xb6 },
|
||||
{ ATKBD_SCR_8, 0xa7 },
|
||||
{ ATKBD_SCR_2, 0x9d },
|
||||
{ ATKBD_SCR_4, 0xa4 },
|
||||
{ ATKBD_SCR_8, 0x9b },
|
||||
{ ATKBD_SCR_CLICK, 0xe0 },
|
||||
{ ATKBD_SCR_LEFT, 0xcb },
|
||||
{ ATKBD_SCR_RIGHT, 0xd2 },
|
||||
|
|
|
@ -518,13 +518,16 @@ static int psmouse_probe(struct psmouse *psmouse)
|
|||
/*
|
||||
* First, we check if it's a mouse. It should send 0x00 or 0x03
|
||||
* in case of an IntelliMouse in 4-byte mode or 0x04 for IM Explorer.
|
||||
* Sunrex K8561 IR Keyboard/Mouse reports 0xff on second and subsequent
|
||||
* ID queries, probably due to a firmware bug.
|
||||
*/
|
||||
|
||||
param[0] = 0xa5;
|
||||
if (ps2_command(ps2dev, param, PSMOUSE_CMD_GETID))
|
||||
return -1;
|
||||
|
||||
if (param[0] != 0x00 && param[0] != 0x03 && param[0] != 0x04)
|
||||
if (param[0] != 0x00 && param[0] != 0x03 &&
|
||||
param[0] != 0x04 && param[0] != 0xff)
|
||||
return -1;
|
||||
|
||||
/*
|
||||
|
@ -972,7 +975,7 @@ static int psmouse_set_maxproto(const char *val, struct kernel_param *kp)
|
|||
return -EINVAL;
|
||||
|
||||
if (!strncmp(val, "any", 3)) {
|
||||
*((unsigned int *)kp->arg) = -1UL;
|
||||
*((unsigned int *)kp->arg) = -1U;
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -143,39 +143,6 @@ static int synaptics_identify(struct psmouse *psmouse)
|
|||
return -1;
|
||||
}
|
||||
|
||||
static void print_ident(struct synaptics_data *priv)
|
||||
{
|
||||
printk(KERN_INFO "Synaptics Touchpad, model: %ld\n", SYN_ID_MODEL(priv->identity));
|
||||
printk(KERN_INFO " Firmware: %ld.%ld\n", SYN_ID_MAJOR(priv->identity),
|
||||
SYN_ID_MINOR(priv->identity));
|
||||
if (SYN_MODEL_ROT180(priv->model_id))
|
||||
printk(KERN_INFO " 180 degree mounted touchpad\n");
|
||||
if (SYN_MODEL_PORTRAIT(priv->model_id))
|
||||
printk(KERN_INFO " portrait touchpad\n");
|
||||
printk(KERN_INFO " Sensor: %ld\n", SYN_MODEL_SENSOR(priv->model_id));
|
||||
if (SYN_MODEL_NEWABS(priv->model_id))
|
||||
printk(KERN_INFO " new absolute packet format\n");
|
||||
if (SYN_MODEL_PEN(priv->model_id))
|
||||
printk(KERN_INFO " pen detection\n");
|
||||
|
||||
if (SYN_CAP_EXTENDED(priv->capabilities)) {
|
||||
printk(KERN_INFO " Touchpad has extended capability bits\n");
|
||||
if (SYN_CAP_MULTI_BUTTON_NO(priv->ext_cap))
|
||||
printk(KERN_INFO " -> %d multi-buttons, i.e. besides standard buttons\n",
|
||||
(int)(SYN_CAP_MULTI_BUTTON_NO(priv->ext_cap)));
|
||||
if (SYN_CAP_MIDDLE_BUTTON(priv->capabilities))
|
||||
printk(KERN_INFO " -> middle button\n");
|
||||
if (SYN_CAP_FOUR_BUTTON(priv->capabilities))
|
||||
printk(KERN_INFO " -> four buttons\n");
|
||||
if (SYN_CAP_MULTIFINGER(priv->capabilities))
|
||||
printk(KERN_INFO " -> multifinger detection\n");
|
||||
if (SYN_CAP_PALMDETECT(priv->capabilities))
|
||||
printk(KERN_INFO " -> palm detection\n");
|
||||
if (SYN_CAP_PASS_THROUGH(priv->capabilities))
|
||||
printk(KERN_INFO " -> pass-through port\n");
|
||||
}
|
||||
}
|
||||
|
||||
static int synaptics_query_hardware(struct psmouse *psmouse)
|
||||
{
|
||||
int retries = 0;
|
||||
|
@ -666,7 +633,11 @@ int synaptics_init(struct psmouse *psmouse)
|
|||
|
||||
priv->pkt_type = SYN_MODEL_NEWABS(priv->model_id) ? SYN_NEWABS : SYN_OLDABS;
|
||||
|
||||
print_ident(priv);
|
||||
printk(KERN_INFO "Synaptics Touchpad, model: %ld, fw: %ld.%ld, id: %#lx, caps: %#lx/%#lx\n",
|
||||
SYN_ID_MODEL(priv->identity),
|
||||
SYN_ID_MAJOR(priv->identity), SYN_ID_MINOR(priv->identity),
|
||||
priv->model_id, priv->capabilities, priv->ext_cap);
|
||||
|
||||
set_input_params(&psmouse->dev, priv);
|
||||
|
||||
psmouse->protocol_handler = synaptics_process_byte;
|
||||
|
|
|
@ -101,6 +101,7 @@ struct mousedev_list {
|
|||
unsigned char ready, buffer, bufsiz;
|
||||
unsigned char imexseq, impsseq;
|
||||
enum mousedev_emul mode;
|
||||
unsigned long last_buttons;
|
||||
};
|
||||
|
||||
#define MOUSEDEV_SEQ_LEN 6
|
||||
|
@ -224,7 +225,7 @@ static void mousedev_notify_readers(struct mousedev *mousedev, struct mousedev_h
|
|||
spin_lock_irqsave(&list->packet_lock, flags);
|
||||
|
||||
p = &list->packets[list->head];
|
||||
if (list->ready && p->buttons != packet->buttons) {
|
||||
if (list->ready && p->buttons != mousedev->packet.buttons) {
|
||||
unsigned int new_head = (list->head + 1) % PACKET_QUEUE_LEN;
|
||||
if (new_head != list->tail) {
|
||||
p = &list->packets[list->head = new_head];
|
||||
|
@ -249,9 +250,12 @@ static void mousedev_notify_readers(struct mousedev *mousedev, struct mousedev_h
|
|||
p->dz += packet->dz;
|
||||
p->buttons = mousedev->packet.buttons;
|
||||
|
||||
if (p->dx || p->dy || p->dz || p->buttons != list->last_buttons)
|
||||
list->ready = 1;
|
||||
|
||||
spin_unlock_irqrestore(&list->packet_lock, flags);
|
||||
|
||||
if (list->ready)
|
||||
kill_fasync(&list->fasync, SIGIO, POLL_IN);
|
||||
}
|
||||
|
||||
|
@ -477,9 +481,10 @@ static void mousedev_packet(struct mousedev_list *list, signed char *ps2_data)
|
|||
}
|
||||
|
||||
if (!p->dx && !p->dy && !p->dz) {
|
||||
if (list->tail == list->head)
|
||||
if (list->tail == list->head) {
|
||||
list->ready = 0;
|
||||
else
|
||||
list->last_buttons = p->buttons;
|
||||
} else
|
||||
list->tail = (list->tail + 1) % PACKET_QUEUE_LEN;
|
||||
}
|
||||
|
||||
|
|
|
@ -88,9 +88,11 @@ static struct dmi_system_id __initdata i8042_dmi_noloop_table[] = {
|
|||
};
|
||||
|
||||
/*
|
||||
* Some Fujitsu notebooks are ahving trouble with touhcpads if
|
||||
* Some Fujitsu notebooks are having trouble with touchpads if
|
||||
* active multiplexing mode is activated. Luckily they don't have
|
||||
* external PS/2 ports so we can safely disable it.
|
||||
* ... apparently some Toshibas don't like MUX mode either and
|
||||
* die horrible death on reboot.
|
||||
*/
|
||||
static struct dmi_system_id __initdata i8042_dmi_nomux_table[] = {
|
||||
{
|
||||
|
@ -114,6 +116,13 @@ static struct dmi_system_id __initdata i8042_dmi_nomux_table[] = {
|
|||
DMI_MATCH(DMI_PRODUCT_NAME, "LifeBook S Series"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.ident = "Fujitsu Lifebook S6230",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "LifeBook S6230"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.ident = "Fujitsu T70H",
|
||||
.matches = {
|
||||
|
@ -121,6 +130,13 @@ static struct dmi_system_id __initdata i8042_dmi_nomux_table[] = {
|
|||
DMI_MATCH(DMI_PRODUCT_NAME, "FMVLT70H"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.ident = "Toshiba P10",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "Satellite P10"),
|
||||
},
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
|
@ -215,19 +231,23 @@ static struct pnp_driver i8042_pnp_aux_driver = {
|
|||
|
||||
static void i8042_pnp_exit(void)
|
||||
{
|
||||
if (i8042_pnp_kbd_registered)
|
||||
if (i8042_pnp_kbd_registered) {
|
||||
i8042_pnp_kbd_registered = 0;
|
||||
pnp_unregister_driver(&i8042_pnp_kbd_driver);
|
||||
}
|
||||
|
||||
if (i8042_pnp_aux_registered)
|
||||
if (i8042_pnp_aux_registered) {
|
||||
i8042_pnp_aux_registered = 0;
|
||||
pnp_unregister_driver(&i8042_pnp_aux_driver);
|
||||
}
|
||||
}
|
||||
|
||||
static int i8042_pnp_init(void)
|
||||
{
|
||||
int result_kbd, result_aux;
|
||||
|
||||
if (i8042_nopnp) {
|
||||
printk("i8042: PNP detection disabled\n");
|
||||
printk(KERN_INFO "i8042: PNP detection disabled\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -241,7 +261,7 @@ static int i8042_pnp_init(void)
|
|||
#if defined(__ia64__)
|
||||
return -ENODEV;
|
||||
#else
|
||||
printk(KERN_WARNING "PNP: No PS/2 controller found. Probing ports directly.\n");
|
||||
printk(KERN_INFO "PNP: No PS/2 controller found. Probing ports directly.\n");
|
||||
return 0;
|
||||
#endif
|
||||
}
|
||||
|
@ -265,7 +285,7 @@ static int i8042_pnp_init(void)
|
|||
i8042_pnp_kbd_irq = i8042_kbd_irq;
|
||||
}
|
||||
|
||||
if (result_aux > 0 && !i8042_pnp_aux_irq) {
|
||||
if (!i8042_pnp_aux_irq) {
|
||||
printk(KERN_WARNING "PNP: PS/2 controller doesn't have AUX irq; using default %#x\n", i8042_aux_irq);
|
||||
i8042_pnp_aux_irq = i8042_aux_irq;
|
||||
}
|
||||
|
|
|
@ -698,6 +698,26 @@ static void i8042_timer_func(unsigned long data)
|
|||
i8042_interrupt(0, NULL, NULL);
|
||||
}
|
||||
|
||||
static int i8042_ctl_test(void)
|
||||
{
|
||||
unsigned char param;
|
||||
|
||||
if (!i8042_reset)
|
||||
return 0;
|
||||
|
||||
if (i8042_command(¶m, I8042_CMD_CTL_TEST)) {
|
||||
printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (param != I8042_RET_CTL_TEST) {
|
||||
printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
|
||||
param, I8042_RET_CTL_TEST);
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* i8042_controller init initializes the i8042 controller, and,
|
||||
|
@ -719,21 +739,8 @@ static int i8042_controller_init(void)
|
|||
return -1;
|
||||
}
|
||||
|
||||
if (i8042_reset) {
|
||||
|
||||
unsigned char param;
|
||||
|
||||
if (i8042_command(¶m, I8042_CMD_CTL_TEST)) {
|
||||
printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n");
|
||||
if (i8042_ctl_test())
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (param != I8042_RET_CTL_TEST) {
|
||||
printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
|
||||
param, I8042_RET_CTL_TEST);
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Save the CTR for restoral on unload / reboot.
|
||||
|
@ -802,15 +809,11 @@ static int i8042_controller_init(void)
|
|||
*/
|
||||
static void i8042_controller_reset(void)
|
||||
{
|
||||
unsigned char param;
|
||||
|
||||
/*
|
||||
* Reset the controller if requested.
|
||||
*/
|
||||
|
||||
if (i8042_reset)
|
||||
if (i8042_command(¶m, I8042_CMD_CTL_TEST))
|
||||
printk(KERN_ERR "i8042.c: i8042 controller reset timeout.\n");
|
||||
i8042_ctl_test();
|
||||
|
||||
/*
|
||||
* Disable MUX mode if present.
|
||||
|
@ -922,8 +925,11 @@ static int i8042_resume(struct device *dev, u32 level)
|
|||
if (level != RESUME_ENABLE)
|
||||
return 0;
|
||||
|
||||
if (i8042_controller_init()) {
|
||||
printk(KERN_ERR "i8042: resume failed\n");
|
||||
if (i8042_ctl_test())
|
||||
return -1;
|
||||
|
||||
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
|
||||
printk(KERN_ERR "i8042: Can't write CTR\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
|
|
@ -68,8 +68,7 @@ static void gunze_process_packet(struct gunze* gunze, struct pt_regs *regs)
|
|||
|
||||
if (gunze->idx != GUNZE_MAX_LENGTH || gunze->data[5] != ',' ||
|
||||
(gunze->data[0] != 'T' && gunze->data[0] != 'R')) {
|
||||
gunze->data[10] = 0;
|
||||
printk(KERN_WARNING "gunze.c: bad packet: >%s<\n", gunze->data);
|
||||
printk(KERN_WARNING "gunze.c: bad packet: >%.*s<\n", GUNZE_MAX_LENGTH, gunze->data);
|
||||
return;
|
||||
}
|
||||
|
||||
|
|
|
@ -2421,7 +2421,7 @@ pmac_wakeup_devices(void)
|
|||
|
||||
/* Re-enable local CPU interrupts */
|
||||
local_irq_enable();
|
||||
mdelay(100);
|
||||
mdelay(10);
|
||||
preempt_enable();
|
||||
|
||||
/* Re-enable clock spreading on some machines */
|
||||
|
@ -2549,7 +2549,9 @@ powerbook_sleep_Core99(void)
|
|||
return ret;
|
||||
}
|
||||
|
||||
printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
|
||||
/* Stop environment and ADB interrupts */
|
||||
pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
|
||||
pmu_wait_complete(&req);
|
||||
|
||||
/* Tell PMU what events will wake us up */
|
||||
pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS,
|
||||
|
@ -2611,8 +2613,6 @@ powerbook_sleep_Core99(void)
|
|||
pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
|
||||
pmu_wait_complete(&req);
|
||||
|
||||
printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
|
||||
|
||||
pmac_wakeup_devices();
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -906,22 +906,12 @@ static int dst_tone_power_cmd(struct dst_state* state)
|
|||
if (state->dst_type == DST_TYPE_IS_TERR)
|
||||
return 0;
|
||||
|
||||
if (state->voltage == SEC_VOLTAGE_OFF)
|
||||
paket[4] = 0;
|
||||
else
|
||||
paket[4] = 1;
|
||||
|
||||
if (state->tone == SEC_TONE_ON)
|
||||
paket[2] = 0x02;
|
||||
else
|
||||
paket[2] = 0;
|
||||
if (state->minicmd == SEC_MINI_A)
|
||||
paket[3] = 0x02;
|
||||
else
|
||||
paket[3] = 0;
|
||||
|
||||
paket[4] = state->tx_tuna[4];
|
||||
paket[2] = state->tx_tuna[2];
|
||||
paket[3] = state->tx_tuna[3];
|
||||
paket[7] = dst_check_sum (paket, 7);
|
||||
dst_command(state, paket, 8);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -980,7 +970,7 @@ static int dst_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage);
|
|||
|
||||
static int dst_write_tuna(struct dvb_frontend* fe)
|
||||
{
|
||||
struct dst_state* state = (struct dst_state*) fe->demodulator_priv;
|
||||
struct dst_state* state = fe->demodulator_priv;
|
||||
int retval;
|
||||
u8 reply;
|
||||
|
||||
|
@ -1048,10 +1038,10 @@ static int dst_write_tuna(struct dvb_frontend* fe)
|
|||
|
||||
static int dst_set_diseqc(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd* cmd)
|
||||
{
|
||||
struct dst_state* state = (struct dst_state*) fe->demodulator_priv;
|
||||
struct dst_state* state = fe->demodulator_priv;
|
||||
u8 paket[8] = { 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf0, 0xec };
|
||||
|
||||
if (state->dst_type == DST_TYPE_IS_TERR)
|
||||
if (state->dst_type != DST_TYPE_IS_SAT)
|
||||
return 0;
|
||||
|
||||
if (cmd->msg_len == 0 || cmd->msg_len > 4)
|
||||
|
@ -1064,35 +1054,28 @@ static int dst_set_diseqc(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd*
|
|||
|
||||
static int dst_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage)
|
||||
{
|
||||
u8 *val;
|
||||
int need_cmd;
|
||||
struct dst_state* state = (struct dst_state*) fe->demodulator_priv;
|
||||
struct dst_state* state = fe->demodulator_priv;
|
||||
|
||||
state->voltage = voltage;
|
||||
|
||||
if (state->dst_type == DST_TYPE_IS_TERR)
|
||||
if (state->dst_type != DST_TYPE_IS_SAT)
|
||||
return 0;
|
||||
|
||||
need_cmd = 0;
|
||||
val = &state->tx_tuna[0];
|
||||
val[8] &= ~0x40;
|
||||
switch (voltage) {
|
||||
case SEC_VOLTAGE_13:
|
||||
if ((state->diseq_flags & HAS_POWER) == 0)
|
||||
need_cmd = 1;
|
||||
state->diseq_flags |= HAS_POWER;
|
||||
break;
|
||||
|
||||
case SEC_VOLTAGE_18:
|
||||
if ((state->diseq_flags & HAS_POWER) == 0)
|
||||
need_cmd = 1;
|
||||
state->diseq_flags |= HAS_POWER;
|
||||
val[8] |= 0x40;
|
||||
state->tx_tuna[4] = 0x01;
|
||||
break;
|
||||
|
||||
case SEC_VOLTAGE_OFF:
|
||||
need_cmd = 1;
|
||||
state->diseq_flags &= ~(HAS_POWER | HAS_LOCK | ATTEMPT_TUNE);
|
||||
state->tx_tuna[4] = 0x00;
|
||||
break;
|
||||
|
||||
default:
|
||||
|
@ -1106,24 +1089,20 @@ static int dst_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage)
|
|||
|
||||
static int dst_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
|
||||
{
|
||||
u8 *val;
|
||||
struct dst_state* state = (struct dst_state*) fe->demodulator_priv;
|
||||
struct dst_state* state = fe->demodulator_priv;
|
||||
|
||||
state->tone = tone;
|
||||
|
||||
if (state->dst_type == DST_TYPE_IS_TERR)
|
||||
if (state->dst_type != DST_TYPE_IS_SAT)
|
||||
return 0;
|
||||
|
||||
val = &state->tx_tuna[0];
|
||||
|
||||
val[8] &= ~0x1;
|
||||
|
||||
switch (tone) {
|
||||
case SEC_TONE_OFF:
|
||||
state->tx_tuna[2] = 0xff;
|
||||
break;
|
||||
|
||||
case SEC_TONE_ON:
|
||||
val[8] |= 1;
|
||||
state->tx_tuna[2] = 0x02;
|
||||
break;
|
||||
|
||||
default:
|
||||
|
@ -1134,9 +1113,32 @@ static int dst_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int dst_send_burst(struct dvb_frontend *fe, fe_sec_mini_cmd_t minicmd)
|
||||
{
|
||||
struct dst_state *state = fe->demodulator_priv;
|
||||
|
||||
if (state->dst_type != DST_TYPE_IS_SAT)
|
||||
return 0;
|
||||
|
||||
state->minicmd = minicmd;
|
||||
|
||||
switch (minicmd) {
|
||||
case SEC_MINI_A:
|
||||
state->tx_tuna[3] = 0x02;
|
||||
break;
|
||||
case SEC_MINI_B:
|
||||
state->tx_tuna[3] = 0xff;
|
||||
break;
|
||||
}
|
||||
dst_tone_power_cmd(state);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static int dst_init(struct dvb_frontend* fe)
|
||||
{
|
||||
struct dst_state* state = (struct dst_state*) fe->demodulator_priv;
|
||||
struct dst_state* state = fe->demodulator_priv;
|
||||
static u8 ini_satci_tuna[] = { 9, 0, 3, 0xb6, 1, 0, 0x73, 0x21, 0, 0 };
|
||||
static u8 ini_satfta_tuna[] = { 0, 0, 3, 0xb6, 1, 0x55, 0xbd, 0x50, 0, 0 };
|
||||
static u8 ini_tvfta_tuna[] = { 0, 0, 3, 0xb6, 1, 7, 0x0, 0x0, 0, 0 };
|
||||
|
@ -1168,7 +1170,7 @@ static int dst_init(struct dvb_frontend* fe)
|
|||
|
||||
static int dst_read_status(struct dvb_frontend* fe, fe_status_t* status)
|
||||
{
|
||||
struct dst_state* state = (struct dst_state*) fe->demodulator_priv;
|
||||
struct dst_state* state = fe->demodulator_priv;
|
||||
|
||||
*status = 0;
|
||||
if (state->diseq_flags & HAS_LOCK) {
|
||||
|
@ -1182,7 +1184,7 @@ static int dst_read_status(struct dvb_frontend* fe, fe_status_t* status)
|
|||
|
||||
static int dst_read_signal_strength(struct dvb_frontend* fe, u16* strength)
|
||||
{
|
||||
struct dst_state* state = (struct dst_state*) fe->demodulator_priv;
|
||||
struct dst_state* state = fe->demodulator_priv;
|
||||
|
||||
dst_get_signal(state);
|
||||
*strength = state->decode_strength;
|
||||
|
@ -1192,7 +1194,7 @@ static int dst_read_signal_strength(struct dvb_frontend* fe, u16* strength)
|
|||
|
||||
static int dst_read_snr(struct dvb_frontend* fe, u16* snr)
|
||||
{
|
||||
struct dst_state* state = (struct dst_state*) fe->demodulator_priv;
|
||||
struct dst_state* state = fe->demodulator_priv;
|
||||
|
||||
dst_get_signal(state);
|
||||
*snr = state->decode_snr;
|
||||
|
@ -1202,7 +1204,7 @@ static int dst_read_snr(struct dvb_frontend* fe, u16* snr)
|
|||
|
||||
static int dst_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
|
||||
{
|
||||
struct dst_state* state = (struct dst_state*) fe->demodulator_priv;
|
||||
struct dst_state* state = fe->demodulator_priv;
|
||||
|
||||
dst_set_freq(state, p->frequency);
|
||||
if (verbose > 4)
|
||||
|
@ -1228,7 +1230,7 @@ static int dst_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_paramet
|
|||
|
||||
static int dst_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
|
||||
{
|
||||
struct dst_state* state = (struct dst_state*) fe->demodulator_priv;
|
||||
struct dst_state* state = fe->demodulator_priv;
|
||||
|
||||
p->frequency = state->decode_freq;
|
||||
p->inversion = state->inversion;
|
||||
|
@ -1248,7 +1250,7 @@ static int dst_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_paramet
|
|||
|
||||
static void dst_release(struct dvb_frontend* fe)
|
||||
{
|
||||
struct dst_state* state = (struct dst_state*) fe->demodulator_priv;
|
||||
struct dst_state* state = fe->demodulator_priv;
|
||||
kfree(state);
|
||||
}
|
||||
|
||||
|
@ -1346,7 +1348,7 @@ static struct dvb_frontend_ops dst_dvbs_ops = {
|
|||
.read_signal_strength = dst_read_signal_strength,
|
||||
.read_snr = dst_read_snr,
|
||||
|
||||
.diseqc_send_burst = dst_set_tone,
|
||||
.diseqc_send_burst = dst_send_burst,
|
||||
.diseqc_send_master_cmd = dst_set_diseqc,
|
||||
.set_voltage = dst_set_voltage,
|
||||
.set_tone = dst_set_tone,
|
||||
|
|
|
@ -133,6 +133,8 @@
|
|||
/* number of ETHTOOL_GSTATS u64's */
|
||||
#define TG3_NUM_STATS (sizeof(struct tg3_ethtool_stats)/sizeof(u64))
|
||||
|
||||
#define TG3_NUM_TEST 6
|
||||
|
||||
static char version[] __devinitdata =
|
||||
DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n";
|
||||
|
||||
|
@ -316,6 +318,17 @@ static struct {
|
|||
{ "nic_tx_threshold_hit" }
|
||||
};
|
||||
|
||||
static struct {
|
||||
const char string[ETH_GSTRING_LEN];
|
||||
} ethtool_test_keys[TG3_NUM_TEST] = {
|
||||
{ "nvram test (online) " },
|
||||
{ "link test (online) " },
|
||||
{ "register test (offline)" },
|
||||
{ "memory test (offline)" },
|
||||
{ "loopback test (offline)" },
|
||||
{ "interrupt test (offline)" },
|
||||
};
|
||||
|
||||
static void tg3_write_indirect_reg32(struct tg3 *tp, u32 off, u32 val)
|
||||
{
|
||||
if ((tp->tg3_flags & TG3_FLAG_PCIX_TARGET_HWBUG) != 0) {
|
||||
|
@ -3070,7 +3083,7 @@ static irqreturn_t tg3_test_isr(int irq, void *dev_id,
|
|||
}
|
||||
|
||||
static int tg3_init_hw(struct tg3 *);
|
||||
static int tg3_halt(struct tg3 *, int);
|
||||
static int tg3_halt(struct tg3 *, int, int);
|
||||
|
||||
#ifdef CONFIG_NET_POLL_CONTROLLER
|
||||
static void tg3_poll_controller(struct net_device *dev)
|
||||
|
@ -3094,7 +3107,7 @@ static void tg3_reset_task(void *_data)
|
|||
restart_timer = tp->tg3_flags2 & TG3_FLG2_RESTART_TIMER;
|
||||
tp->tg3_flags2 &= ~TG3_FLG2_RESTART_TIMER;
|
||||
|
||||
tg3_halt(tp, 0);
|
||||
tg3_halt(tp, RESET_KIND_SHUTDOWN, 0);
|
||||
tg3_init_hw(tp);
|
||||
|
||||
tg3_netif_start(tp);
|
||||
|
@ -3440,7 +3453,7 @@ static int tg3_change_mtu(struct net_device *dev, int new_mtu)
|
|||
spin_lock_irq(&tp->lock);
|
||||
spin_lock(&tp->tx_lock);
|
||||
|
||||
tg3_halt(tp, 1);
|
||||
tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
|
||||
|
||||
tg3_set_mtu(dev, tp, new_mtu);
|
||||
|
||||
|
@ -4131,19 +4144,19 @@ static void tg3_stop_fw(struct tg3 *tp)
|
|||
}
|
||||
|
||||
/* tp->lock is held. */
|
||||
static int tg3_halt(struct tg3 *tp, int silent)
|
||||
static int tg3_halt(struct tg3 *tp, int kind, int silent)
|
||||
{
|
||||
int err;
|
||||
|
||||
tg3_stop_fw(tp);
|
||||
|
||||
tg3_write_sig_pre_reset(tp, RESET_KIND_SHUTDOWN);
|
||||
tg3_write_sig_pre_reset(tp, kind);
|
||||
|
||||
tg3_abort_hw(tp, silent);
|
||||
err = tg3_chip_reset(tp);
|
||||
|
||||
tg3_write_sig_legacy(tp, RESET_KIND_SHUTDOWN);
|
||||
tg3_write_sig_post_reset(tp, RESET_KIND_SHUTDOWN);
|
||||
tg3_write_sig_legacy(tp, kind);
|
||||
tg3_write_sig_post_reset(tp, kind);
|
||||
|
||||
if (err)
|
||||
return err;
|
||||
|
@ -4357,7 +4370,12 @@ static int tg3_load_firmware_cpu(struct tg3 *tp, u32 cpu_base, u32 cpu_scratch_b
|
|||
*/
|
||||
tp->tg3_flags |= TG3_FLAG_PCIX_TARGET_HWBUG;
|
||||
|
||||
/* It is possible that bootcode is still loading at this point.
|
||||
* Get the nvram lock first before halting the cpu.
|
||||
*/
|
||||
tg3_nvram_lock(tp);
|
||||
err = tg3_halt_cpu(tp, cpu_base);
|
||||
tg3_nvram_unlock(tp);
|
||||
if (err)
|
||||
goto out;
|
||||
|
||||
|
@ -5881,6 +5899,9 @@ static int tg3_test_interrupt(struct tg3 *tp)
|
|||
int err, i;
|
||||
u32 int_mbox = 0;
|
||||
|
||||
if (!netif_running(dev))
|
||||
return -ENODEV;
|
||||
|
||||
tg3_disable_ints(tp);
|
||||
|
||||
free_irq(tp->pdev->irq, dev);
|
||||
|
@ -5984,7 +6005,7 @@ static int tg3_test_msi(struct tg3 *tp)
|
|||
spin_lock_irq(&tp->lock);
|
||||
spin_lock(&tp->tx_lock);
|
||||
|
||||
tg3_halt(tp, 1);
|
||||
tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
|
||||
err = tg3_init_hw(tp);
|
||||
|
||||
spin_unlock(&tp->tx_lock);
|
||||
|
@ -6060,7 +6081,7 @@ static int tg3_open(struct net_device *dev)
|
|||
|
||||
err = tg3_init_hw(tp);
|
||||
if (err) {
|
||||
tg3_halt(tp, 1);
|
||||
tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
|
||||
tg3_free_rings(tp);
|
||||
} else {
|
||||
if (tp->tg3_flags & TG3_FLAG_TAGGED_STATUS)
|
||||
|
@ -6104,7 +6125,7 @@ static int tg3_open(struct net_device *dev)
|
|||
pci_disable_msi(tp->pdev);
|
||||
tp->tg3_flags2 &= ~TG3_FLG2_USING_MSI;
|
||||
}
|
||||
tg3_halt(tp, 1);
|
||||
tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
|
||||
tg3_free_rings(tp);
|
||||
tg3_free_consistent(tp);
|
||||
|
||||
|
@ -6377,7 +6398,7 @@ static int tg3_close(struct net_device *dev)
|
|||
|
||||
tg3_disable_ints(tp);
|
||||
|
||||
tg3_halt(tp, 1);
|
||||
tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
|
||||
tg3_free_rings(tp);
|
||||
tp->tg3_flags &=
|
||||
~(TG3_FLAG_INIT_COMPLETE |
|
||||
|
@ -7097,7 +7118,7 @@ static int tg3_set_ringparam(struct net_device *dev, struct ethtool_ringparam *e
|
|||
tp->tx_pending = ering->tx_pending;
|
||||
|
||||
if (netif_running(dev)) {
|
||||
tg3_halt(tp, 1);
|
||||
tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
|
||||
tg3_init_hw(tp);
|
||||
tg3_netif_start(tp);
|
||||
}
|
||||
|
@ -7140,7 +7161,7 @@ static int tg3_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam
|
|||
tp->tg3_flags &= ~TG3_FLAG_TX_PAUSE;
|
||||
|
||||
if (netif_running(dev)) {
|
||||
tg3_halt(tp, 1);
|
||||
tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
|
||||
tg3_init_hw(tp);
|
||||
tg3_netif_start(tp);
|
||||
}
|
||||
|
@ -7199,12 +7220,20 @@ static int tg3_get_stats_count (struct net_device *dev)
|
|||
return TG3_NUM_STATS;
|
||||
}
|
||||
|
||||
static int tg3_get_test_count (struct net_device *dev)
|
||||
{
|
||||
return TG3_NUM_TEST;
|
||||
}
|
||||
|
||||
static void tg3_get_strings (struct net_device *dev, u32 stringset, u8 *buf)
|
||||
{
|
||||
switch (stringset) {
|
||||
case ETH_SS_STATS:
|
||||
memcpy(buf, ðtool_stats_keys, sizeof(ethtool_stats_keys));
|
||||
break;
|
||||
case ETH_SS_TEST:
|
||||
memcpy(buf, ðtool_test_keys, sizeof(ethtool_test_keys));
|
||||
break;
|
||||
default:
|
||||
WARN_ON(1); /* we need a WARN() */
|
||||
break;
|
||||
|
@ -7218,6 +7247,516 @@ static void tg3_get_ethtool_stats (struct net_device *dev,
|
|||
memcpy(tmp_stats, tg3_get_estats(tp), sizeof(tp->estats));
|
||||
}
|
||||
|
||||
#define NVRAM_TEST_SIZE 0x100
|
||||
|
||||
static int tg3_test_nvram(struct tg3 *tp)
|
||||
{
|
||||
u32 *buf, csum;
|
||||
int i, j, err = 0;
|
||||
|
||||
buf = kmalloc(NVRAM_TEST_SIZE, GFP_KERNEL);
|
||||
if (buf == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
for (i = 0, j = 0; i < NVRAM_TEST_SIZE; i += 4, j++) {
|
||||
u32 val;
|
||||
|
||||
if ((err = tg3_nvram_read(tp, i, &val)) != 0)
|
||||
break;
|
||||
buf[j] = cpu_to_le32(val);
|
||||
}
|
||||
if (i < NVRAM_TEST_SIZE)
|
||||
goto out;
|
||||
|
||||
err = -EIO;
|
||||
if (cpu_to_be32(buf[0]) != TG3_EEPROM_MAGIC)
|
||||
goto out;
|
||||
|
||||
/* Bootstrap checksum at offset 0x10 */
|
||||
csum = calc_crc((unsigned char *) buf, 0x10);
|
||||
if(csum != cpu_to_le32(buf[0x10/4]))
|
||||
goto out;
|
||||
|
||||
/* Manufacturing block starts at offset 0x74, checksum at 0xfc */
|
||||
csum = calc_crc((unsigned char *) &buf[0x74/4], 0x88);
|
||||
if (csum != cpu_to_le32(buf[0xfc/4]))
|
||||
goto out;
|
||||
|
||||
err = 0;
|
||||
|
||||
out:
|
||||
kfree(buf);
|
||||
return err;
|
||||
}
|
||||
|
||||
#define TG3_SERDES_TIMEOUT_SEC 2
|
||||
#define TG3_COPPER_TIMEOUT_SEC 6
|
||||
|
||||
static int tg3_test_link(struct tg3 *tp)
|
||||
{
|
||||
int i, max;
|
||||
|
||||
if (!netif_running(tp->dev))
|
||||
return -ENODEV;
|
||||
|
||||
if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)
|
||||
max = TG3_SERDES_TIMEOUT_SEC;
|
||||
else
|
||||
max = TG3_COPPER_TIMEOUT_SEC;
|
||||
|
||||
for (i = 0; i < max; i++) {
|
||||
if (netif_carrier_ok(tp->dev))
|
||||
return 0;
|
||||
|
||||
if (msleep_interruptible(1000))
|
||||
break;
|
||||
}
|
||||
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
/* Only test the commonly used registers */
|
||||
static int tg3_test_registers(struct tg3 *tp)
|
||||
{
|
||||
int i, is_5705;
|
||||
u32 offset, read_mask, write_mask, val, save_val, read_val;
|
||||
static struct {
|
||||
u16 offset;
|
||||
u16 flags;
|
||||
#define TG3_FL_5705 0x1
|
||||
#define TG3_FL_NOT_5705 0x2
|
||||
#define TG3_FL_NOT_5788 0x4
|
||||
u32 read_mask;
|
||||
u32 write_mask;
|
||||
} reg_tbl[] = {
|
||||
/* MAC Control Registers */
|
||||
{ MAC_MODE, TG3_FL_NOT_5705,
|
||||
0x00000000, 0x00ef6f8c },
|
||||
{ MAC_MODE, TG3_FL_5705,
|
||||
0x00000000, 0x01ef6b8c },
|
||||
{ MAC_STATUS, TG3_FL_NOT_5705,
|
||||
0x03800107, 0x00000000 },
|
||||
{ MAC_STATUS, TG3_FL_5705,
|
||||
0x03800100, 0x00000000 },
|
||||
{ MAC_ADDR_0_HIGH, 0x0000,
|
||||
0x00000000, 0x0000ffff },
|
||||
{ MAC_ADDR_0_LOW, 0x0000,
|
||||
0x00000000, 0xffffffff },
|
||||
{ MAC_RX_MTU_SIZE, 0x0000,
|
||||
0x00000000, 0x0000ffff },
|
||||
{ MAC_TX_MODE, 0x0000,
|
||||
0x00000000, 0x00000070 },
|
||||
{ MAC_TX_LENGTHS, 0x0000,
|
||||
0x00000000, 0x00003fff },
|
||||
{ MAC_RX_MODE, TG3_FL_NOT_5705,
|
||||
0x00000000, 0x000007fc },
|
||||
{ MAC_RX_MODE, TG3_FL_5705,
|
||||
0x00000000, 0x000007dc },
|
||||
{ MAC_HASH_REG_0, 0x0000,
|
||||
0x00000000, 0xffffffff },
|
||||
{ MAC_HASH_REG_1, 0x0000,
|
||||
0x00000000, 0xffffffff },
|
||||
{ MAC_HASH_REG_2, 0x0000,
|
||||
0x00000000, 0xffffffff },
|
||||
{ MAC_HASH_REG_3, 0x0000,
|
||||
0x00000000, 0xffffffff },
|
||||
|
||||
/* Receive Data and Receive BD Initiator Control Registers. */
|
||||
{ RCVDBDI_JUMBO_BD+0, TG3_FL_NOT_5705,
|
||||
0x00000000, 0xffffffff },
|
||||
{ RCVDBDI_JUMBO_BD+4, TG3_FL_NOT_5705,
|
||||
0x00000000, 0xffffffff },
|
||||
{ RCVDBDI_JUMBO_BD+8, TG3_FL_NOT_5705,
|
||||
0x00000000, 0x00000003 },
|
||||
{ RCVDBDI_JUMBO_BD+0xc, TG3_FL_NOT_5705,
|
||||
0x00000000, 0xffffffff },
|
||||
{ RCVDBDI_STD_BD+0, 0x0000,
|
||||
0x00000000, 0xffffffff },
|
||||
{ RCVDBDI_STD_BD+4, 0x0000,
|
||||
0x00000000, 0xffffffff },
|
||||
{ RCVDBDI_STD_BD+8, 0x0000,
|
||||
0x00000000, 0xffff0002 },
|
||||
{ RCVDBDI_STD_BD+0xc, 0x0000,
|
||||
0x00000000, 0xffffffff },
|
||||
|
||||
/* Receive BD Initiator Control Registers. */
|
||||
{ RCVBDI_STD_THRESH, TG3_FL_NOT_5705,
|
||||
0x00000000, 0xffffffff },
|
||||
{ RCVBDI_STD_THRESH, TG3_FL_5705,
|
||||
0x00000000, 0x000003ff },
|
||||
{ RCVBDI_JUMBO_THRESH, TG3_FL_NOT_5705,
|
||||
0x00000000, 0xffffffff },
|
||||
|
||||
/* Host Coalescing Control Registers. */
|
||||
{ HOSTCC_MODE, TG3_FL_NOT_5705,
|
||||
0x00000000, 0x00000004 },
|
||||
{ HOSTCC_MODE, TG3_FL_5705,
|
||||
0x00000000, 0x000000f6 },
|
||||
{ HOSTCC_RXCOL_TICKS, TG3_FL_NOT_5705,
|
||||
0x00000000, 0xffffffff },
|
||||
{ HOSTCC_RXCOL_TICKS, TG3_FL_5705,
|
||||
0x00000000, 0x000003ff },
|
||||
{ HOSTCC_TXCOL_TICKS, TG3_FL_NOT_5705,
|
||||
0x00000000, 0xffffffff },
|
||||
{ HOSTCC_TXCOL_TICKS, TG3_FL_5705,
|
||||
0x00000000, 0x000003ff },
|
||||
{ HOSTCC_RXMAX_FRAMES, TG3_FL_NOT_5705,
|
||||
0x00000000, 0xffffffff },
|
||||
{ HOSTCC_RXMAX_FRAMES, TG3_FL_5705 | TG3_FL_NOT_5788,
|
||||
0x00000000, 0x000000ff },
|
||||
{ HOSTCC_TXMAX_FRAMES, TG3_FL_NOT_5705,
|
||||
0x00000000, 0xffffffff },
|
||||
{ HOSTCC_TXMAX_FRAMES, TG3_FL_5705 | TG3_FL_NOT_5788,
|
||||
0x00000000, 0x000000ff },
|
||||
{ HOSTCC_RXCOAL_TICK_INT, TG3_FL_NOT_5705,
|
||||
0x00000000, 0xffffffff },
|
||||
{ HOSTCC_TXCOAL_TICK_INT, TG3_FL_NOT_5705,
|
||||
0x00000000, 0xffffffff },
|
||||
{ HOSTCC_RXCOAL_MAXF_INT, TG3_FL_NOT_5705,
|
||||
0x00000000, 0xffffffff },
|
||||
{ HOSTCC_RXCOAL_MAXF_INT, TG3_FL_5705 | TG3_FL_NOT_5788,
|
||||
0x00000000, 0x000000ff },
|
||||
{ HOSTCC_TXCOAL_MAXF_INT, TG3_FL_NOT_5705,
|
||||
0x00000000, 0xffffffff },
|
||||
{ HOSTCC_TXCOAL_MAXF_INT, TG3_FL_5705 | TG3_FL_NOT_5788,
|
||||
0x00000000, 0x000000ff },
|
||||
{ HOSTCC_STAT_COAL_TICKS, TG3_FL_NOT_5705,
|
||||
0x00000000, 0xffffffff },
|
||||
{ HOSTCC_STATS_BLK_HOST_ADDR, TG3_FL_NOT_5705,
|
||||
0x00000000, 0xffffffff },
|
||||
{ HOSTCC_STATS_BLK_HOST_ADDR+4, TG3_FL_NOT_5705,
|
||||
0x00000000, 0xffffffff },
|
||||
{ HOSTCC_STATUS_BLK_HOST_ADDR, 0x0000,
|
||||
0x00000000, 0xffffffff },
|
||||
{ HOSTCC_STATUS_BLK_HOST_ADDR+4, 0x0000,
|
||||
0x00000000, 0xffffffff },
|
||||
{ HOSTCC_STATS_BLK_NIC_ADDR, 0x0000,
|
||||
0xffffffff, 0x00000000 },
|
||||
{ HOSTCC_STATUS_BLK_NIC_ADDR, 0x0000,
|
||||
0xffffffff, 0x00000000 },
|
||||
|
||||
/* Buffer Manager Control Registers. */
|
||||
{ BUFMGR_MB_POOL_ADDR, 0x0000,
|
||||
0x00000000, 0x007fff80 },
|
||||
{ BUFMGR_MB_POOL_SIZE, 0x0000,
|
||||
0x00000000, 0x007fffff },
|
||||
{ BUFMGR_MB_RDMA_LOW_WATER, 0x0000,
|
||||
0x00000000, 0x0000003f },
|
||||
{ BUFMGR_MB_MACRX_LOW_WATER, 0x0000,
|
||||
0x00000000, 0x000001ff },
|
||||
{ BUFMGR_MB_HIGH_WATER, 0x0000,
|
||||
0x00000000, 0x000001ff },
|
||||
{ BUFMGR_DMA_DESC_POOL_ADDR, TG3_FL_NOT_5705,
|
||||
0xffffffff, 0x00000000 },
|
||||
{ BUFMGR_DMA_DESC_POOL_SIZE, TG3_FL_NOT_5705,
|
||||
0xffffffff, 0x00000000 },
|
||||
|
||||
/* Mailbox Registers */
|
||||
{ GRCMBOX_RCVSTD_PROD_IDX+4, 0x0000,
|
||||
0x00000000, 0x000001ff },
|
||||
{ GRCMBOX_RCVJUMBO_PROD_IDX+4, TG3_FL_NOT_5705,
|
||||
0x00000000, 0x000001ff },
|
||||
{ GRCMBOX_RCVRET_CON_IDX_0+4, 0x0000,
|
||||
0x00000000, 0x000007ff },
|
||||
{ GRCMBOX_SNDHOST_PROD_IDX_0+4, 0x0000,
|
||||
0x00000000, 0x000001ff },
|
||||
|
||||
{ 0xffff, 0x0000, 0x00000000, 0x00000000 },
|
||||
};
|
||||
|
||||
if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS)
|
||||
is_5705 = 1;
|
||||
else
|
||||
is_5705 = 0;
|
||||
|
||||
for (i = 0; reg_tbl[i].offset != 0xffff; i++) {
|
||||
if (is_5705 && (reg_tbl[i].flags & TG3_FL_NOT_5705))
|
||||
continue;
|
||||
|
||||
if (!is_5705 && (reg_tbl[i].flags & TG3_FL_5705))
|
||||
continue;
|
||||
|
||||
if ((tp->tg3_flags2 & TG3_FLG2_IS_5788) &&
|
||||
(reg_tbl[i].flags & TG3_FL_NOT_5788))
|
||||
continue;
|
||||
|
||||
offset = (u32) reg_tbl[i].offset;
|
||||
read_mask = reg_tbl[i].read_mask;
|
||||
write_mask = reg_tbl[i].write_mask;
|
||||
|
||||
/* Save the original register content */
|
||||
save_val = tr32(offset);
|
||||
|
||||
/* Determine the read-only value. */
|
||||
read_val = save_val & read_mask;
|
||||
|
||||
/* Write zero to the register, then make sure the read-only bits
|
||||
* are not changed and the read/write bits are all zeros.
|
||||
*/
|
||||
tw32(offset, 0);
|
||||
|
||||
val = tr32(offset);
|
||||
|
||||
/* Test the read-only and read/write bits. */
|
||||
if (((val & read_mask) != read_val) || (val & write_mask))
|
||||
goto out;
|
||||
|
||||
/* Write ones to all the bits defined by RdMask and WrMask, then
|
||||
* make sure the read-only bits are not changed and the
|
||||
* read/write bits are all ones.
|
||||
*/
|
||||
tw32(offset, read_mask | write_mask);
|
||||
|
||||
val = tr32(offset);
|
||||
|
||||
/* Test the read-only bits. */
|
||||
if ((val & read_mask) != read_val)
|
||||
goto out;
|
||||
|
||||
/* Test the read/write bits. */
|
||||
if ((val & write_mask) != write_mask)
|
||||
goto out;
|
||||
|
||||
tw32(offset, save_val);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
out:
|
||||
printk(KERN_ERR PFX "Register test failed at offset %x\n", offset);
|
||||
tw32(offset, save_val);
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
static int tg3_do_mem_test(struct tg3 *tp, u32 offset, u32 len)
|
||||
{
|
||||
static u32 test_pattern[] = { 0x00000000, 0xffffffff, 0xaa55a55a };
|
||||
int i;
|
||||
u32 j;
|
||||
|
||||
for (i = 0; i < sizeof(test_pattern)/sizeof(u32); i++) {
|
||||
for (j = 0; j < len; j += 4) {
|
||||
u32 val;
|
||||
|
||||
tg3_write_mem(tp, offset + j, test_pattern[i]);
|
||||
tg3_read_mem(tp, offset + j, &val);
|
||||
if (val != test_pattern[i])
|
||||
return -EIO;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tg3_test_memory(struct tg3 *tp)
|
||||
{
|
||||
static struct mem_entry {
|
||||
u32 offset;
|
||||
u32 len;
|
||||
} mem_tbl_570x[] = {
|
||||
{ 0x00000000, 0x01000},
|
||||
{ 0x00002000, 0x1c000},
|
||||
{ 0xffffffff, 0x00000}
|
||||
}, mem_tbl_5705[] = {
|
||||
{ 0x00000100, 0x0000c},
|
||||
{ 0x00000200, 0x00008},
|
||||
{ 0x00000b50, 0x00400},
|
||||
{ 0x00004000, 0x00800},
|
||||
{ 0x00006000, 0x01000},
|
||||
{ 0x00008000, 0x02000},
|
||||
{ 0x00010000, 0x0e000},
|
||||
{ 0xffffffff, 0x00000}
|
||||
};
|
||||
struct mem_entry *mem_tbl;
|
||||
int err = 0;
|
||||
int i;
|
||||
|
||||
if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS)
|
||||
mem_tbl = mem_tbl_5705;
|
||||
else
|
||||
mem_tbl = mem_tbl_570x;
|
||||
|
||||
for (i = 0; mem_tbl[i].offset != 0xffffffff; i++) {
|
||||
if ((err = tg3_do_mem_test(tp, mem_tbl[i].offset,
|
||||
mem_tbl[i].len)) != 0)
|
||||
break;
|
||||
}
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
static int tg3_test_loopback(struct tg3 *tp)
|
||||
{
|
||||
u32 mac_mode, send_idx, rx_start_idx, rx_idx, tx_idx, opaque_key;
|
||||
u32 desc_idx;
|
||||
struct sk_buff *skb, *rx_skb;
|
||||
u8 *tx_data;
|
||||
dma_addr_t map;
|
||||
int num_pkts, tx_len, rx_len, i, err;
|
||||
struct tg3_rx_buffer_desc *desc;
|
||||
|
||||
if (!netif_running(tp->dev))
|
||||
return -ENODEV;
|
||||
|
||||
err = -EIO;
|
||||
|
||||
tg3_abort_hw(tp, 1);
|
||||
|
||||
/* Clearing this flag to keep interrupts disabled */
|
||||
tp->tg3_flags &= ~TG3_FLAG_INIT_COMPLETE;
|
||||
tg3_reset_hw(tp);
|
||||
|
||||
mac_mode = (tp->mac_mode & ~MAC_MODE_PORT_MODE_MASK) |
|
||||
MAC_MODE_PORT_INT_LPBACK | MAC_MODE_LINK_POLARITY |
|
||||
MAC_MODE_PORT_MODE_GMII;
|
||||
tw32(MAC_MODE, mac_mode);
|
||||
|
||||
tx_len = 1514;
|
||||
skb = dev_alloc_skb(tx_len);
|
||||
tx_data = skb_put(skb, tx_len);
|
||||
memcpy(tx_data, tp->dev->dev_addr, 6);
|
||||
memset(tx_data + 6, 0x0, 8);
|
||||
|
||||
tw32(MAC_RX_MTU_SIZE, tx_len + 4);
|
||||
|
||||
for (i = 14; i < tx_len; i++)
|
||||
tx_data[i] = (u8) (i & 0xff);
|
||||
|
||||
map = pci_map_single(tp->pdev, skb->data, tx_len, PCI_DMA_TODEVICE);
|
||||
|
||||
tw32_f(HOSTCC_MODE, tp->coalesce_mode | HOSTCC_MODE_ENABLE |
|
||||
HOSTCC_MODE_NOW);
|
||||
|
||||
udelay(10);
|
||||
|
||||
rx_start_idx = tp->hw_status->idx[0].rx_producer;
|
||||
|
||||
send_idx = 0;
|
||||
num_pkts = 0;
|
||||
|
||||
tg3_set_txd(tp, send_idx, map, tx_len, 0, 1);
|
||||
|
||||
send_idx++;
|
||||
num_pkts++;
|
||||
|
||||
tw32_tx_mbox(MAILBOX_SNDHOST_PROD_IDX_0 + TG3_64BIT_REG_LOW, send_idx);
|
||||
tr32(MAILBOX_SNDHOST_PROD_IDX_0 + TG3_64BIT_REG_LOW);
|
||||
|
||||
udelay(10);
|
||||
|
||||
for (i = 0; i < 10; i++) {
|
||||
tw32_f(HOSTCC_MODE, tp->coalesce_mode | HOSTCC_MODE_ENABLE |
|
||||
HOSTCC_MODE_NOW);
|
||||
|
||||
udelay(10);
|
||||
|
||||
tx_idx = tp->hw_status->idx[0].tx_consumer;
|
||||
rx_idx = tp->hw_status->idx[0].rx_producer;
|
||||
if ((tx_idx == send_idx) &&
|
||||
(rx_idx == (rx_start_idx + num_pkts)))
|
||||
break;
|
||||
}
|
||||
|
||||
pci_unmap_single(tp->pdev, map, tx_len, PCI_DMA_TODEVICE);
|
||||
dev_kfree_skb(skb);
|
||||
|
||||
if (tx_idx != send_idx)
|
||||
goto out;
|
||||
|
||||
if (rx_idx != rx_start_idx + num_pkts)
|
||||
goto out;
|
||||
|
||||
desc = &tp->rx_rcb[rx_start_idx];
|
||||
desc_idx = desc->opaque & RXD_OPAQUE_INDEX_MASK;
|
||||
opaque_key = desc->opaque & RXD_OPAQUE_RING_MASK;
|
||||
if (opaque_key != RXD_OPAQUE_RING_STD)
|
||||
goto out;
|
||||
|
||||
if ((desc->err_vlan & RXD_ERR_MASK) != 0 &&
|
||||
(desc->err_vlan != RXD_ERR_ODD_NIBBLE_RCVD_MII))
|
||||
goto out;
|
||||
|
||||
rx_len = ((desc->idx_len & RXD_LEN_MASK) >> RXD_LEN_SHIFT) - 4;
|
||||
if (rx_len != tx_len)
|
||||
goto out;
|
||||
|
||||
rx_skb = tp->rx_std_buffers[desc_idx].skb;
|
||||
|
||||
map = pci_unmap_addr(&tp->rx_std_buffers[desc_idx], mapping);
|
||||
pci_dma_sync_single_for_cpu(tp->pdev, map, rx_len, PCI_DMA_FROMDEVICE);
|
||||
|
||||
for (i = 14; i < tx_len; i++) {
|
||||
if (*(rx_skb->data + i) != (u8) (i & 0xff))
|
||||
goto out;
|
||||
}
|
||||
err = 0;
|
||||
|
||||
/* tg3_free_rings will unmap and free the rx_skb */
|
||||
out:
|
||||
return err;
|
||||
}
|
||||
|
||||
static void tg3_self_test(struct net_device *dev, struct ethtool_test *etest,
|
||||
u64 *data)
|
||||
{
|
||||
struct tg3 *tp = netdev_priv(dev);
|
||||
|
||||
memset(data, 0, sizeof(u64) * TG3_NUM_TEST);
|
||||
|
||||
if (tg3_test_nvram(tp) != 0) {
|
||||
etest->flags |= ETH_TEST_FL_FAILED;
|
||||
data[0] = 1;
|
||||
}
|
||||
if (tg3_test_link(tp) != 0) {
|
||||
etest->flags |= ETH_TEST_FL_FAILED;
|
||||
data[1] = 1;
|
||||
}
|
||||
if (etest->flags & ETH_TEST_FL_OFFLINE) {
|
||||
if (netif_running(dev))
|
||||
tg3_netif_stop(tp);
|
||||
|
||||
spin_lock_irq(&tp->lock);
|
||||
spin_lock(&tp->tx_lock);
|
||||
|
||||
tg3_halt(tp, RESET_KIND_SUSPEND, 1);
|
||||
tg3_nvram_lock(tp);
|
||||
tg3_halt_cpu(tp, RX_CPU_BASE);
|
||||
if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS))
|
||||
tg3_halt_cpu(tp, TX_CPU_BASE);
|
||||
tg3_nvram_unlock(tp);
|
||||
|
||||
if (tg3_test_registers(tp) != 0) {
|
||||
etest->flags |= ETH_TEST_FL_FAILED;
|
||||
data[2] = 1;
|
||||
}
|
||||
if (tg3_test_memory(tp) != 0) {
|
||||
etest->flags |= ETH_TEST_FL_FAILED;
|
||||
data[3] = 1;
|
||||
}
|
||||
if (tg3_test_loopback(tp) != 0) {
|
||||
etest->flags |= ETH_TEST_FL_FAILED;
|
||||
data[4] = 1;
|
||||
}
|
||||
|
||||
spin_unlock(&tp->tx_lock);
|
||||
spin_unlock_irq(&tp->lock);
|
||||
if (tg3_test_interrupt(tp) != 0) {
|
||||
etest->flags |= ETH_TEST_FL_FAILED;
|
||||
data[5] = 1;
|
||||
}
|
||||
spin_lock_irq(&tp->lock);
|
||||
spin_lock(&tp->tx_lock);
|
||||
|
||||
tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
|
||||
if (netif_running(dev)) {
|
||||
tp->tg3_flags |= TG3_FLAG_INIT_COMPLETE;
|
||||
tg3_init_hw(tp);
|
||||
tg3_netif_start(tp);
|
||||
}
|
||||
spin_unlock(&tp->tx_lock);
|
||||
spin_unlock_irq(&tp->lock);
|
||||
}
|
||||
}
|
||||
|
||||
static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
|
||||
{
|
||||
struct mii_ioctl_data *data = if_mii(ifr);
|
||||
|
@ -7331,6 +7870,8 @@ static struct ethtool_ops tg3_ethtool_ops = {
|
|||
.get_tso = ethtool_op_get_tso,
|
||||
.set_tso = tg3_set_tso,
|
||||
#endif
|
||||
.self_test_count = tg3_get_test_count,
|
||||
.self_test = tg3_self_test,
|
||||
.get_strings = tg3_get_strings,
|
||||
.get_stats_count = tg3_get_stats_count,
|
||||
.get_ethtool_stats = tg3_get_ethtool_stats,
|
||||
|
@ -9478,7 +10019,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
|
|||
(tr32(WDMAC_MODE) & WDMAC_MODE_ENABLE)) {
|
||||
pci_save_state(tp->pdev);
|
||||
tw32(MEMARB_MODE, MEMARB_MODE_ENABLE);
|
||||
tg3_halt(tp, 1);
|
||||
tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
|
||||
}
|
||||
|
||||
err = tg3_test_dma(tp);
|
||||
|
@ -9605,7 +10146,7 @@ static int tg3_suspend(struct pci_dev *pdev, pm_message_t state)
|
|||
|
||||
spin_lock_irq(&tp->lock);
|
||||
spin_lock(&tp->tx_lock);
|
||||
tg3_halt(tp, 1);
|
||||
tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
|
||||
spin_unlock(&tp->tx_lock);
|
||||
spin_unlock_irq(&tp->lock);
|
||||
|
||||
|
|
|
@ -18,6 +18,7 @@
|
|||
#include <linux/pci.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/acpi.h>
|
||||
#include "pci.h"
|
||||
|
||||
/* Deal with broken BIOS'es that neglect to enable passive release,
|
||||
|
@ -467,9 +468,6 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_APIC,
|
|||
* non-x86 architectures (yes Via exists on PPC among other places),
|
||||
* we must mask the PCI_INTERRUPT_LINE value versus 0xf to get
|
||||
* interrupts delivered properly.
|
||||
*
|
||||
* TODO: When we have device-specific interrupt routers,
|
||||
* quirk_via_irqpic will go away from quirks.
|
||||
*/
|
||||
|
||||
/*
|
||||
|
@ -494,6 +492,29 @@ static void __devinit quirk_via_acpi(struct pci_dev *d)
|
|||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3, quirk_via_acpi );
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4, quirk_via_acpi );
|
||||
|
||||
static void quirk_via_irqpic(struct pci_dev *dev)
|
||||
{
|
||||
u8 irq, new_irq;
|
||||
|
||||
#ifdef CONFIG_X86_IO_APIC
|
||||
if (nr_ioapics && !skip_ioapic_setup)
|
||||
return;
|
||||
#endif
|
||||
#ifdef CONFIG_ACPI
|
||||
if (acpi_irq_model != ACPI_IRQ_MODEL_PIC)
|
||||
return;
|
||||
#endif
|
||||
new_irq = dev->irq & 0xf;
|
||||
pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
|
||||
if (new_irq != irq) {
|
||||
printk(KERN_INFO "PCI: Via PIC IRQ fixup for %s, from %d to %d\n",
|
||||
pci_name(dev), irq, new_irq);
|
||||
udelay(15); /* unknown if delay really needed */
|
||||
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, new_irq);
|
||||
}
|
||||
}
|
||||
DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_VIA, PCI_ANY_ID, quirk_via_irqpic);
|
||||
|
||||
/*
|
||||
* PIIX3 USB: We have to disable USB interrupts that are
|
||||
* hardwired to PIRQD# and may be shared with an
|
||||
|
@ -683,19 +704,6 @@ static void __init quirk_disable_pxb(struct pci_dev *pdev)
|
|||
}
|
||||
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82454NX, quirk_disable_pxb );
|
||||
|
||||
/*
|
||||
* VIA northbridges care about PCI_INTERRUPT_LINE
|
||||
*/
|
||||
int via_interrupt_line_quirk;
|
||||
|
||||
static void __devinit quirk_via_bridge(struct pci_dev *pdev)
|
||||
{
|
||||
if(pdev->devfn == 0) {
|
||||
printk(KERN_INFO "PCI: Via IRQ fixup\n");
|
||||
via_interrupt_line_quirk = 1;
|
||||
}
|
||||
}
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_ANY_ID, quirk_via_bridge );
|
||||
|
||||
/*
|
||||
* Serverworks CSB5 IDE does not fully support native mode
|
||||
|
|
|
@ -32,6 +32,7 @@
|
|||
#include <linux/delay.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include "scsi.h"
|
||||
#include <scsi/scsi_host.h>
|
||||
#include <linux/libata.h>
|
||||
|
@ -289,6 +290,8 @@ static void ahci_host_stop(struct ata_host_set *host_set)
|
|||
{
|
||||
struct ahci_host_priv *hpriv = host_set->private_data;
|
||||
kfree(hpriv);
|
||||
|
||||
ata_host_stop(host_set);
|
||||
}
|
||||
|
||||
static int ahci_port_start(struct ata_port *ap)
|
||||
|
|
|
@ -2488,7 +2488,7 @@ ahd_linux_dv_thread(void *data)
|
|||
sprintf(current->comm, "ahd_dv_%d", ahd->unit);
|
||||
#else
|
||||
daemonize("ahd_dv_%d", ahd->unit);
|
||||
current->flags |= PF_FREEZE;
|
||||
current->flags |= PF_NOFREEZE;
|
||||
#endif
|
||||
unlock_kernel();
|
||||
|
||||
|
|
|
@ -153,6 +153,7 @@ static struct ata_port_operations piix_pata_ops = {
|
|||
|
||||
.port_start = ata_port_start,
|
||||
.port_stop = ata_port_stop,
|
||||
.host_stop = ata_host_stop,
|
||||
};
|
||||
|
||||
static struct ata_port_operations piix_sata_ops = {
|
||||
|
@ -180,6 +181,7 @@ static struct ata_port_operations piix_sata_ops = {
|
|||
|
||||
.port_start = ata_port_start,
|
||||
.port_stop = ata_port_stop,
|
||||
.host_stop = ata_host_stop,
|
||||
};
|
||||
|
||||
static struct ata_port_info piix_port_info[] = {
|
||||
|
|
|
@ -3322,6 +3322,13 @@ void ata_port_stop (struct ata_port *ap)
|
|||
dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
|
||||
}
|
||||
|
||||
void ata_host_stop (struct ata_host_set *host_set)
|
||||
{
|
||||
if (host_set->mmio_base)
|
||||
iounmap(host_set->mmio_base);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* ata_host_remove - Unregister SCSI host structure with upper layers
|
||||
* @ap: Port to unregister
|
||||
|
@ -3878,10 +3885,6 @@ void ata_pci_remove_one (struct pci_dev *pdev)
|
|||
}
|
||||
|
||||
free_irq(host_set->irq, host_set);
|
||||
if (host_set->ops->host_stop)
|
||||
host_set->ops->host_stop(host_set);
|
||||
if (host_set->mmio_base)
|
||||
iounmap(host_set->mmio_base);
|
||||
|
||||
for (i = 0; i < host_set->n_ports; i++) {
|
||||
ap = host_set->ports[i];
|
||||
|
@ -3900,6 +3903,9 @@ void ata_pci_remove_one (struct pci_dev *pdev)
|
|||
scsi_host_put(ap->host);
|
||||
}
|
||||
|
||||
if (host_set->ops->host_stop)
|
||||
host_set->ops->host_stop(host_set);
|
||||
|
||||
kfree(host_set);
|
||||
|
||||
pci_release_regions(pdev);
|
||||
|
@ -3997,6 +4003,7 @@ EXPORT_SYMBOL_GPL(ata_chk_err);
|
|||
EXPORT_SYMBOL_GPL(ata_exec_command);
|
||||
EXPORT_SYMBOL_GPL(ata_port_start);
|
||||
EXPORT_SYMBOL_GPL(ata_port_stop);
|
||||
EXPORT_SYMBOL_GPL(ata_host_stop);
|
||||
EXPORT_SYMBOL_GPL(ata_interrupt);
|
||||
EXPORT_SYMBOL_GPL(ata_qc_prep);
|
||||
EXPORT_SYMBOL_GPL(ata_bmdma_setup);
|
||||
|
|
|
@ -26,7 +26,7 @@
|
|||
#define __LIBATA_H__
|
||||
|
||||
#define DRV_NAME "libata"
|
||||
#define DRV_VERSION "1.10" /* must be exactly four chars */
|
||||
#define DRV_VERSION "1.11" /* must be exactly four chars */
|
||||
|
||||
struct ata_scsi_args {
|
||||
u16 *id;
|
||||
|
|
|
@ -329,6 +329,8 @@ static void nv_host_stop (struct ata_host_set *host_set)
|
|||
host->host_desc->disable_hotplug(host_set);
|
||||
|
||||
kfree(host);
|
||||
|
||||
ata_host_stop(host_set);
|
||||
}
|
||||
|
||||
static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
|
|
|
@ -122,6 +122,7 @@ static struct ata_port_operations pdc_ata_ops = {
|
|||
.scr_write = pdc_sata_scr_write,
|
||||
.port_start = pdc_port_start,
|
||||
.port_stop = pdc_port_stop,
|
||||
.host_stop = ata_host_stop,
|
||||
};
|
||||
|
||||
static struct ata_port_info pdc_port_info[] = {
|
||||
|
|
|
@ -536,6 +536,8 @@ static void qs_host_stop(struct ata_host_set *host_set)
|
|||
|
||||
writeb(0, mmio_base + QS_HCT_CTRL); /* disable host interrupts */
|
||||
writeb(QS_CNFG3_GSRST, mmio_base + QS_HCF_CNFG3); /* global reset */
|
||||
|
||||
ata_host_stop(host_set);
|
||||
}
|
||||
|
||||
static void qs_host_init(unsigned int chip_id, struct ata_probe_ent *pe)
|
||||
|
|
|
@ -161,6 +161,7 @@ static struct ata_port_operations sil_ops = {
|
|||
.scr_write = sil_scr_write,
|
||||
.port_start = ata_port_start,
|
||||
.port_stop = ata_port_stop,
|
||||
.host_stop = ata_host_stop,
|
||||
};
|
||||
|
||||
static struct ata_port_info sil_port_info[] = {
|
||||
|
|
|
@ -114,6 +114,7 @@ static struct ata_port_operations sis_ops = {
|
|||
.scr_write = sis_scr_write,
|
||||
.port_start = ata_port_start,
|
||||
.port_stop = ata_port_stop,
|
||||
.host_stop = ata_host_stop,
|
||||
};
|
||||
|
||||
static struct ata_port_info sis_port_info = {
|
||||
|
|
|
@ -313,6 +313,7 @@ static struct ata_port_operations k2_sata_ops = {
|
|||
.scr_write = k2_sata_scr_write,
|
||||
.port_start = ata_port_start,
|
||||
.port_stop = ata_port_stop,
|
||||
.host_stop = ata_host_stop,
|
||||
};
|
||||
|
||||
static void k2_sata_setup_port(struct ata_ioports *port, unsigned long base)
|
||||
|
|
|
@ -245,6 +245,8 @@ static void pdc20621_host_stop(struct ata_host_set *host_set)
|
|||
|
||||
iounmap(dimm_mmio);
|
||||
kfree(hpriv);
|
||||
|
||||
ata_host_stop(host_set);
|
||||
}
|
||||
|
||||
static int pdc_port_start(struct ata_port *ap)
|
||||
|
|
|
@ -113,6 +113,7 @@ static struct ata_port_operations uli_ops = {
|
|||
|
||||
.port_start = ata_port_start,
|
||||
.port_stop = ata_port_stop,
|
||||
.host_stop = ata_host_stop,
|
||||
};
|
||||
|
||||
static struct ata_port_info uli_port_info = {
|
||||
|
|
|
@ -134,6 +134,7 @@ static struct ata_port_operations svia_sata_ops = {
|
|||
|
||||
.port_start = ata_port_start,
|
||||
.port_stop = ata_port_stop,
|
||||
.host_stop = ata_host_stop,
|
||||
};
|
||||
|
||||
static struct ata_port_info svia_port_info = {
|
||||
|
|
|
@ -21,6 +21,7 @@
|
|||
#include <linux/blkdev.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include "scsi.h"
|
||||
#include <scsi/scsi_host.h>
|
||||
#include <linux/libata.h>
|
||||
|
@ -230,6 +231,7 @@ static struct ata_port_operations vsc_sata_ops = {
|
|||
.scr_write = vsc_sata_scr_write,
|
||||
.port_start = ata_port_start,
|
||||
.port_stop = ata_port_stop,
|
||||
.host_stop = ata_host_stop,
|
||||
};
|
||||
|
||||
static void __devinit vsc_sata_setup_port(struct ata_ioports *port, unsigned long base)
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
ifneq ($(KERNELRELEASE),)
|
||||
|
||||
pwc-objs := pwc-if.o pwc-misc.o pwc-ctrl.o pwc-uncompress.o pwc-dec1.o pwc-dec23.o pwc-kiara.o pwc-timon.o
|
||||
pwc-objs := pwc-if.o pwc-misc.o pwc-ctrl.o pwc-uncompress.o pwc-timon.o pwc-kiara.o
|
||||
|
||||
obj-$(CONFIG_USB_PWC) += pwc.o
|
||||
|
||||
|
|
|
@ -48,8 +48,6 @@
|
|||
#include "pwc-uncompress.h"
|
||||
#include "pwc-kiara.h"
|
||||
#include "pwc-timon.h"
|
||||
#include "pwc-dec1.h"
|
||||
#include "pwc-dec23.h"
|
||||
|
||||
/* Request types: video */
|
||||
#define SET_LUM_CTL 0x01
|
||||
|
@ -246,7 +244,7 @@ static inline int set_video_mode_Nala(struct pwc_device *pdev, int size, int fra
|
|||
switch(pdev->type) {
|
||||
case 645:
|
||||
case 646:
|
||||
pwc_dec1_init(pdev->type, pdev->release, buf, pdev->decompress_data);
|
||||
/* pwc_dec1_init(pdev->type, pdev->release, buf, pdev->decompress_data); */
|
||||
break;
|
||||
|
||||
case 675:
|
||||
|
@ -256,7 +254,7 @@ static inline int set_video_mode_Nala(struct pwc_device *pdev, int size, int fra
|
|||
case 730:
|
||||
case 740:
|
||||
case 750:
|
||||
pwc_dec23_init(pdev->type, pdev->release, buf, pdev->decompress_data);
|
||||
/* pwc_dec23_init(pdev->type, pdev->release, buf, pdev->decompress_data); */
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -318,8 +316,8 @@ static inline int set_video_mode_Timon(struct pwc_device *pdev, int size, int fr
|
|||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
if (pChoose->bandlength > 0 && pdev->vpalette != VIDEO_PALETTE_RAW)
|
||||
pwc_dec23_init(pdev->type, pdev->release, buf, pdev->decompress_data);
|
||||
/* if (pChoose->bandlength > 0 && pdev->vpalette != VIDEO_PALETTE_RAW)
|
||||
pwc_dec23_init(pdev->type, pdev->release, buf, pdev->decompress_data); */
|
||||
|
||||
pdev->cmd_len = 13;
|
||||
memcpy(pdev->cmd_buf, buf, 13);
|
||||
|
@ -397,8 +395,8 @@ static inline int set_video_mode_Kiara(struct pwc_device *pdev, int size, int fr
|
|||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
if (pChoose->bandlength > 0 && pdev->vpalette != VIDEO_PALETTE_RAW)
|
||||
pwc_dec23_init(pdev->type, pdev->release, buf, pdev->decompress_data);
|
||||
/* if (pChoose->bandlength > 0 && pdev->vpalette != VIDEO_PALETTE_RAW)
|
||||
pwc_dec23_init(pdev->type, pdev->release, buf, pdev->decompress_data); */
|
||||
|
||||
pdev->cmd_len = 12;
|
||||
memcpy(pdev->cmd_buf, buf, 12);
|
||||
|
|
|
@ -1,42 +0,0 @@
|
|||
/* Linux driver for Philips webcam
|
||||
Decompression for chipset version 1
|
||||
(C) 2004 Luc Saillard (luc@saillard.org)
|
||||
|
||||
NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx
|
||||
driver and thus may have bugs that are not present in the original version.
|
||||
Please send bug reports and support requests to <luc@saillard.org>.
|
||||
The decompression routines have been implemented by reverse-engineering the
|
||||
Nemosoft binary pwcx module. Caveat emptor.
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 2 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the Free Software
|
||||
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#include "pwc-dec1.h"
|
||||
|
||||
|
||||
void pwc_dec1_init(int type, int release, void *buffer, void *table)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
void pwc_dec1_exit(void)
|
||||
{
|
||||
|
||||
|
||||
|
||||
}
|
||||
|
|
@ -1,36 +0,0 @@
|
|||
/* Linux driver for Philips webcam
|
||||
(C) 2004 Luc Saillard (luc@saillard.org)
|
||||
|
||||
NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx
|
||||
driver and thus may have bugs that are not present in the original version.
|
||||
Please send bug reports and support requests to <luc@saillard.org>.
|
||||
The decompression routines have been implemented by reverse-engineering the
|
||||
Nemosoft binary pwcx module. Caveat emptor.
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 2 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the Free Software
|
||||
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#ifndef PWC_DEC1_H
|
||||
#define PWC_DEC1_H
|
||||
|
||||
void pwc_dec1_init(int type, int release, void *buffer, void *private_data);
|
||||
void pwc_dec1_exit(void);
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
|
@ -1,623 +0,0 @@
|
|||
/* Linux driver for Philips webcam
|
||||
Decompression for chipset version 2 et 3
|
||||
(C) 2004 Luc Saillard (luc@saillard.org)
|
||||
|
||||
NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx
|
||||
driver and thus may have bugs that are not present in the original version.
|
||||
Please send bug reports and support requests to <luc@saillard.org>.
|
||||
The decompression routines have been implemented by reverse-engineering the
|
||||
Nemosoft binary pwcx module. Caveat emptor.
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 2 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the Free Software
|
||||
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include "pwc-timon.h"
|
||||
#include "pwc-kiara.h"
|
||||
#include "pwc-dec23.h"
|
||||
#include "pwc-ioctl.h"
|
||||
|
||||
#include <linux/string.h>
|
||||
|
||||
/****
|
||||
*
|
||||
*
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
static void fill_table_a000(unsigned int *p)
|
||||
{
|
||||
static unsigned int initial_values[12] = {
|
||||
0xFFAD9B00, 0xFFDDEE00, 0x00221200, 0x00526500,
|
||||
0xFFC21E00, 0x003DE200, 0xFF924B80, 0xFFD2A300,
|
||||
0x002D5D00, 0x006DB480, 0xFFED3E00, 0x0012C200
|
||||
};
|
||||
static unsigned int values_derivated[12] = {
|
||||
0x0000A4CA, 0x00004424, 0xFFFFBBDC, 0xFFFF5B36,
|
||||
0x00007BC4, 0xFFFF843C, 0x0000DB69, 0x00005ABA,
|
||||
0xFFFFA546, 0xFFFF2497, 0x00002584, 0xFFFFDA7C
|
||||
};
|
||||
unsigned int temp_values[12];
|
||||
int i,j;
|
||||
|
||||
memcpy(temp_values,initial_values,sizeof(initial_values));
|
||||
for (i=0;i<256;i++)
|
||||
{
|
||||
for (j=0;j<12;j++)
|
||||
{
|
||||
*p++ = temp_values[j];
|
||||
temp_values[j] += values_derivated[j];
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void fill_table_d000(unsigned char *p)
|
||||
{
|
||||
int bit,byte;
|
||||
|
||||
for (bit=0; bit<8; bit++)
|
||||
{
|
||||
unsigned char bitpower = 1<<bit;
|
||||
unsigned char mask = bitpower-1;
|
||||
for (byte=0; byte<256; byte++)
|
||||
{
|
||||
if (byte & bitpower)
|
||||
*p++ = -(byte & mask);
|
||||
else
|
||||
*p++ = (byte & mask);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
*
|
||||
* Kiara: 0 <= ver <= 7
|
||||
* Timon: 0 <= ver <= 15
|
||||
*
|
||||
*/
|
||||
static void fill_table_color(unsigned int version, const unsigned int *romtable,
|
||||
unsigned char *p0004,
|
||||
unsigned char *p8004)
|
||||
{
|
||||
const unsigned int *table;
|
||||
unsigned char *p0, *p8;
|
||||
int i,j,k;
|
||||
int dl,bit,pw;
|
||||
|
||||
romtable += version*256;
|
||||
|
||||
for (i=0; i<2; i++)
|
||||
{
|
||||
table = romtable + i*128;
|
||||
|
||||
for (dl=0; dl<16; dl++)
|
||||
{
|
||||
p0 = p0004 + (i<<14) + (dl<<10);
|
||||
p8 = p8004 + (i<<12) + (dl<<8);
|
||||
|
||||
for (j=0; j<8; j++ , table++, p0+=128)
|
||||
{
|
||||
for (k=0; k<16; k++)
|
||||
{
|
||||
if (k==0)
|
||||
bit=1;
|
||||
else if (k>=1 && k<3)
|
||||
bit=(table[0]>>15)&7;
|
||||
else if (k>=3 && k<6)
|
||||
bit=(table[0]>>12)&7;
|
||||
else if (k>=6 && k<10)
|
||||
bit=(table[0]>>9)&7;
|
||||
else if (k>=10 && k<13)
|
||||
bit=(table[0]>>6)&7;
|
||||
else if (k>=13 && k<15)
|
||||
bit=(table[0]>>3)&7;
|
||||
else
|
||||
bit=(table[0])&7;
|
||||
if (k == 0)
|
||||
*(unsigned char *)p8++ = 8;
|
||||
else
|
||||
*(unsigned char *)p8++ = j - bit;
|
||||
*(unsigned char *)p8++ = bit;
|
||||
|
||||
pw = 1<<bit;
|
||||
p0[k+0x00] = (1*pw) + 0x80;
|
||||
p0[k+0x10] = (2*pw) + 0x80;
|
||||
p0[k+0x20] = (3*pw) + 0x80;
|
||||
p0[k+0x30] = (4*pw) + 0x80;
|
||||
p0[k+0x40] = (-pw) + 0x80;
|
||||
p0[k+0x50] = (2*-pw) + 0x80;
|
||||
p0[k+0x60] = (3*-pw) + 0x80;
|
||||
p0[k+0x70] = (4*-pw) + 0x80;
|
||||
} /* end of for (k=0; k<16; k++, p8++) */
|
||||
} /* end of for (j=0; j<8; j++ , table++) */
|
||||
} /* end of for (dl=0; dl<16; dl++) */
|
||||
} /* end of for (i=0; i<2; i++) */
|
||||
}
|
||||
|
||||
/*
|
||||
* precision = (pdev->xx + pdev->yy)
|
||||
*
|
||||
*/
|
||||
static void fill_table_dc00_d800(unsigned int precision, unsigned int *pdc00, unsigned int *pd800)
|
||||
{
|
||||
int i;
|
||||
unsigned int offset1, offset2;
|
||||
|
||||
for(i=0,offset1=0x4000, offset2=0; i<256 ; i++,offset1+=0x7BC4, offset2+=0x7BC4)
|
||||
{
|
||||
unsigned int msb = offset1 >> 15;
|
||||
|
||||
if ( msb > 255)
|
||||
{
|
||||
if (msb)
|
||||
msb=0;
|
||||
else
|
||||
msb=255;
|
||||
}
|
||||
|
||||
*pdc00++ = msb << precision;
|
||||
*pd800++ = offset2;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
* struct {
|
||||
* unsigned char op; // operation to execute
|
||||
* unsigned char bits; // bits use to perform operation
|
||||
* unsigned char offset1; // offset to add to access in the table_0004 % 16
|
||||
* unsigned char offset2; // offset to add to access in the table_0004
|
||||
* }
|
||||
*
|
||||
*/
|
||||
static unsigned int table_ops[] = {
|
||||
0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x00, 0x00,0x04,0x01,0x10, 0x00,0x06,0x01,0x30,
|
||||
0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x40, 0x00,0x05,0x01,0x20, 0x01,0x00,0x00,0x00,
|
||||
0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x00, 0x00,0x04,0x01,0x50, 0x00,0x05,0x02,0x00,
|
||||
0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x40, 0x00,0x05,0x03,0x00, 0x01,0x00,0x00,0x00,
|
||||
0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x00, 0x00,0x04,0x01,0x10, 0x00,0x06,0x02,0x10,
|
||||
0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x40, 0x00,0x05,0x01,0x60, 0x01,0x00,0x00,0x00,
|
||||
0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x00, 0x00,0x04,0x01,0x50, 0x00,0x05,0x02,0x40,
|
||||
0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x40, 0x00,0x05,0x03,0x40, 0x01,0x00,0x00,0x00,
|
||||
0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x00, 0x00,0x04,0x01,0x10, 0x00,0x06,0x01,0x70,
|
||||
0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x40, 0x00,0x05,0x01,0x20, 0x01,0x00,0x00,0x00,
|
||||
0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x00, 0x00,0x04,0x01,0x50, 0x00,0x05,0x02,0x00,
|
||||
0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x40, 0x00,0x05,0x03,0x00, 0x01,0x00,0x00,0x00,
|
||||
0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x00, 0x00,0x04,0x01,0x10, 0x00,0x06,0x02,0x50,
|
||||
0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x40, 0x00,0x05,0x01,0x60, 0x01,0x00,0x00,0x00,
|
||||
0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x00, 0x00,0x04,0x01,0x50, 0x00,0x05,0x02,0x40,
|
||||
0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x40, 0x00,0x05,0x03,0x40, 0x01,0x00,0x00,0x00
|
||||
};
|
||||
|
||||
/*
|
||||
* TODO: multiply by 4 all values
|
||||
*
|
||||
*/
|
||||
static unsigned int MulIdx[256] = {
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 1, 2, 3, 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, 2, 3,
|
||||
0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3,
|
||||
4, 4, 4, 4, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4,
|
||||
6, 7, 8, 9, 7,10,11, 8, 8,11,10, 7, 9, 8, 7, 6,
|
||||
4, 5, 5, 4, 4, 5, 5, 4, 4, 5, 5, 4, 4, 5, 5, 4,
|
||||
1, 3, 0, 2, 1, 3, 0, 2, 1, 3, 0, 2, 1, 3, 0, 2,
|
||||
0, 3, 3, 0, 1, 2, 2, 1, 2, 1, 1, 2, 3, 0, 0, 3,
|
||||
0, 1, 2, 3, 3, 2, 1, 0, 3, 2, 1, 0, 0, 1, 2, 3,
|
||||
1, 1, 1, 1, 3, 3, 3, 3, 0, 0, 0, 0, 2, 2, 2, 2,
|
||||
7,10,11, 8, 9, 8, 7, 6, 6, 7, 8, 9, 8,11,10, 7,
|
||||
4, 5, 5, 4, 5, 4, 4, 5, 5, 4, 4, 5, 4, 5, 5, 4,
|
||||
7, 9, 6, 8,10, 8, 7,11,11, 7, 8,10, 8, 6, 9, 7,
|
||||
1, 3, 0, 2, 2, 0, 3, 1, 2, 0, 3, 1, 1, 3, 0, 2,
|
||||
1, 2, 2, 1, 3, 0, 0, 3, 0, 3, 3, 0, 2, 1, 1, 2,
|
||||
10, 8, 7,11, 8, 6, 9, 7, 7, 9, 6, 8,11, 7, 8,10
|
||||
};
|
||||
|
||||
|
||||
|
||||
void pwc_dec23_init(int type, int release, unsigned char *mode, void *data)
|
||||
{
|
||||
int flags;
|
||||
struct pwc_dec23_private *pdev = data;
|
||||
release = release;
|
||||
|
||||
switch (type)
|
||||
{
|
||||
case 720:
|
||||
case 730:
|
||||
case 740:
|
||||
case 750:
|
||||
flags = mode[2]&0x18; /* our: flags = 8, mode[2]==e8 */
|
||||
if (flags==8)
|
||||
pdev->zz = 7;
|
||||
else if (flags==0x10)
|
||||
pdev->zz = 8;
|
||||
else
|
||||
pdev->zz = 6;
|
||||
flags = mode[2]>>5; /* our: 7 */
|
||||
|
||||
fill_table_color(flags, (unsigned int *)KiaraRomTable, pdev->table_0004, pdev->table_8004);
|
||||
break;
|
||||
|
||||
|
||||
case 675:
|
||||
case 680:
|
||||
case 690:
|
||||
flags = mode[2]&6;
|
||||
if (flags==2)
|
||||
pdev->zz = 7;
|
||||
else if (flags==4)
|
||||
pdev->zz = 8;
|
||||
else
|
||||
pdev->zz = 6;
|
||||
flags = mode[2]>>3;
|
||||
|
||||
fill_table_color(flags, (unsigned int *)TimonRomTable, pdev->table_0004, pdev->table_8004);
|
||||
break;
|
||||
|
||||
default:
|
||||
/* Not supported */
|
||||
return;
|
||||
}
|
||||
|
||||
/* * * * ** */
|
||||
pdev->xx = 8 - pdev->zz;
|
||||
pdev->yy = 15 - pdev->xx;
|
||||
pdev->zzmask = 0xFF>>pdev->xx;
|
||||
//pdev->zzmask = (1U<<pdev->zz)-1;
|
||||
|
||||
|
||||
fill_table_dc00_d800(pdev->xx + pdev->yy, pdev->table_dc00, pdev->table_d800);
|
||||
fill_table_a000(pdev->table_a004);
|
||||
fill_table_d000(pdev->table_d004);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* To manage the stream, we keep in a 32 bits variables,
|
||||
* the next bits in the stream. fill_reservoir() add to
|
||||
* the reservoir at least wanted nbits.
|
||||
*
|
||||
*
|
||||
*/
|
||||
#define fill_nbits(reservoir,nbits_in_reservoir,stream,nbits_wanted) do { \
|
||||
while (nbits_in_reservoir<nbits_wanted) \
|
||||
{ \
|
||||
reservoir |= (*(stream)++) << nbits_in_reservoir; \
|
||||
nbits_in_reservoir+=8; \
|
||||
} \
|
||||
} while(0);
|
||||
|
||||
#define get_nbits(reservoir,nbits_in_reservoir,stream,nbits_wanted,result) do { \
|
||||
fill_nbits(reservoir,nbits_in_reservoir,stream,nbits_wanted); \
|
||||
result = (reservoir) & ((1U<<nbits_wanted)-1); \
|
||||
reservoir >>= nbits_wanted; \
|
||||
nbits_in_reservoir -= nbits_wanted; \
|
||||
} while(0);
|
||||
|
||||
|
||||
|
||||
static void DecompressBand23(const struct pwc_dec23_private *pdev,
|
||||
const unsigned char *rawyuv,
|
||||
unsigned char *planar_y,
|
||||
unsigned char *planar_u,
|
||||
unsigned char *planar_v,
|
||||
unsigned int image_x, /* aka number of pixels wanted ??? */
|
||||
unsigned int pixels_per_line, /* aka number of pixels per line */
|
||||
int flags)
|
||||
{
|
||||
|
||||
|
||||
unsigned int reservoir, nbits_in_reservoir;
|
||||
int first_4_bits;
|
||||
unsigned int bytes_per_channel;
|
||||
int line_size; /* size of the line (4Y+U+V) */
|
||||
int passes;
|
||||
const unsigned char *ptable0004, *ptable8004;
|
||||
|
||||
int even_line;
|
||||
unsigned int temp_colors[16];
|
||||
int nblocks;
|
||||
|
||||
const unsigned char *stream;
|
||||
unsigned char *dest_y, *dest_u=NULL, *dest_v=NULL;
|
||||
unsigned int offset_to_plane_u, offset_to_plane_v;
|
||||
|
||||
int i;
|
||||
|
||||
|
||||
reservoir = 0;
|
||||
nbits_in_reservoir = 0;
|
||||
stream = rawyuv+1; /* The first byte of the stream is skipped */
|
||||
even_line = 1;
|
||||
|
||||
get_nbits(reservoir,nbits_in_reservoir,stream,4,first_4_bits);
|
||||
|
||||
line_size = pixels_per_line*3;
|
||||
|
||||
for (passes=0;passes<2;passes++)
|
||||
{
|
||||
if (passes==0)
|
||||
{
|
||||
bytes_per_channel = pixels_per_line;
|
||||
dest_y = planar_y;
|
||||
nblocks = image_x/4;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Format planar: All Y, then all U, then all V */
|
||||
bytes_per_channel = pixels_per_line/2;
|
||||
dest_u = planar_u;
|
||||
dest_v = planar_v;
|
||||
dest_y = dest_u;
|
||||
nblocks = image_x/8;
|
||||
}
|
||||
|
||||
offset_to_plane_u = bytes_per_channel*2;
|
||||
offset_to_plane_v = bytes_per_channel*3;
|
||||
/*
|
||||
printf("bytes_per_channel = %d\n",bytes_per_channel);
|
||||
printf("offset_to_plane_u = %d\n",offset_to_plane_u);
|
||||
printf("offset_to_plane_v = %d\n",offset_to_plane_v);
|
||||
*/
|
||||
|
||||
while (nblocks-->0)
|
||||
{
|
||||
unsigned int gray_index;
|
||||
|
||||
fill_nbits(reservoir,nbits_in_reservoir,stream,16);
|
||||
gray_index = reservoir & pdev->zzmask;
|
||||
reservoir >>= pdev->zz;
|
||||
nbits_in_reservoir -= pdev->zz;
|
||||
|
||||
fill_nbits(reservoir,nbits_in_reservoir,stream,2);
|
||||
|
||||
if ( (reservoir & 3) == 0)
|
||||
{
|
||||
reservoir>>=2;
|
||||
nbits_in_reservoir-=2;
|
||||
for (i=0;i<16;i++)
|
||||
temp_colors[i] = pdev->table_dc00[gray_index];
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
unsigned int channel_v, offset1;
|
||||
|
||||
/* swap bit 0 and 2 of offset_OR */
|
||||
channel_v = ((reservoir & 1) << 2) | (reservoir & 2) | ((reservoir & 4)>>2);
|
||||
reservoir>>=3;
|
||||
nbits_in_reservoir-=3;
|
||||
|
||||
for (i=0;i<16;i++)
|
||||
temp_colors[i] = pdev->table_d800[gray_index];
|
||||
|
||||
ptable0004 = pdev->table_0004 + (passes*16384) + (first_4_bits*1024) + (channel_v*128);
|
||||
ptable8004 = pdev->table_8004 + (passes*4096) + (first_4_bits*256) + (channel_v*32);
|
||||
|
||||
offset1 = 0;
|
||||
while(1)
|
||||
{
|
||||
unsigned int index_in_table_ops, op, rows=0;
|
||||
fill_nbits(reservoir,nbits_in_reservoir,stream,16);
|
||||
|
||||
/* mode is 0,1 or 2 */
|
||||
index_in_table_ops = (reservoir&0x3F);
|
||||
op = table_ops[ index_in_table_ops*4 ];
|
||||
if (op == 2)
|
||||
{
|
||||
reservoir >>= 2;
|
||||
nbits_in_reservoir -= 2;
|
||||
break; /* exit the while(1) */
|
||||
}
|
||||
if (op == 0)
|
||||
{
|
||||
unsigned int shift;
|
||||
|
||||
offset1 = (offset1 + table_ops[index_in_table_ops*4+2]) & 0x0F;
|
||||
shift = table_ops[ index_in_table_ops*4+1 ];
|
||||
reservoir >>= shift;
|
||||
nbits_in_reservoir -= shift;
|
||||
rows = ptable0004[ offset1 + table_ops[index_in_table_ops*4+3] ];
|
||||
}
|
||||
if (op == 1)
|
||||
{
|
||||
/* 10bits [ xxxx xxxx yyyy 000 ]
|
||||
* yyy => offset in the table8004
|
||||
* xxx => offset in the tabled004
|
||||
*/
|
||||
unsigned int mask, shift;
|
||||
unsigned int col1, row1, total_bits;
|
||||
|
||||
offset1 = (offset1 + ((reservoir>>3)&0x0F)+1) & 0x0F;
|
||||
|
||||
col1 = (reservoir>>7) & 0xFF;
|
||||
row1 = ptable8004 [ offset1*2 ];
|
||||
|
||||
/* Bit mask table */
|
||||
mask = pdev->table_d004[ (row1<<8) + col1 ];
|
||||
shift = ptable8004 [ offset1*2 + 1];
|
||||
rows = ((mask << shift) + 0x80) & 0xFF;
|
||||
|
||||
total_bits = row1 + 8;
|
||||
reservoir >>= total_bits;
|
||||
nbits_in_reservoir -= total_bits;
|
||||
}
|
||||
{
|
||||
const unsigned int *table_a004 = pdev->table_a004 + rows*12;
|
||||
unsigned int *poffset = MulIdx + offset1*16; /* 64/4 (int) */
|
||||
for (i=0;i<16;i++)
|
||||
{
|
||||
temp_colors[i] += table_a004[ *poffset ];
|
||||
poffset++;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
#define USE_SIGNED_INT_FOR_COLOR
|
||||
#ifdef USE_SIGNED_INT_FOR_COLOR
|
||||
# define CLAMP(x) ((x)>255?255:((x)<0?0:x))
|
||||
#else
|
||||
# define CLAMP(x) ((x)>255?255:x)
|
||||
#endif
|
||||
|
||||
if (passes == 0)
|
||||
{
|
||||
#ifdef USE_SIGNED_INT_FOR_COLOR
|
||||
const int *c = temp_colors;
|
||||
#else
|
||||
const unsigned int *c = temp_colors;
|
||||
#endif
|
||||
unsigned char *d;
|
||||
|
||||
d = dest_y;
|
||||
for (i=0;i<4;i++,c++)
|
||||
*d++ = CLAMP((*c) >> pdev->yy);
|
||||
|
||||
d = dest_y + bytes_per_channel;
|
||||
for (i=0;i<4;i++,c++)
|
||||
*d++ = CLAMP((*c) >> pdev->yy);
|
||||
|
||||
d = dest_y + offset_to_plane_u;
|
||||
for (i=0;i<4;i++,c++)
|
||||
*d++ = CLAMP((*c) >> pdev->yy);
|
||||
|
||||
d = dest_y + offset_to_plane_v;
|
||||
for (i=0;i<4;i++,c++)
|
||||
*d++ = CLAMP((*c) >> pdev->yy);
|
||||
|
||||
dest_y += 4;
|
||||
}
|
||||
else if (passes == 1)
|
||||
{
|
||||
#ifdef USE_SIGNED_INT_FOR_COLOR
|
||||
int *c1 = temp_colors;
|
||||
int *c2 = temp_colors+4;
|
||||
#else
|
||||
unsigned int *c1 = temp_colors;
|
||||
unsigned int *c2 = temp_colors+4;
|
||||
#endif
|
||||
unsigned char *d;
|
||||
|
||||
d = dest_y;
|
||||
for (i=0;i<4;i++,c1++,c2++)
|
||||
{
|
||||
*d++ = CLAMP((*c1) >> pdev->yy);
|
||||
*d++ = CLAMP((*c2) >> pdev->yy);
|
||||
}
|
||||
c1 = temp_colors+12;
|
||||
//c2 = temp_colors+8;
|
||||
d = dest_y + bytes_per_channel;
|
||||
for (i=0;i<4;i++,c1++,c2++)
|
||||
{
|
||||
*d++ = CLAMP((*c1) >> pdev->yy);
|
||||
*d++ = CLAMP((*c2) >> pdev->yy);
|
||||
}
|
||||
|
||||
if (even_line) /* Each line, swap u/v */
|
||||
{
|
||||
even_line=0;
|
||||
dest_y = dest_v;
|
||||
dest_u += 8;
|
||||
}
|
||||
else
|
||||
{
|
||||
even_line=1;
|
||||
dest_y = dest_u;
|
||||
dest_v += 8;
|
||||
}
|
||||
}
|
||||
|
||||
} /* end of while (nblocks-->0) */
|
||||
|
||||
} /* end of for (passes=0;passes<2;passes++) */
|
||||
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
*
|
||||
* image: size of the image wanted
|
||||
* view : size of the image returned by the camera
|
||||
* offset: (x,y) to displayer image in the view
|
||||
*
|
||||
* src: raw data
|
||||
* dst: image output
|
||||
* flags: PWCX_FLAG_PLANAR
|
||||
* pdev: private buffer
|
||||
* bandlength:
|
||||
*
|
||||
*/
|
||||
void pwc_dec23_decompress(const struct pwc_coord *image,
|
||||
const struct pwc_coord *view,
|
||||
const struct pwc_coord *offset,
|
||||
const void *src,
|
||||
void *dst,
|
||||
int flags,
|
||||
const void *data,
|
||||
int bandlength)
|
||||
{
|
||||
const struct pwc_dec23_private *pdev = data;
|
||||
unsigned char *pout, *pout_planar_y=NULL, *pout_planar_u=NULL, *pout_planar_v=NULL;
|
||||
int i,n,stride,pixel_size;
|
||||
|
||||
|
||||
if (flags & PWCX_FLAG_BAYER)
|
||||
{
|
||||
pout = dst + (view->x * offset->y) + offset->x;
|
||||
pixel_size = view->x * 4;
|
||||
}
|
||||
else
|
||||
{
|
||||
n = view->x * view->y;
|
||||
|
||||
/* offset in Y plane */
|
||||
stride = view->x * offset->y;
|
||||
pout_planar_y = dst + stride + offset->x;
|
||||
|
||||
/* offsets in U/V planes */
|
||||
stride = (view->x * offset->y)/4 + offset->x/2;
|
||||
pout_planar_u = dst + n + + stride;
|
||||
pout_planar_v = dst + n + n/4 + stride;
|
||||
|
||||
pixel_size = view->x * 4;
|
||||
}
|
||||
|
||||
|
||||
for (i=0;i<image->y;i+=4)
|
||||
{
|
||||
if (flags & PWCX_FLAG_BAYER)
|
||||
{
|
||||
//TODO:
|
||||
//DecompressBandBayer(pdev,src,pout,image.x,view->x,flags);
|
||||
src += bandlength;
|
||||
pout += pixel_size;
|
||||
}
|
||||
else
|
||||
{
|
||||
DecompressBand23(pdev,src,pout_planar_y,pout_planar_u,pout_planar_v,image->x,view->x,flags);
|
||||
src += bandlength;
|
||||
pout_planar_y += pixel_size;
|
||||
pout_planar_u += view->x;
|
||||
pout_planar_v += view->x;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void pwc_dec23_exit(void)
|
||||
{
|
||||
/* Do nothing */
|
||||
|
||||
}
|
||||
|
|
@ -1,58 +0,0 @@
|
|||
/* Linux driver for Philips webcam
|
||||
(C) 2004 Luc Saillard (luc@saillard.org)
|
||||
|
||||
NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx
|
||||
driver and thus may have bugs that are not present in the original version.
|
||||
Please send bug reports and support requests to <luc@saillard.org>.
|
||||
The decompression routines have been implemented by reverse-engineering the
|
||||
Nemosoft binary pwcx module. Caveat emptor.
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 2 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the Free Software
|
||||
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef PWC_DEC23_H
|
||||
#define PWC_DEC23_H
|
||||
|
||||
struct pwc_dec23_private
|
||||
{
|
||||
unsigned char xx,yy,zz,zzmask;
|
||||
|
||||
unsigned char table_0004[2*0x4000];
|
||||
unsigned char table_8004[2*0x1000];
|
||||
unsigned int table_a004[256*12];
|
||||
|
||||
unsigned char table_d004[8*256];
|
||||
unsigned int table_d800[256];
|
||||
unsigned int table_dc00[256];
|
||||
};
|
||||
|
||||
|
||||
void pwc_dec23_init(int type, int release, unsigned char *buffer, void *private_data);
|
||||
void pwc_dec23_exit(void);
|
||||
void pwc_dec23_decompress(const struct pwc_coord *image,
|
||||
const struct pwc_coord *view,
|
||||
const struct pwc_coord *offset,
|
||||
const void *src,
|
||||
void *dst,
|
||||
int flags,
|
||||
const void *data,
|
||||
int bandlength);
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
|
@ -68,8 +68,6 @@
|
|||
#include "pwc-ioctl.h"
|
||||
#include "pwc-kiara.h"
|
||||
#include "pwc-timon.h"
|
||||
#include "pwc-dec23.h"
|
||||
#include "pwc-dec1.h"
|
||||
#include "pwc-uncompress.h"
|
||||
|
||||
/* Function prototypes and driver templates */
|
||||
|
@ -322,6 +320,7 @@ static int pwc_allocate_buffers(struct pwc_device *pdev)
|
|||
case 730:
|
||||
case 740:
|
||||
case 750:
|
||||
#if 0
|
||||
Trace(TRACE_MEMORY,"private_data(%zu)\n",sizeof(struct pwc_dec23_private));
|
||||
kbuf = kmalloc(sizeof(struct pwc_dec23_private), GFP_KERNEL); /* Timon & Kiara */
|
||||
break;
|
||||
|
@ -330,6 +329,8 @@ static int pwc_allocate_buffers(struct pwc_device *pdev)
|
|||
/* TODO & FIXME */
|
||||
kbuf = kmalloc(sizeof(struct pwc_dec23_private), GFP_KERNEL);
|
||||
break;
|
||||
#endif
|
||||
;
|
||||
}
|
||||
if (kbuf == NULL) {
|
||||
Err("Failed to allocate decompress table.\n");
|
||||
|
@ -1131,11 +1132,11 @@ static int pwc_video_close(struct inode *inode, struct file *file)
|
|||
case 730:
|
||||
case 740:
|
||||
case 750:
|
||||
pwc_dec23_exit(); /* Timon & Kiara */
|
||||
/* pwc_dec23_exit(); *//* Timon & Kiara */
|
||||
break;
|
||||
case 645:
|
||||
case 646:
|
||||
pwc_dec1_exit();
|
||||
/* pwc_dec1_exit(); */
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
|
@ -316,576 +316,3 @@ const struct Kiara_table_entry Kiara_table[PSZ_MAX][6][4] =
|
|||
},
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* Rom table for kiara chips
|
||||
*
|
||||
* 32 roms tables (one for each resolution ?)
|
||||
* 2 tables per roms (one for each passes) (Y, and U&V)
|
||||
* 128 bytes per passes
|
||||
*/
|
||||
|
||||
const unsigned int KiaraRomTable [8][2][16][8] =
|
||||
{
|
||||
{ /* version 0 */
|
||||
{ /* version 0, passes 0 */
|
||||
{0x00000000,0x00000000,0x00000000,0x00000000,
|
||||
0x00000000,0x00000000,0x00000001,0x00000001},
|
||||
{0x00000000,0x00000000,0x00000009,0x00000009,
|
||||
0x00000009,0x00000009,0x00000009,0x00000009},
|
||||
{0x00000000,0x00000000,0x00000009,0x00000049,
|
||||
0x00000049,0x00000049,0x00000049,0x00000049},
|
||||
{0x00000000,0x00000000,0x00000049,0x00000049,
|
||||
0x00000049,0x00000249,0x0000024a,0x00000049},
|
||||
{0x00000000,0x00000000,0x00000049,0x00000049,
|
||||
0x00000249,0x00000249,0x0000024a,0x0000024a},
|
||||
{0x00000000,0x00000000,0x00000049,0x00000249,
|
||||
0x00000249,0x0000124a,0x0000024a,0x0000024a},
|
||||
{0x00000000,0x00000000,0x00000049,0x00000249,
|
||||
0x0000124a,0x00009252,0x00001252,0x00001252},
|
||||
{0x00000000,0x00000000,0x00000249,0x00000249,
|
||||
0x00009252,0x00009292,0x00009292,0x00009292},
|
||||
{0x00000000,0x00000000,0x00000249,0x00001249,
|
||||
0x00009292,0x00009292,0x00009493,0x000124db},
|
||||
{0x00000000,0x00000000,0x00000249,0x0000924a,
|
||||
0x00009492,0x0000a49b,0x0000a49b,0x000124db},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009252,
|
||||
0x0000a493,0x000124db,0x000124db,0x000126dc},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009493,
|
||||
0x000124db,0x000126dc,0x000136e4,0x000126dc},
|
||||
{0x00000000,0x00000000,0x00009292,0x0000a49b,
|
||||
0x000124db,0x000136e4,0x000136e4,0x000136e4},
|
||||
{0x00000000,0x00000000,0x00009292,0x0000a49b,
|
||||
0x000126dc,0x0001b724,0x0001b92d,0x0001b925},
|
||||
{0x00000000,0x00000000,0x00009492,0x000124db,
|
||||
0x000136e4,0x0001b925,0x0001c96e,0x0001c92d},
|
||||
{0x00000000,0x00000000,0x00000000,0x00000000,
|
||||
0x00000000,0x00000000,0x00000000,0x00000000}
|
||||
},
|
||||
{ /* version 0, passes 1 */
|
||||
{0x00000000,0x00000000,0x00000000,0x00000000,
|
||||
0x00000000,0x00000000,0x00000000,0x00000000},
|
||||
{0x00000000,0x00000000,0x00000000,0x00000000,
|
||||
0x00000000,0x00000000,0x00000000,0x00000000},
|
||||
{0x00000000,0x00000000,0x00000001,0x00000009,
|
||||
0x00000009,0x00000009,0x00000009,0x00000001},
|
||||
{0x00000000,0x00000000,0x00000009,0x00000009,
|
||||
0x00000049,0x00000049,0x00000049,0x00000049},
|
||||
{0x00000000,0x00000000,0x00000049,0x00000049,
|
||||
0x00000049,0x00000049,0x0000024a,0x0000024a},
|
||||
{0x00000000,0x00000000,0x00000049,0x00000049,
|
||||
0x00000249,0x00000249,0x0000024a,0x0000024a},
|
||||
{0x00000000,0x00000000,0x00000049,0x00000249,
|
||||
0x00000249,0x00000249,0x0000024a,0x00001252},
|
||||
{0x00000000,0x00000000,0x00000049,0x00001249,
|
||||
0x0000124a,0x0000124a,0x00001252,0x00009292},
|
||||
{0x00000000,0x00000000,0x00000249,0x00001249,
|
||||
0x00009252,0x00009252,0x00009292,0x00009493},
|
||||
{0x00000000,0x00000000,0x00000249,0x0000924a,
|
||||
0x00009292,0x00009292,0x00009292,0x00009493},
|
||||
{0x00000000,0x00000000,0x00000249,0x00009292,
|
||||
0x00009492,0x00009493,0x0000a49b,0x00009493},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009292,
|
||||
0x0000a493,0x000124db,0x000126dc,0x000126dc},
|
||||
{0x00000000,0x00000000,0x0000924a,0x00009493,
|
||||
0x0000a493,0x000126dc,0x000136e4,0x000136e4},
|
||||
{0x00000000,0x00000000,0x00009252,0x00009493,
|
||||
0x000126dc,0x000126dc,0x000136e4,0x000136e4},
|
||||
{0x00000000,0x00000000,0x00009292,0x0000a49b,
|
||||
0x000136e4,0x000136e4,0x0001b725,0x0001b724},
|
||||
{0x00000000,0x00000000,0x00000000,0x00000000,
|
||||
0x00000000,0x00000000,0x00000000,0x00000000}
|
||||
}
|
||||
},
|
||||
{ /* version 1 */
|
||||
{ /* version 1, passes 0 */
|
||||
{0x00000000,0x00000000,0x00000000,0x00000000,
|
||||
0x00000000,0x00000000,0x00000000,0x00000001},
|
||||
{0x00000000,0x00000000,0x00000009,0x00000009,
|
||||
0x00000009,0x00000009,0x00000009,0x00000009},
|
||||
{0x00000000,0x00000000,0x00000049,0x00000049,
|
||||
0x00000049,0x00000049,0x00000049,0x00000049},
|
||||
{0x00000000,0x00000000,0x00000049,0x00000049,
|
||||
0x00000049,0x00000249,0x0000024a,0x0000024a},
|
||||
{0x00000000,0x00000000,0x00000049,0x00000249,
|
||||
0x00000249,0x00000249,0x0000024a,0x00001252},
|
||||
{0x00000000,0x00000000,0x00000249,0x00000249,
|
||||
0x00000249,0x0000124a,0x00001252,0x00001252},
|
||||
{0x00000000,0x00000000,0x00000249,0x00000249,
|
||||
0x0000124a,0x0000124a,0x00009292,0x00009292},
|
||||
{0x00000000,0x00000000,0x00000249,0x00001249,
|
||||
0x0000124a,0x00009252,0x00009292,0x00009292},
|
||||
{0x00000000,0x00000000,0x00000249,0x00001249,
|
||||
0x00009252,0x00009292,0x00009292,0x00009292},
|
||||
{0x00000000,0x00000000,0x00000249,0x00001249,
|
||||
0x00009252,0x00009292,0x00009493,0x00009493},
|
||||
{0x00000000,0x00000000,0x00000249,0x0000924a,
|
||||
0x00009252,0x00009493,0x00009493,0x00009493},
|
||||
{0x00000000,0x00000000,0x00000249,0x0000924a,
|
||||
0x00009292,0x00009493,0x00009493,0x00009493},
|
||||
{0x00000000,0x00000000,0x00000249,0x00009252,
|
||||
0x00009492,0x00009493,0x0000a49b,0x0000a49b},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009292,
|
||||
0x00009492,0x000124db,0x000124db,0x000124db},
|
||||
{0x00000000,0x00000000,0x0000924a,0x00009493,
|
||||
0x0000a493,0x000126dc,0x000126dc,0x000126dc},
|
||||
{0x00000000,0x00000000,0x00000000,0x00000000,
|
||||
0x00000000,0x00000000,0x00000000,0x00000000}
|
||||
},
|
||||
{ /* version 1, passes 1 */
|
||||
{0x00000000,0x00000000,0x00000000,0x00000000,
|
||||
0x00000000,0x00000000,0x00000000,0x00000000},
|
||||
{0x00000000,0x00000000,0x00000049,0x00000009,
|
||||
0x00000049,0x00000009,0x00000001,0x00000000},
|
||||
{0x00000000,0x00000000,0x00000049,0x00000049,
|
||||
0x00000049,0x00000049,0x00000049,0x00000000},
|
||||
{0x00000000,0x00000000,0x00000249,0x00000049,
|
||||
0x00000249,0x00000049,0x0000024a,0x00000001},
|
||||
{0x00000000,0x00000000,0x00000249,0x00000249,
|
||||
0x00000249,0x00000249,0x0000024a,0x00000001},
|
||||
{0x00000000,0x00000000,0x00000249,0x00000249,
|
||||
0x00000249,0x00000249,0x0000024a,0x00000001},
|
||||
{0x00000000,0x00000000,0x00000249,0x00000249,
|
||||
0x00000249,0x00000249,0x0000024a,0x00000009},
|
||||
{0x00000000,0x00000000,0x00000249,0x00000249,
|
||||
0x0000124a,0x0000124a,0x0000024a,0x00000009},
|
||||
{0x00000000,0x00000000,0x00000249,0x00000249,
|
||||
0x0000124a,0x0000124a,0x0000024a,0x00000009},
|
||||
{0x00000000,0x00000000,0x00001249,0x00001249,
|
||||
0x0000124a,0x00009252,0x00001252,0x00000049},
|
||||
{0x00000000,0x00000000,0x00001249,0x00001249,
|
||||
0x0000124a,0x00009292,0x00001252,0x00000049},
|
||||
{0x00000000,0x00000000,0x00001249,0x00001249,
|
||||
0x0000124a,0x00009292,0x00001252,0x00000049},
|
||||
{0x00000000,0x00000000,0x00001249,0x00001249,
|
||||
0x00009252,0x00009292,0x00001252,0x0000024a},
|
||||
{0x00000000,0x00000000,0x00001249,0x00001249,
|
||||
0x00009292,0x00009292,0x00001252,0x0000024a},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000924a,
|
||||
0x00009492,0x00009493,0x00009292,0x00001252},
|
||||
{0x00000000,0x00000000,0x00000000,0x00000000,
|
||||
0x00000000,0x00000000,0x00000000,0x00000000}
|
||||
}
|
||||
},
|
||||
{ /* version 2 */
|
||||
{ /* version 2, passes 0 */
|
||||
{0x00000000,0x00000000,0x00000049,0x00000049,
|
||||
0x00000049,0x00000049,0x0000024a,0x0000024a},
|
||||
{0x00000000,0x00000000,0x00000249,0x00000249,
|
||||
0x00000249,0x0000124a,0x00001252,0x00009292},
|
||||
{0x00000000,0x00000000,0x00000249,0x00000249,
|
||||
0x0000124a,0x00009252,0x00009292,0x00009292},
|
||||
{0x00000000,0x00000000,0x00000249,0x00001249,
|
||||
0x0000124a,0x00009292,0x00009493,0x00009493},
|
||||
{0x00000000,0x00000000,0x00000249,0x00001249,
|
||||
0x00009252,0x00009493,0x00009493,0x0000a49b},
|
||||
{0x00000000,0x00000000,0x00000249,0x0000924a,
|
||||
0x00009292,0x00009493,0x0000a49b,0x0000a49b},
|
||||
{0x00000000,0x00000000,0x00001249,0x0000924a,
|
||||
0x00009292,0x00009493,0x0000a49b,0x000124db},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009252,
|
||||
0x00009492,0x0000a49b,0x0000a49b,0x000124db},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009292,
|
||||
0x00009492,0x000124db,0x000124db,0x000126dc},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009292,
|
||||
0x0000a493,0x000124db,0x000126dc,0x000126dc},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009493,
|
||||
0x0000a493,0x000124db,0x000126dc,0x000136e4},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009493,
|
||||
0x0000a493,0x000126dc,0x000136e4,0x000136e4},
|
||||
{0x00000000,0x00000000,0x0000924a,0x00009493,
|
||||
0x0001249b,0x000126dc,0x000136e4,0x000136e4},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x000124db,0x000136e4,0x000136e4,0x0001b724},
|
||||
{0x00000000,0x00000000,0x00009252,0x000124db,
|
||||
0x000126dc,0x0001b724,0x0001b725,0x0001b925},
|
||||
{0x00000000,0x00000000,0x00000000,0x00000000,
|
||||
0x00000000,0x00000000,0x00000000,0x00000000}
|
||||
},
|
||||
{ /* version 2, passes 1 */
|
||||
{0x00000000,0x00000000,0x00000049,0x00000049,
|
||||
0x00000049,0x00000049,0x00000049,0x00000049},
|
||||
{0x00000000,0x00000000,0x00000249,0x00000249,
|
||||
0x00000249,0x00000249,0x0000024a,0x00000049},
|
||||
{0x00000000,0x00000000,0x00001249,0x00000249,
|
||||
0x0000124a,0x0000124a,0x00001252,0x00000049},
|
||||
{0x00000000,0x00000000,0x00001249,0x00001249,
|
||||
0x0000124a,0x0000124a,0x00009292,0x0000024a},
|
||||
{0x00000000,0x00000000,0x00001249,0x00001249,
|
||||
0x00009252,0x00009292,0x00009292,0x0000024a},
|
||||
{0x00000000,0x00000000,0x00001249,0x00001249,
|
||||
0x00009252,0x00009292,0x0000a49b,0x0000024a},
|
||||
{0x00000000,0x00000000,0x00001249,0x00001249,
|
||||
0x00009292,0x00009493,0x0000a49b,0x00001252},
|
||||
{0x00000000,0x00000000,0x00001249,0x00001249,
|
||||
0x00009292,0x00009493,0x0000a49b,0x00001252},
|
||||
{0x00000000,0x00000000,0x00001249,0x0000924a,
|
||||
0x00009492,0x0000a49b,0x0000a49b,0x00001252},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009252,
|
||||
0x00009492,0x0000a49b,0x0000a49b,0x00009292},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009292,
|
||||
0x00009492,0x0000a49b,0x0000a49b,0x00009292},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009493,
|
||||
0x0000a493,0x0000a49b,0x0000a49b,0x00009292},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009493,
|
||||
0x0000a493,0x0000a49b,0x0000a49b,0x00009493},
|
||||
{0x00000000,0x00000000,0x0000924a,0x00009493,
|
||||
0x0000a493,0x000124db,0x0000a49b,0x00009493},
|
||||
{0x00000000,0x00000000,0x00009252,0x0000a49b,
|
||||
0x0001249b,0x000126dc,0x000124db,0x0000a49b},
|
||||
{0x00000000,0x00000000,0x00000000,0x00000000,
|
||||
0x00000000,0x00000000,0x00000000,0x00000000}
|
||||
}
|
||||
},
|
||||
{ /* version 3 */
|
||||
{ /* version 3, passes 0 */
|
||||
{0x00000000,0x00000000,0x00000249,0x00000249,
|
||||
0x0000124a,0x0000124a,0x00009292,0x00009292},
|
||||
{0x00000000,0x00000000,0x00001249,0x00001249,
|
||||
0x00009292,0x00009493,0x0000a49b,0x0000a49b},
|
||||
{0x00000000,0x00000000,0x00001249,0x0000924a,
|
||||
0x00009492,0x0000a49b,0x0000a49b,0x000124db},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009292,
|
||||
0x00009492,0x000124db,0x000126dc,0x000126dc},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009493,
|
||||
0x0000a493,0x000124db,0x000126dc,0x000126dc},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009493,
|
||||
0x0000a493,0x000126dc,0x000136e4,0x000136e4},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009493,
|
||||
0x0000a493,0x000126dc,0x000136e4,0x0001b724},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009493,
|
||||
0x0001249b,0x000126dc,0x000136e4,0x0001b724},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x0001249b,0x000126dc,0x000136e4,0x0001b724},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x0001249b,0x000136e4,0x0001b725,0x0001b724},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x000124db,0x000136e4,0x0001b725,0x0001b925},
|
||||
{0x00000000,0x00000000,0x00009292,0x0000a49b,
|
||||
0x000126dc,0x000136e4,0x0001b92d,0x0001b925},
|
||||
{0x00000000,0x00000000,0x00009292,0x0000a49b,
|
||||
0x000126dc,0x0001b724,0x0001b92d,0x0001c92d},
|
||||
{0x00000000,0x00000000,0x00009492,0x000124db,
|
||||
0x000126dc,0x0001b724,0x0001c96e,0x0001c92d},
|
||||
{0x00000000,0x00000000,0x0000a492,0x000126db,
|
||||
0x000136e4,0x0001b925,0x00025bb6,0x00024b77},
|
||||
{0x00000000,0x00000000,0x00000000,0x00000000,
|
||||
0x00000000,0x00000000,0x00000000,0x00000000}
|
||||
},
|
||||
{ /* version 3, passes 1 */
|
||||
{0x00000000,0x00000000,0x00001249,0x00000249,
|
||||
0x0000124a,0x0000124a,0x00001252,0x00001252},
|
||||
{0x00000000,0x00000000,0x00001249,0x00001249,
|
||||
0x00009252,0x00009292,0x00009292,0x00001252},
|
||||
{0x00000000,0x00000000,0x00001249,0x0000924a,
|
||||
0x00009492,0x00009493,0x0000a49b,0x00001252},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009252,
|
||||
0x00009492,0x0000a49b,0x0000a49b,0x00009292},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009292,
|
||||
0x00009492,0x0000a49b,0x0000a49b,0x00009292},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009493,
|
||||
0x0000a493,0x0000a49b,0x000126dc,0x00009292},
|
||||
{0x00000000,0x00000000,0x0000924a,0x00009493,
|
||||
0x0000a493,0x0000a49b,0x000126dc,0x00009493},
|
||||
{0x00000000,0x00000000,0x0000924a,0x00009493,
|
||||
0x0000a493,0x0000a49b,0x000126dc,0x00009493},
|
||||
{0x00000000,0x00000000,0x0000924a,0x00009493,
|
||||
0x0000a493,0x000124db,0x000126dc,0x00009493},
|
||||
{0x00000000,0x00000000,0x0000924a,0x00009493,
|
||||
0x0000a493,0x000124db,0x000126dc,0x0000a49b},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x0000a493,0x000124db,0x000126dc,0x0000a49b},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x0001249b,0x000126dc,0x000126dc,0x0000a49b},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x000124db,0x000136e4,0x000126dc,0x000124db},
|
||||
{0x00000000,0x00000000,0x00009492,0x0000a49b,
|
||||
0x000136e4,0x000136e4,0x000126dc,0x000124db},
|
||||
{0x00000000,0x00000000,0x0000a492,0x000124db,
|
||||
0x0001b724,0x0001b724,0x000136e4,0x000126dc},
|
||||
{0x00000000,0x00000000,0x00000000,0x00000000,
|
||||
0x00000000,0x00000000,0x00000000,0x00000000}
|
||||
}
|
||||
},
|
||||
{ /* version 4 */
|
||||
{ /* version 4, passes 0 */
|
||||
{0x00000000,0x00000000,0x00000049,0x00000049,
|
||||
0x00000049,0x00000049,0x00000049,0x00000049},
|
||||
{0x00000000,0x00000000,0x00000249,0x00000049,
|
||||
0x00000249,0x00000249,0x0000024a,0x00000049},
|
||||
{0x00000000,0x00000000,0x00000249,0x00000249,
|
||||
0x0000124a,0x00009252,0x00001252,0x0000024a},
|
||||
{0x00000000,0x00000000,0x00001249,0x00001249,
|
||||
0x00009252,0x00009292,0x00009493,0x00001252},
|
||||
{0x00000000,0x00000000,0x00001249,0x0000924a,
|
||||
0x00009292,0x00009493,0x00009493,0x00001252},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009292,
|
||||
0x00009492,0x0000a49b,0x0000a49b,0x00009292},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009493,
|
||||
0x0000a493,0x000124db,0x000124db,0x00009493},
|
||||
{0x00000000,0x00000000,0x0000924a,0x00009493,
|
||||
0x0000a493,0x000124db,0x000126dc,0x0000a49b},
|
||||
{0x00000000,0x00000000,0x0000924a,0x00009493,
|
||||
0x0000a493,0x000124db,0x000126dc,0x0000a49b},
|
||||
{0x00000000,0x00000000,0x0000924a,0x00009493,
|
||||
0x0001249b,0x000126dc,0x000126dc,0x000124db},
|
||||
{0x00000000,0x00000000,0x00009252,0x00009493,
|
||||
0x000124db,0x000136e4,0x000136e4,0x000126dc},
|
||||
{0x00000000,0x00000000,0x00009252,0x0000a49b,
|
||||
0x000124db,0x000136e4,0x000136e4,0x000126dc},
|
||||
{0x00000000,0x00000000,0x00009292,0x0000a49b,
|
||||
0x000126dc,0x000136e4,0x000136e4,0x000136e4},
|
||||
{0x00000000,0x00000000,0x00009492,0x0000a49b,
|
||||
0x000126dc,0x0001b724,0x0001b725,0x0001b724},
|
||||
{0x00000000,0x00000000,0x0000a492,0x000124db,
|
||||
0x000136e4,0x0001b925,0x0001b92d,0x0001b925},
|
||||
{0x00000000,0x00000000,0x00000000,0x00000000,
|
||||
0x00000000,0x00000000,0x00000000,0x00000000}
|
||||
},
|
||||
{ /* version 4, passes 1 */
|
||||
{0x00000000,0x00000000,0x00000249,0x00000049,
|
||||
0x00000009,0x00000009,0x00000009,0x00000009},
|
||||
{0x00000000,0x00000000,0x00000249,0x00000249,
|
||||
0x00000049,0x00000049,0x00000009,0x00000009},
|
||||
{0x00000000,0x00000000,0x00001249,0x00001249,
|
||||
0x0000124a,0x00000249,0x00000049,0x00000049},
|
||||
{0x00000000,0x00000000,0x00001249,0x00001249,
|
||||
0x0000124a,0x0000124a,0x00000049,0x00000049},
|
||||
{0x00000000,0x00000000,0x00001249,0x00001249,
|
||||
0x00009252,0x0000124a,0x0000024a,0x0000024a},
|
||||
{0x00000000,0x00000000,0x00001249,0x0000924a,
|
||||
0x00009252,0x0000124a,0x0000024a,0x0000024a},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009292,
|
||||
0x00009492,0x00009252,0x00001252,0x00001252},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009493,
|
||||
0x0000a493,0x00009292,0x00009292,0x00001252},
|
||||
{0x00000000,0x00000000,0x0000924a,0x00009493,
|
||||
0x0000a493,0x00009292,0x00009292,0x00009292},
|
||||
{0x00000000,0x00000000,0x0000924a,0x00009493,
|
||||
0x0000a493,0x00009493,0x00009493,0x00009292},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x0000a493,0x0000a49b,0x00009493,0x00009493},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x0000a493,0x0000a49b,0x0000a49b,0x00009493},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x0001249b,0x000124db,0x0000a49b,0x0000a49b},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x000136e4,0x000126dc,0x000124db,0x0000a49b},
|
||||
{0x00000000,0x00000000,0x00009252,0x000124db,
|
||||
0x0001b724,0x000136e4,0x000126dc,0x000124db},
|
||||
{0x00000000,0x00000000,0x00000000,0x00000000,
|
||||
0x00000000,0x00000000,0x00000000,0x00000000}
|
||||
}
|
||||
},
|
||||
{ /* version 5 */
|
||||
{ /* version 5, passes 0 */
|
||||
{0x00000000,0x00000000,0x00000249,0x00000249,
|
||||
0x00000249,0x00000249,0x00001252,0x00001252},
|
||||
{0x00000000,0x00000000,0x00001249,0x00001249,
|
||||
0x00009252,0x00009292,0x00009292,0x00001252},
|
||||
{0x00000000,0x00000000,0x00001249,0x0000924a,
|
||||
0x00009492,0x0000a49b,0x0000a49b,0x00009292},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009493,
|
||||
0x0000a493,0x0000a49b,0x000124db,0x00009493},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009493,
|
||||
0x0000a493,0x000124db,0x000126dc,0x00009493},
|
||||
{0x00000000,0x00000000,0x0000924a,0x00009493,
|
||||
0x0000a493,0x000126dc,0x000126dc,0x0000a49b},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x0001249b,0x000126dc,0x000136e4,0x000124db},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x000126dc,0x000136e4,0x000136e4,0x000126dc},
|
||||
{0x00000000,0x00000000,0x00009292,0x0000a49b,
|
||||
0x000126dc,0x000136e4,0x000136e4,0x000126dc},
|
||||
{0x00000000,0x00000000,0x00009292,0x0000a49b,
|
||||
0x000126dc,0x0001b724,0x0001b725,0x000136e4},
|
||||
{0x00000000,0x00000000,0x00009292,0x0000a49b,
|
||||
0x000136e4,0x0001b724,0x0001b92d,0x0001b724},
|
||||
{0x00000000,0x00000000,0x00009492,0x0000a49b,
|
||||
0x000136e4,0x0001b724,0x0001b92d,0x0001b724},
|
||||
{0x00000000,0x00000000,0x00009492,0x000124db,
|
||||
0x000136e4,0x0001b925,0x0001c96e,0x0001b925},
|
||||
{0x00000000,0x00000000,0x00009492,0x000124db,
|
||||
0x0001b724,0x0001b925,0x0001c96e,0x0001c92d},
|
||||
{0x00000000,0x00000000,0x0000a492,0x000126db,
|
||||
0x0001c924,0x0002496d,0x00025bb6,0x00024b77},
|
||||
{0x00000000,0x00000000,0x00000000,0x00000000,
|
||||
0x00000000,0x00000000,0x00000000,0x00000000}
|
||||
},
|
||||
{ /* version 5, passes 1 */
|
||||
{0x00000000,0x00000000,0x00001249,0x00000249,
|
||||
0x00000249,0x00000249,0x0000024a,0x0000024a},
|
||||
{0x00000000,0x00000000,0x00001249,0x00001249,
|
||||
0x0000124a,0x0000124a,0x0000024a,0x0000024a},
|
||||
{0x00000000,0x00000000,0x00001249,0x0000924a,
|
||||
0x00009252,0x00009252,0x0000024a,0x0000024a},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009292,
|
||||
0x00009492,0x0000a49b,0x00001252,0x00001252},
|
||||
{0x00000000,0x00000000,0x0000924a,0x00009493,
|
||||
0x0000a493,0x0000a49b,0x00001252,0x00001252},
|
||||
{0x00000000,0x00000000,0x0000924a,0x00009493,
|
||||
0x0000a493,0x0000a49b,0x00009292,0x00001252},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x0000a493,0x0000a49b,0x00009292,0x00009292},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x0000a493,0x0000a49b,0x00009493,0x00009292},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x0001249b,0x000124db,0x00009493,0x00009292},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x0001249b,0x000124db,0x00009493,0x00009493},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x000124db,0x000124db,0x0000a49b,0x00009493},
|
||||
{0x00000000,0x00000000,0x0000924a,0x000124db,
|
||||
0x000126dc,0x000126dc,0x0000a49b,0x00009493},
|
||||
{0x00000000,0x00000000,0x0000924a,0x000124db,
|
||||
0x000136e4,0x000126dc,0x000124db,0x0000a49b},
|
||||
{0x00000000,0x00000000,0x00009292,0x000124db,
|
||||
0x000136e4,0x000126dc,0x000124db,0x0000a49b},
|
||||
{0x00000000,0x00000000,0x00009492,0x000126db,
|
||||
0x0001b724,0x000136e4,0x000126dc,0x000124db},
|
||||
{0x00000000,0x00000000,0x00000000,0x00000000,
|
||||
0x00000000,0x00000000,0x00000000,0x00000000}
|
||||
}
|
||||
},
|
||||
{ /* version 6 */
|
||||
{ /* version 6, passes 0 */
|
||||
{0x00000000,0x00000000,0x00001249,0x00001249,
|
||||
0x00009252,0x00009292,0x00009493,0x00009493},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009292,
|
||||
0x0000a493,0x0000a49b,0x0000a49b,0x00009493},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009493,
|
||||
0x0000a493,0x000124db,0x000124db,0x0000a49b},
|
||||
{0x00000000,0x00000000,0x0000924a,0x00009493,
|
||||
0x0000a493,0x000126dc,0x000126dc,0x0000a49b},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x0001249b,0x000126dc,0x000136e4,0x000124db},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x000126dc,0x000136e4,0x000136e4,0x000126dc},
|
||||
{0x00000000,0x00000000,0x00009292,0x0000a49b,
|
||||
0x000126dc,0x0001b724,0x0001b725,0x000126dc},
|
||||
{0x00000000,0x00000000,0x00009292,0x0000a49b,
|
||||
0x000136e4,0x0001b724,0x0001b92d,0x000136e4},
|
||||
{0x00000000,0x00000000,0x00009492,0x0000a49b,
|
||||
0x000136e4,0x0001b724,0x0001b92d,0x0001b724},
|
||||
{0x00000000,0x00000000,0x00009492,0x000124db,
|
||||
0x000136e4,0x0001b724,0x0001b92d,0x0001b724},
|
||||
{0x00000000,0x00000000,0x00009492,0x000124db,
|
||||
0x000136e4,0x0001b925,0x0001b92d,0x0001b925},
|
||||
{0x00000000,0x00000000,0x00009492,0x000124db,
|
||||
0x0001b724,0x0001b925,0x0001c96e,0x0001c92d},
|
||||
{0x00000000,0x00000000,0x0000a492,0x000124db,
|
||||
0x0001b724,0x0001c92d,0x0001c96e,0x0001c92d},
|
||||
{0x00000000,0x00000000,0x0000a492,0x000124db,
|
||||
0x0001b724,0x0001c92d,0x00024b76,0x0002496e},
|
||||
{0x00000000,0x00000000,0x00012492,0x000126db,
|
||||
0x0001c924,0x00024b6d,0x0002ddb6,0x00025bbf},
|
||||
{0x00000000,0x00000000,0x00000000,0x00000000,
|
||||
0x00000000,0x00000000,0x00000000,0x00000000}
|
||||
},
|
||||
{ /* version 6, passes 1 */
|
||||
{0x00000000,0x00000000,0x00001249,0x00001249,
|
||||
0x0000124a,0x0000124a,0x00001252,0x00001252},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009292,
|
||||
0x00009492,0x00009252,0x00001252,0x00001252},
|
||||
{0x00000000,0x00000000,0x0000924a,0x00009493,
|
||||
0x0000a493,0x00009292,0x00001252,0x00001252},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x0000a493,0x0000a49b,0x00009292,0x00009292},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x0000a493,0x0000a49b,0x00009292,0x00009292},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x0001249b,0x0000a49b,0x00009493,0x00009292},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x000124db,0x000124db,0x00009493,0x00009493},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x000124db,0x000124db,0x0000a49b,0x00009493},
|
||||
{0x00000000,0x00000000,0x0000924a,0x000124db,
|
||||
0x000126dc,0x000124db,0x0000a49b,0x00009493},
|
||||
{0x00000000,0x00000000,0x0000924a,0x000124db,
|
||||
0x000126dc,0x000126dc,0x0000a49b,0x0000a49b},
|
||||
{0x00000000,0x00000000,0x0000924a,0x000124db,
|
||||
0x000136e4,0x000126dc,0x000124db,0x0000a49b},
|
||||
{0x00000000,0x00000000,0x00009492,0x000126db,
|
||||
0x000136e4,0x000126dc,0x000124db,0x0000a49b},
|
||||
{0x00000000,0x00000000,0x00009492,0x000126db,
|
||||
0x0001b724,0x000136e4,0x000126dc,0x000124db},
|
||||
{0x00000000,0x00000000,0x00009492,0x000126db,
|
||||
0x0001b724,0x000136e4,0x000126dc,0x000124db},
|
||||
{0x00000000,0x00000000,0x0000a492,0x000136db,
|
||||
0x0001c924,0x0001b724,0x000136e4,0x000126dc},
|
||||
{0x00000000,0x00000000,0x00000000,0x00000000,
|
||||
0x00000000,0x00000000,0x00000000,0x00000000}
|
||||
}
|
||||
},
|
||||
{ /* version 7 */
|
||||
{ /* version 7, passes 0 */
|
||||
{0x00000000,0x00000000,0x00001249,0x00001249,
|
||||
0x00009252,0x00009292,0x00009493,0x00009493},
|
||||
{0x00000000,0x00000000,0x00001249,0x00009493,
|
||||
0x0000a493,0x000124db,0x000126dc,0x00009493},
|
||||
{0x00000000,0x00000000,0x00001249,0x0000a49b,
|
||||
0x0001249b,0x000126dc,0x000126dc,0x0000a49b},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x0001249b,0x000126dc,0x000136e4,0x0000a49b},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x000126dc,0x000136e4,0x0001b725,0x000124db},
|
||||
{0x00000000,0x00000000,0x00009292,0x0000a49b,
|
||||
0x000136e4,0x0001b724,0x0001b725,0x000126dc},
|
||||
{0x00000000,0x00000000,0x00009292,0x000124db,
|
||||
0x000136e4,0x0001b724,0x0001b725,0x000126dc},
|
||||
{0x00000000,0x00000000,0x00009492,0x000124db,
|
||||
0x000136e4,0x0001b724,0x0001c96e,0x000136e4},
|
||||
{0x00000000,0x00000000,0x00009492,0x000124db,
|
||||
0x000136e4,0x0001c92d,0x0001c96e,0x0001b724},
|
||||
{0x00000000,0x00000000,0x0000a492,0x000124db,
|
||||
0x000136e4,0x0001c92d,0x0001c96e,0x0001b724},
|
||||
{0x00000000,0x00000000,0x0000a492,0x000124db,
|
||||
0x0001b724,0x0001c92d,0x0001c96e,0x0001b925},
|
||||
{0x00000000,0x00000000,0x0000a492,0x000126db,
|
||||
0x0001b724,0x0001c92d,0x00024b76,0x0001c92d},
|
||||
{0x00000000,0x00000000,0x0000a492,0x000126db,
|
||||
0x0001b924,0x0001c92d,0x00024b76,0x0001c92d},
|
||||
{0x00000000,0x00000000,0x0000a492,0x000126db,
|
||||
0x0001b924,0x0001c92d,0x00024b76,0x0002496e},
|
||||
{0x00000000,0x00000000,0x00012492,0x000136db,
|
||||
0x00024924,0x00024b6d,0x0002ddb6,0x00025bbf},
|
||||
{0x00000000,0x00000000,0x00000000,0x00000000,
|
||||
0x00000000,0x00000000,0x00000000,0x00000000}
|
||||
},
|
||||
{ /* version 7, passes 1 */
|
||||
{0x00000000,0x00000000,0x00001249,0x00001249,
|
||||
0x0000124a,0x0000124a,0x00001252,0x00001252},
|
||||
{0x00000000,0x00000000,0x0000924a,0x00009493,
|
||||
0x00009492,0x00009292,0x00001252,0x00001252},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x0000a493,0x0000a49b,0x00001252,0x00001252},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x0000a493,0x0000a49b,0x00009292,0x00009292},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x0000a493,0x0000a49b,0x00009292,0x00009292},
|
||||
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
|
||||
0x000126dc,0x0000a49b,0x00009493,0x00009292},
|
||||
{0x00000000,0x00000000,0x0000924a,0x000124db,
|
||||
0x000126dc,0x000124db,0x00009493,0x00009493},
|
||||
{0x00000000,0x00000000,0x0000924a,0x000124db,
|
||||
0x000136e4,0x000124db,0x0000a49b,0x00009493},
|
||||
{0x00000000,0x00000000,0x0000924a,0x000136db,
|
||||
0x0001b724,0x000124db,0x0000a49b,0x00009493},
|
||||
{0x00000000,0x00000000,0x0000924a,0x000136db,
|
||||
0x0001b724,0x000126dc,0x0000a49b,0x0000a49b},
|
||||
{0x00000000,0x00000000,0x00009292,0x000136db,
|
||||
0x0001b724,0x000126dc,0x000124db,0x0000a49b},
|
||||
{0x00000000,0x00000000,0x00009492,0x000136db,
|
||||
0x0001b724,0x000126dc,0x000124db,0x0000a49b},
|
||||
{0x00000000,0x00000000,0x0000a492,0x000136db,
|
||||
0x0001b724,0x000136e4,0x000126dc,0x000124db},
|
||||
{0x00000000,0x00000000,0x0000a492,0x000136db,
|
||||
0x0001b724,0x000136e4,0x000126dc,0x000124db},
|
||||
{0x00000000,0x00000000,0x00012492,0x0001b6db,
|
||||
0x0001c924,0x0001b724,0x000136e4,0x000126dc},
|
||||
{0x00000000,0x00000000,0x00000000,0x00000000,
|
||||
0x00000000,0x00000000,0x00000000,0x00000000}
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
|
|
File diff suppressed because it is too large
Load diff
|
@ -29,8 +29,6 @@
|
|||
|
||||
#include "pwc.h"
|
||||
#include "pwc-uncompress.h"
|
||||
#include "pwc-dec1.h"
|
||||
#include "pwc-dec23.h"
|
||||
|
||||
int pwc_decompress(struct pwc_device *pdev)
|
||||
{
|
||||
|
@ -122,6 +120,7 @@ int pwc_decompress(struct pwc_device *pdev)
|
|||
|
||||
switch (pdev->type)
|
||||
{
|
||||
#if 0
|
||||
case 675:
|
||||
case 680:
|
||||
case 690:
|
||||
|
@ -137,6 +136,7 @@ int pwc_decompress(struct pwc_device *pdev)
|
|||
case 645:
|
||||
case 646:
|
||||
/* TODO & FIXME */
|
||||
#endif
|
||||
return -ENXIO; /* No such device or address: missing decompressor */
|
||||
break;
|
||||
}
|
||||
|
|
|
@ -228,17 +228,17 @@ MODULE_DESCRIPTION(
|
|||
MODULE_LICENSE("Dual BSD/GPL");
|
||||
MODULE_DEVICE_TABLE(pci, intelfb_pci_table);
|
||||
|
||||
static int accel __initdata = 1;
|
||||
static int vram __initdata = 4;
|
||||
static int hwcursor __initdata = 1;
|
||||
static int mtrr __initdata = 1;
|
||||
static int fixed __initdata = 0;
|
||||
static int noinit __initdata = 0;
|
||||
static int noregister __initdata = 0;
|
||||
static int probeonly __initdata = 0;
|
||||
static int idonly __initdata = 0;
|
||||
static int bailearly __initdata = 0;
|
||||
static char *mode __initdata = NULL;
|
||||
static int accel = 1;
|
||||
static int vram = 4;
|
||||
static int hwcursor = 1;
|
||||
static int mtrr = 1;
|
||||
static int fixed = 0;
|
||||
static int noinit = 0;
|
||||
static int noregister = 0;
|
||||
static int probeonly = 0;
|
||||
static int idonly = 0;
|
||||
static int bailearly = 0;
|
||||
static char *mode = NULL;
|
||||
|
||||
module_param(accel, bool, S_IRUGO);
|
||||
MODULE_PARM_DESC(accel, "Enable console acceleration");
|
||||
|
|
|
@ -23,7 +23,6 @@
|
|||
#include "kern_util.h"
|
||||
#include "kern.h"
|
||||
#include "user_util.h"
|
||||
#include "2_5compat.h"
|
||||
#include "init.h"
|
||||
|
||||
struct hostfs_inode_info {
|
||||
|
|
|
@ -886,7 +886,6 @@ xfs_page_state_convert(
|
|||
SetPageUptodate(page);
|
||||
|
||||
if (startio) {
|
||||
WARN_ON(page_dirty);
|
||||
xfs_submit_page(page, wbc, bh_arr, cnt, 0, !page_dirty);
|
||||
}
|
||||
|
||||
|
|
|
@ -565,7 +565,7 @@ struct file_operations linvfs_file_operations = {
|
|||
.sendfile = linvfs_sendfile,
|
||||
.unlocked_ioctl = linvfs_ioctl,
|
||||
#ifdef CONFIG_COMPAT
|
||||
.compat_ioctl = xfs_compat_ioctl,
|
||||
.compat_ioctl = linvfs_compat_ioctl,
|
||||
#endif
|
||||
.mmap = linvfs_file_mmap,
|
||||
.open = linvfs_open,
|
||||
|
@ -587,7 +587,7 @@ struct file_operations linvfs_invis_file_operations = {
|
|||
.sendfile = linvfs_sendfile,
|
||||
.unlocked_ioctl = linvfs_ioctl_invis,
|
||||
#ifdef CONFIG_COMPAT
|
||||
.compat_ioctl = xfs_compat_invis_ioctl,
|
||||
.compat_ioctl = linvfs_compat_invis_ioctl,
|
||||
#endif
|
||||
.mmap = linvfs_file_mmap,
|
||||
.open = linvfs_open,
|
||||
|
@ -600,6 +600,9 @@ struct file_operations linvfs_dir_operations = {
|
|||
.read = generic_read_dir,
|
||||
.readdir = linvfs_readdir,
|
||||
.unlocked_ioctl = linvfs_ioctl,
|
||||
#ifdef CONFIG_COMPAT
|
||||
.compat_ioctl = linvfs_compat_ioctl,
|
||||
#endif
|
||||
.fsync = linvfs_fsync,
|
||||
};
|
||||
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright (c) 2004 Silicon Graphics, Inc. All Rights Reserved.
|
||||
* Copyright (c) 2004-2005 Silicon Graphics, Inc. All Rights Reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
|
@ -58,8 +58,9 @@ typedef struct xfs_fsop_bulkreq32 {
|
|||
__s32 ocount; /* output count pointer */
|
||||
} xfs_fsop_bulkreq32_t;
|
||||
|
||||
static unsigned long
|
||||
xfs_ioctl32_bulkstat(unsigned long arg)
|
||||
STATIC unsigned long
|
||||
xfs_ioctl32_bulkstat(
|
||||
unsigned long arg)
|
||||
{
|
||||
xfs_fsop_bulkreq32_t __user *p32 = (void __user *)arg;
|
||||
xfs_fsop_bulkreq_t __user *p = compat_alloc_user_space(sizeof(*p));
|
||||
|
@ -78,8 +79,8 @@ xfs_ioctl32_bulkstat(unsigned long arg)
|
|||
}
|
||||
#endif
|
||||
|
||||
static long
|
||||
__xfs_compat_ioctl(int mode, struct file *f, unsigned cmd, unsigned long arg)
|
||||
STATIC long
|
||||
__linvfs_compat_ioctl(int mode, struct file *f, unsigned cmd, unsigned long arg)
|
||||
{
|
||||
int error;
|
||||
struct inode *inode = f->f_dentry->d_inode;
|
||||
|
@ -152,12 +153,20 @@ __xfs_compat_ioctl(int mode, struct file *f, unsigned cmd, unsigned long arg)
|
|||
return error;
|
||||
}
|
||||
|
||||
long xfs_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg)
|
||||
long
|
||||
linvfs_compat_ioctl(
|
||||
struct file *f,
|
||||
unsigned cmd,
|
||||
unsigned long arg)
|
||||
{
|
||||
return __xfs_compat_ioctl(0, f, cmd, arg);
|
||||
return __linvfs_compat_ioctl(0, f, cmd, arg);
|
||||
}
|
||||
|
||||
long xfs_compat_invis_ioctl(struct file *f, unsigned cmd, unsigned long arg)
|
||||
long
|
||||
linvfs_compat_invis_ioctl(
|
||||
struct file *f,
|
||||
unsigned cmd,
|
||||
unsigned long arg)
|
||||
{
|
||||
return __xfs_compat_ioctl(IO_INVIS, f, cmd, arg);
|
||||
return __linvfs_compat_ioctl(IO_INVIS, f, cmd, arg);
|
||||
}
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright (c) 2004 Silicon Graphics, Inc. All Rights Reserved.
|
||||
* Copyright (c) 2004-2005 Silicon Graphics, Inc. All Rights Reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
|
@ -30,5 +30,5 @@
|
|||
* http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
|
||||
*/
|
||||
|
||||
long xfs_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg);
|
||||
long xfs_compat_invis_ioctl(struct file *f, unsigned cmd, unsigned long arg);
|
||||
long linvfs_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg);
|
||||
long linvfs_compat_invis_ioctl(struct file *f, unsigned cmd, unsigned long arg);
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright (c) 2000-2004 Silicon Graphics, Inc. All Rights Reserved.
|
||||
* Copyright (c) 2000-2005 Silicon Graphics, Inc. All Rights Reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
|
@ -66,7 +66,6 @@
|
|||
#include "xfs_buf_item.h"
|
||||
#include "xfs_utils.h"
|
||||
#include "xfs_version.h"
|
||||
#include "xfs_ioctl32.h"
|
||||
|
||||
#include <linux/namei.h>
|
||||
#include <linux/init.h>
|
||||
|
|
|
@ -278,7 +278,9 @@ phase2:
|
|||
switch (flags & (BMAPI_WRITE|BMAPI_ALLOCATE|BMAPI_UNWRITTEN)) {
|
||||
case BMAPI_WRITE:
|
||||
/* If we found an extent, return it */
|
||||
if (nimaps && (imap.br_startblock != HOLESTARTBLOCK)) {
|
||||
if (nimaps &&
|
||||
(imap.br_startblock != HOLESTARTBLOCK) &&
|
||||
(imap.br_startblock != DELAYSTARTBLOCK)) {
|
||||
xfs_iomap_map_trace(XFS_IOMAP_WRITE_MAP, io,
|
||||
offset, count, iomapp, &imap, flags);
|
||||
break;
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue