Xtensa fixes for v4.20-rc3

- Fix stack alignment for bFLT binaries.
 - Fix physical-to-virtual address translation for boot parameters in MMUv3
   256+256 and 512+512 virtual memory layouts.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEK2eFS5jlMn3N6xfYUfnMkfg/oEQFAlvt5vsTHGpjbXZia2Jj
 QGdtYWlsLmNvbQAKCRBR+cyR+D+gRF9rD/4uzfL1fbeEp3qRavlUzMMGW2P0Z7Gc
 GTUC6PHRUdZhs7j8/rkuXkZuNv5vMn/8ZXARQBgyymxDYzFmWsbRCF0eKt3RbxkG
 Pw2h2E3r8eERSj6Hwf0AZQx2c1krRIXFOaxYzsz8fV9yEX1Atze0P7YJJ3m90WCV
 kgFhkkF++fed8s2ioEBngXkn0Pwx9DHl7DnNhGTVoZxWZ/9xyuksqkjSS/B9Rpge
 o1SjUIYSCwIl8Ag4FW39CHTGvhDXG8WvFInQ7DGPEkzZ8nlGchnOD9L/SpZRXYo+
 HwfrPvpDMt8iSJTE1pwv6ovyJSmvCOIIjL0tuA6KmjXiE5EBdWdolVy9byQQ3pA+
 t5zvp6l9bmqUibb25lxNfckFjQhtH6CplRPmOu93irnsGB1wV9gVwNwRiKTl4HRM
 4rdSDjEvl6mClPLjkILUWp9Pcp6KiIQzPgwhK2qdKsCrvECzDjzf/swyV5+WMHSS
 Yz1OsKhSmzvKYxKyKPUdEdFeSvdAvek5CgyZD8Lb+haRqUQahT4JItV86O59fXTU
 xYteo32oL4odSMAkqgWxI4i2/Oq1PBCA0byhUDLt56HOCnzEYJV/qVLyJaH93w1p
 dIc+BZeak228xChf2zgYPHIyXXS061CNUV4MNYES5XlY+bprQbhlgO9UNCTCVkNy
 vLX5WnsMS8Owog==
 =Ih+A
 -----END PGP SIGNATURE-----

Merge tag 'xtensa-20181115' of git://github.com/jcmvbkbc/linux-xtensa

Pull Xtensa fixes from Max Filippov:

 - fix stack alignment for bFLT binaries.

 - fix physical-to-virtual address translation for boot parameters in
   MMUv3 256+256 and 512+512 virtual memory layouts.

* tag 'xtensa-20181115' of git://github.com/jcmvbkbc/linux-xtensa:
  xtensa: fix boot parameters address translation
  xtensa: make sure bFLT stack is 16 byte aligned

arch/xtensa/include/asm/processor.h

@@ -23,7 +23,11 @@
 # error Linux requires the Xtensa Windowed Registers Option.
 #endif
 
-#define ARCH_SLAB_MINALIGN	XCHAL_DATA_WIDTH
+/* Xtensa ABI requires stack alignment to be at least 16 */
+
+#define STACK_ALIGN (XCHAL_DATA_WIDTH > 16 ? XCHAL_DATA_WIDTH : 16)
+
+#define ARCH_SLAB_MINALIGN STACK_ALIGN
 
 /*
  * User space process size: 1 GB.

arch/xtensa/kernel/head.S

@@ -88,9 +88,12 @@ _SetupMMU:
 	initialize_mmu
 #if defined(CONFIG_MMU) && XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY
 	rsr	a2, excsave1
-	movi	a3, 0x08000000
+	movi	a3, XCHAL_KSEG_PADDR
+	bltu	a2, a3, 1f
+	sub	a2, a2, a3
+	movi	a3, XCHAL_KSEG_SIZE
 	bgeu	a2, a3, 1f
-	movi	a3, 0xd0000000
+	movi	a3, XCHAL_KSEG_CACHED_VADDR
 	add	a2, a2, a3
 	wsr	a2, excsave1
 1: